1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=200000000
--- 14 unchanged lines hidden (view full) ---
23hypervisor_desc_addr=133446500352
24hypervisor_desc_bin=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/1up-hv.bin
25init_param=0
26kernel=
27kernel_addr_check=true
28load_addr_mask=1099511627775
29load_offset=0
30mem_mode=atomic
31mem_ranges=1048576:68157439:0:0:0:0 2147483648:2415919103:0:0:0:0
32memories=system.hypervisor_desc system.nvram system.partition_desc system.physmem0 system.physmem1 system.rom
33mmap_using_noreserve=false
34multi_thread=false
35num_work_ids=16
36nvram=system.nvram
37nvram_addr=133429198848
38nvram_bin=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/nvram1
39openboot_addr=1099243716608
--- 26 unchanged lines hidden (view full) ---
66clk_domain=system.clk_domain
67default_p_state=UNDEFINED
68delay=100
69eventq_index=0
70p_state_clk_gate_bins=20
71p_state_clk_gate_max=2000000000
72p_state_clk_gate_min=2
73power_model=Null
74ranges=133412421632:133412421639:0:0:0:0 134217728000:554050781183:0:0:0:0 644245094400:652835028991:0:0:0:0 725849473024:1095485095935:0:0:0:0 1099255955456:1099255955463:0:0:0:0
75req_size=16
76resp_size=16
77master=system.iobus.slave[0]
78slave=system.membus.master[2]
79
80[system.clk_domain]
81type=SrcClockDomain
82clock=2
--- 116 unchanged lines hidden (view full) ---
199[system.hypervisor_desc]
200type=SimpleMemory
201bandwidth=0.000000
202clk_domain=system.clk_domain
203conf_table_reported=true
204default_p_state=UNDEFINED
205eventq_index=0
206in_addr_map=true
207kvm_map=true
208latency=60
209latency_var=0
210null=false
211p_state_clk_gate_bins=20
212p_state_clk_gate_max=2000000000
213p_state_clk_gate_min=2
214power_model=Null
215range=133446500352:133446508543:0:0:0:0
216port=system.membus.master[5]
217
218[system.intrctrl]
219type=IntrControl
220eventq_index=0
221sys=system
222
223[system.iobus]
--- 69 unchanged lines hidden (view full) ---
293[system.nvram]
294type=SimpleMemory
295bandwidth=0.000000
296clk_domain=system.clk_domain
297conf_table_reported=true
298default_p_state=UNDEFINED
299eventq_index=0
300in_addr_map=true
301kvm_map=true
302latency=60
303latency_var=0
304null=false
305p_state_clk_gate_bins=20
306p_state_clk_gate_max=2000000000
307p_state_clk_gate_min=2
308power_model=Null
309range=133429198848:133429207039:0:0:0:0
310port=system.membus.master[4]
311
312[system.partition_desc]
313type=SimpleMemory
314bandwidth=0.000000
315clk_domain=system.clk_domain
316conf_table_reported=true
317default_p_state=UNDEFINED
318eventq_index=0
319in_addr_map=true
320kvm_map=true
321latency=60
322latency_var=0
323null=false
324p_state_clk_gate_bins=20
325p_state_clk_gate_max=2000000000
326p_state_clk_gate_min=2
327power_model=Null
328range=133445976064:133445984255:0:0:0:0
329port=system.membus.master[6]
330
331[system.physmem0]
332type=SimpleMemory
333bandwidth=0.000000
334clk_domain=system.clk_domain
335conf_table_reported=true
336default_p_state=UNDEFINED
337eventq_index=0
338in_addr_map=true
339kvm_map=true
340latency=60
341latency_var=0
342null=false
343p_state_clk_gate_bins=20
344p_state_clk_gate_max=2000000000
345p_state_clk_gate_min=2
346power_model=Null
347range=1048576:68157439:0:0:0:0
348port=system.membus.master[7]
349
350[system.physmem1]
351type=SimpleMemory
352bandwidth=0.000000
353clk_domain=system.clk_domain
354conf_table_reported=true
355default_p_state=UNDEFINED
356eventq_index=0
357in_addr_map=true
358kvm_map=true
359latency=60
360latency_var=0
361null=false
362p_state_clk_gate_bins=20
363p_state_clk_gate_max=2000000000
364p_state_clk_gate_min=2
365power_model=Null
366range=2147483648:2415919103:0:0:0:0
367port=system.membus.master[8]
368
369[system.rom]
370type=SimpleMemory
371bandwidth=0.000000
372clk_domain=system.clk_domain
373conf_table_reported=true
374default_p_state=UNDEFINED
375eventq_index=0
376in_addr_map=true
377kvm_map=true
378latency=60
379latency_var=0
380null=false
381p_state_clk_gate_bins=20
382p_state_clk_gate_max=2000000000
383p_state_clk_gate_min=2
384power_model=Null
385range=1099243192320:1099251580927:0:0:0:0
386port=system.membus.master[3]
387
388[system.t1000]
389type=T1000
390children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hterm htod hvuart iob pterm puart0
391eventq_index=0
392intrctrl=system.intrctrl
393system=system
--- 359 unchanged lines hidden ---
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=200000000
--- 14 unchanged lines hidden (view full) ---
23hypervisor_desc_addr=133446500352
24hypervisor_desc_bin=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/1up-hv.bin
25init_param=0
26kernel=
27kernel_addr_check=true
28load_addr_mask=1099511627775
29load_offset=0
30mem_mode=atomic
31mem_ranges=1048576:68157439:0:0:0:0 2147483648:2415919103:0:0:0:0
32memories=system.hypervisor_desc system.nvram system.partition_desc system.physmem0 system.physmem1 system.rom
33mmap_using_noreserve=false
34multi_thread=false
35num_work_ids=16
36nvram=system.nvram
37nvram_addr=133429198848
38nvram_bin=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/nvram1
39openboot_addr=1099243716608
--- 26 unchanged lines hidden (view full) ---
66clk_domain=system.clk_domain
67default_p_state=UNDEFINED
68delay=100
69eventq_index=0
70p_state_clk_gate_bins=20
71p_state_clk_gate_max=2000000000
72p_state_clk_gate_min=2
73power_model=Null
74ranges=133412421632:133412421639:0:0:0:0 134217728000:554050781183:0:0:0:0 644245094400:652835028991:0:0:0:0 725849473024:1095485095935:0:0:0:0 1099255955456:1099255955463:0:0:0:0
75req_size=16
76resp_size=16
77master=system.iobus.slave[0]
78slave=system.membus.master[2]
79
80[system.clk_domain]
81type=SrcClockDomain
82clock=2
--- 116 unchanged lines hidden (view full) ---
199[system.hypervisor_desc]
200type=SimpleMemory
201bandwidth=0.000000
202clk_domain=system.clk_domain
203conf_table_reported=true
204default_p_state=UNDEFINED
205eventq_index=0
206in_addr_map=true
207kvm_map=true
208latency=60
209latency_var=0
210null=false
211p_state_clk_gate_bins=20
212p_state_clk_gate_max=2000000000
213p_state_clk_gate_min=2
214power_model=Null
215range=133446500352:133446508543:0:0:0:0
216port=system.membus.master[5]
217
218[system.intrctrl]
219type=IntrControl
220eventq_index=0
221sys=system
222
223[system.iobus]
--- 69 unchanged lines hidden (view full) ---
293[system.nvram]
294type=SimpleMemory
295bandwidth=0.000000
296clk_domain=system.clk_domain
297conf_table_reported=true
298default_p_state=UNDEFINED
299eventq_index=0
300in_addr_map=true
301kvm_map=true
302latency=60
303latency_var=0
304null=false
305p_state_clk_gate_bins=20
306p_state_clk_gate_max=2000000000
307p_state_clk_gate_min=2
308power_model=Null
309range=133429198848:133429207039:0:0:0:0
310port=system.membus.master[4]
311
312[system.partition_desc]
313type=SimpleMemory
314bandwidth=0.000000
315clk_domain=system.clk_domain
316conf_table_reported=true
317default_p_state=UNDEFINED
318eventq_index=0
319in_addr_map=true
320kvm_map=true
321latency=60
322latency_var=0
323null=false
324p_state_clk_gate_bins=20
325p_state_clk_gate_max=2000000000
326p_state_clk_gate_min=2
327power_model=Null
328range=133445976064:133445984255:0:0:0:0
329port=system.membus.master[6]
330
331[system.physmem0]
332type=SimpleMemory
333bandwidth=0.000000
334clk_domain=system.clk_domain
335conf_table_reported=true
336default_p_state=UNDEFINED
337eventq_index=0
338in_addr_map=true
339kvm_map=true
340latency=60
341latency_var=0
342null=false
343p_state_clk_gate_bins=20
344p_state_clk_gate_max=2000000000
345p_state_clk_gate_min=2
346power_model=Null
347range=1048576:68157439:0:0:0:0
348port=system.membus.master[7]
349
350[system.physmem1]
351type=SimpleMemory
352bandwidth=0.000000
353clk_domain=system.clk_domain
354conf_table_reported=true
355default_p_state=UNDEFINED
356eventq_index=0
357in_addr_map=true
358kvm_map=true
359latency=60
360latency_var=0
361null=false
362p_state_clk_gate_bins=20
363p_state_clk_gate_max=2000000000
364p_state_clk_gate_min=2
365power_model=Null
366range=2147483648:2415919103:0:0:0:0
367port=system.membus.master[8]
368
369[system.rom]
370type=SimpleMemory
371bandwidth=0.000000
372clk_domain=system.clk_domain
373conf_table_reported=true
374default_p_state=UNDEFINED
375eventq_index=0
376in_addr_map=true
377kvm_map=true
378latency=60
379latency_var=0
380null=false
381p_state_clk_gate_bins=20
382p_state_clk_gate_max=2000000000
383p_state_clk_gate_min=2
384power_model=Null
385range=1099243192320:1099251580927:0:0:0:0
386port=system.membus.master[3]
387
388[system.t1000]
389type=T1000
390children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hterm htod hvuart iob pterm puart0
391eventq_index=0
392intrctrl=system.intrctrl
393system=system
--- 359 unchanged lines hidden ---