config.ini (11374:c1525cc9ec7f) config.ini (11515:c48c7cc5a522)
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxArmSystem
13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
14atags_addr=134217728
15boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
17cache_line_size=64
18clk_domain=system.clk_domain
19dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
20early_kernel_symbols=false
21enable_context_switch_stats_dump=false
22eventq_index=0
23exit_on_work_items=false
24flags_addr=469827632
25gic_cpu_addr=738205696
26have_large_asid_64=false
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxArmSystem
13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
14atags_addr=134217728
15boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
17cache_line_size=64
18clk_domain=system.clk_domain
19dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
20early_kernel_symbols=false
21enable_context_switch_stats_dump=false
22eventq_index=0
23exit_on_work_items=false
24flags_addr=469827632
25gic_cpu_addr=738205696
26have_large_asid_64=false
27have_lpae=false
27have_lpae=true
28have_security=false
29have_virtualization=false
30highest_el_is_64=false
31init_param=0
32kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
33kernel_addr_check=true
34load_addr_mask=268435455
35load_offset=2147483648
36machine_type=VExpress_EMM
37mem_mode=timing
38mem_ranges=2147483648:2415919103
39memories=system.physmem system.realview.nvmem system.realview.vram
40mmap_using_noreserve=false
41multi_proc=true
42multi_thread=false
43num_work_ids=16
44panic_on_oops=true
45panic_on_panic=true
46phys_addr_range_64=40
47readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
48reset_addr_64=0
49symbolfile=
28have_security=false
29have_virtualization=false
30highest_el_is_64=false
31init_param=0
32kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
33kernel_addr_check=true
34load_addr_mask=268435455
35load_offset=2147483648
36machine_type=VExpress_EMM
37mem_mode=timing
38mem_ranges=2147483648:2415919103
39memories=system.physmem system.realview.nvmem system.realview.vram
40mmap_using_noreserve=false
41multi_proc=true
42multi_thread=false
43num_work_ids=16
44panic_on_oops=true
45panic_on_panic=true
46phys_addr_range_64=40
47readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
48reset_addr_64=0
49symbolfile=
50thermal_components=
51thermal_model=Null
50work_begin_ckpt_count=0
51work_begin_cpu_id_exit=-1
52work_begin_exit_count=0
53work_cpus_ckpt_count=0
54work_end_ckpt_count=0
55work_end_exit_count=0
56work_item_id=-1
57system_port=system.membus.slave[1]
58
59[system.bridge]
60type=Bridge
61clk_domain=system.clk_domain
62delay=50000
63eventq_index=0
64ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
65req_size=16
66resp_size=16
67master=system.iobus.slave[0]
68slave=system.membus.master[0]
69
70[system.cf0]
71type=IdeDisk
72children=image
73delay=1000000
74driveID=master
75eventq_index=0
76image=system.cf0.image
77
78[system.cf0.image]
79type=CowDiskImage
80children=child
81child=system.cf0.image.child
82eventq_index=0
83image_file=
84read_only=false
85table_size=65536
86
87[system.cf0.image.child]
88type=RawDiskImage
89eventq_index=0
90image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img
91read_only=true
92
93[system.clk_domain]
94type=SrcClockDomain
95clock=1000
96domain_id=-1
97eventq_index=0
98init_perf_level=0
99voltage_domain=system.voltage_domain
100
101[system.cpu0]
102type=DerivO3CPU
103children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
104LFSTSize=1024
105LQEntries=16
106LSQCheckLoads=true
107LSQDepCheckShift=0
108SQEntries=16
109SSITSize=1024
110activity=0
111backComSize=5
112branchPred=system.cpu0.branchPred
113cachePorts=200
114checker=Null
115clk_domain=system.cpu_clk_domain
116commitToDecodeDelay=1
117commitToFetchDelay=1
118commitToIEWDelay=1
119commitToRenameDelay=1
120commitWidth=8
121cpu_id=0
122decodeToFetchDelay=1
123decodeToRenameDelay=2
124decodeWidth=3
125dispatchWidth=6
126do_checkpoint_insts=true
127do_quiesce=true
128do_statistics_insts=true
129dstage2_mmu=system.cpu0.dstage2_mmu
130dtb=system.cpu0.dtb
131eventq_index=0
132fetchBufferSize=16
133fetchQueueSize=32
134fetchToDecodeDelay=3
135fetchTrapLatency=1
136fetchWidth=3
137forwardComSize=5
138fuPool=system.cpu0.fuPool
139function_trace=false
140function_trace_start=0
141iewToCommitDelay=1
142iewToDecodeDelay=1
143iewToFetchDelay=1
144iewToRenameDelay=1
145interrupts=system.cpu0.interrupts
146isa=system.cpu0.isa
147issueToExecuteDelay=1
148issueWidth=8
149istage2_mmu=system.cpu0.istage2_mmu
150itb=system.cpu0.itb
151max_insts_all_threads=0
152max_insts_any_thread=0
153max_loads_all_threads=0
154max_loads_any_thread=0
155needsTSO=false
156numIQEntries=32
157numPhysCCRegs=640
158numPhysFloatRegs=192
159numPhysIntRegs=128
160numROBEntries=40
161numRobs=1
162numThreads=1
163profile=0
164progress_interval=0
165renameToDecodeDelay=1
166renameToFetchDelay=1
167renameToIEWDelay=1
168renameToROBDelay=1
169renameWidth=3
170simpoint_start_insts=
171smtCommitPolicy=RoundRobin
172smtFetchPolicy=SingleThread
173smtIQPolicy=Partitioned
174smtIQThreshold=100
175smtLSQPolicy=Partitioned
176smtLSQThreshold=100
177smtNumFetchingThreads=1
178smtROBPolicy=Partitioned
179smtROBThreshold=100
180socket_id=0
181squashWidth=8
182store_set_clear_period=250000
183switched_out=false
184system=system
185tracer=system.cpu0.tracer
186trapLatency=13
187wbWidth=8
188workload=
189dcache_port=system.cpu0.dcache.cpu_side
190icache_port=system.cpu0.icache.cpu_side
191
192[system.cpu0.branchPred]
193type=BiModeBP
194BTBEntries=2048
195BTBTagSize=18
196RASSize=16
197choiceCtrBits=2
198choicePredictorSize=8192
199eventq_index=0
200globalCtrBits=2
201globalPredictorSize=8192
52work_begin_ckpt_count=0
53work_begin_cpu_id_exit=-1
54work_begin_exit_count=0
55work_cpus_ckpt_count=0
56work_end_ckpt_count=0
57work_end_exit_count=0
58work_item_id=-1
59system_port=system.membus.slave[1]
60
61[system.bridge]
62type=Bridge
63clk_domain=system.clk_domain
64delay=50000
65eventq_index=0
66ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
67req_size=16
68resp_size=16
69master=system.iobus.slave[0]
70slave=system.membus.master[0]
71
72[system.cf0]
73type=IdeDisk
74children=image
75delay=1000000
76driveID=master
77eventq_index=0
78image=system.cf0.image
79
80[system.cf0.image]
81type=CowDiskImage
82children=child
83child=system.cf0.image.child
84eventq_index=0
85image_file=
86read_only=false
87table_size=65536
88
89[system.cf0.image.child]
90type=RawDiskImage
91eventq_index=0
92image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img
93read_only=true
94
95[system.clk_domain]
96type=SrcClockDomain
97clock=1000
98domain_id=-1
99eventq_index=0
100init_perf_level=0
101voltage_domain=system.voltage_domain
102
103[system.cpu0]
104type=DerivO3CPU
105children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
106LFSTSize=1024
107LQEntries=16
108LSQCheckLoads=true
109LSQDepCheckShift=0
110SQEntries=16
111SSITSize=1024
112activity=0
113backComSize=5
114branchPred=system.cpu0.branchPred
115cachePorts=200
116checker=Null
117clk_domain=system.cpu_clk_domain
118commitToDecodeDelay=1
119commitToFetchDelay=1
120commitToIEWDelay=1
121commitToRenameDelay=1
122commitWidth=8
123cpu_id=0
124decodeToFetchDelay=1
125decodeToRenameDelay=2
126decodeWidth=3
127dispatchWidth=6
128do_checkpoint_insts=true
129do_quiesce=true
130do_statistics_insts=true
131dstage2_mmu=system.cpu0.dstage2_mmu
132dtb=system.cpu0.dtb
133eventq_index=0
134fetchBufferSize=16
135fetchQueueSize=32
136fetchToDecodeDelay=3
137fetchTrapLatency=1
138fetchWidth=3
139forwardComSize=5
140fuPool=system.cpu0.fuPool
141function_trace=false
142function_trace_start=0
143iewToCommitDelay=1
144iewToDecodeDelay=1
145iewToFetchDelay=1
146iewToRenameDelay=1
147interrupts=system.cpu0.interrupts
148isa=system.cpu0.isa
149issueToExecuteDelay=1
150issueWidth=8
151istage2_mmu=system.cpu0.istage2_mmu
152itb=system.cpu0.itb
153max_insts_all_threads=0
154max_insts_any_thread=0
155max_loads_all_threads=0
156max_loads_any_thread=0
157needsTSO=false
158numIQEntries=32
159numPhysCCRegs=640
160numPhysFloatRegs=192
161numPhysIntRegs=128
162numROBEntries=40
163numRobs=1
164numThreads=1
165profile=0
166progress_interval=0
167renameToDecodeDelay=1
168renameToFetchDelay=1
169renameToIEWDelay=1
170renameToROBDelay=1
171renameWidth=3
172simpoint_start_insts=
173smtCommitPolicy=RoundRobin
174smtFetchPolicy=SingleThread
175smtIQPolicy=Partitioned
176smtIQThreshold=100
177smtLSQPolicy=Partitioned
178smtLSQThreshold=100
179smtNumFetchingThreads=1
180smtROBPolicy=Partitioned
181smtROBThreshold=100
182socket_id=0
183squashWidth=8
184store_set_clear_period=250000
185switched_out=false
186system=system
187tracer=system.cpu0.tracer
188trapLatency=13
189wbWidth=8
190workload=
191dcache_port=system.cpu0.dcache.cpu_side
192icache_port=system.cpu0.icache.cpu_side
193
194[system.cpu0.branchPred]
195type=BiModeBP
196BTBEntries=2048
197BTBTagSize=18
198RASSize=16
199choiceCtrBits=2
200choicePredictorSize=8192
201eventq_index=0
202globalCtrBits=2
203globalPredictorSize=8192
204indirectHashGHR=true
205indirectHashTargets=true
206indirectPathLength=3
207indirectSets=256
208indirectTagSize=16
209indirectWays=2
202instShiftAmt=2
203numThreads=1
210instShiftAmt=2
211numThreads=1
212useIndirect=true
204
205[system.cpu0.dcache]
206type=Cache
207children=tags
208addr_ranges=0:18446744073709551615
209assoc=2
210clk_domain=system.cpu_clk_domain
211clusivity=mostly_incl
212demand_mshr_reserve=1
213eventq_index=0
214hit_latency=2
215is_read_only=false
216max_miss_count=0
217mshrs=6
218prefetch_on_access=false
219prefetcher=Null
220response_latency=2
221sequential_access=false
222size=32768
223system=system
224tags=system.cpu0.dcache.tags
225tgts_per_mshr=8
226write_buffers=16
227writeback_clean=true
228cpu_side=system.cpu0.dcache_port
229mem_side=system.cpu0.toL2Bus.slave[1]
230
231[system.cpu0.dcache.tags]
232type=LRU
233assoc=2
234block_size=64
235clk_domain=system.cpu_clk_domain
236eventq_index=0
237hit_latency=2
238sequential_access=false
239size=32768
240
241[system.cpu0.dstage2_mmu]
242type=ArmStage2MMU
243children=stage2_tlb
244eventq_index=0
245stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
246sys=system
247tlb=system.cpu0.dtb
248
249[system.cpu0.dstage2_mmu.stage2_tlb]
250type=ArmTLB
251children=walker
252eventq_index=0
253is_stage2=true
254size=32
255walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
256
257[system.cpu0.dstage2_mmu.stage2_tlb.walker]
258type=ArmTableWalker
259clk_domain=system.cpu_clk_domain
260eventq_index=0
261is_stage2=true
262num_squash_per_cycle=2
263sys=system
264
265[system.cpu0.dtb]
266type=ArmTLB
267children=walker
268eventq_index=0
269is_stage2=false
270size=64
271walker=system.cpu0.dtb.walker
272
273[system.cpu0.dtb.walker]
274type=ArmTableWalker
275clk_domain=system.cpu_clk_domain
276eventq_index=0
277is_stage2=false
278num_squash_per_cycle=2
279sys=system
280port=system.cpu0.toL2Bus.slave[3]
281
282[system.cpu0.fuPool]
283type=FUPool
284children=FUList0 FUList1 FUList2 FUList3 FUList4
285FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4
286eventq_index=0
287
288[system.cpu0.fuPool.FUList0]
289type=FUDesc
290children=opList
291count=2
292eventq_index=0
293opList=system.cpu0.fuPool.FUList0.opList
294
295[system.cpu0.fuPool.FUList0.opList]
296type=OpDesc
297eventq_index=0
298opClass=IntAlu
299opLat=1
300pipelined=true
301
302[system.cpu0.fuPool.FUList1]
303type=FUDesc
304children=opList0 opList1 opList2
305count=1
306eventq_index=0
307opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2
308
309[system.cpu0.fuPool.FUList1.opList0]
310type=OpDesc
311eventq_index=0
312opClass=IntMult
313opLat=3
314pipelined=true
315
316[system.cpu0.fuPool.FUList1.opList1]
317type=OpDesc
318eventq_index=0
319opClass=IntDiv
320opLat=12
321pipelined=false
322
323[system.cpu0.fuPool.FUList1.opList2]
324type=OpDesc
325eventq_index=0
326opClass=IprAccess
327opLat=3
328pipelined=true
329
330[system.cpu0.fuPool.FUList2]
331type=FUDesc
332children=opList
333count=1
334eventq_index=0
335opList=system.cpu0.fuPool.FUList2.opList
336
337[system.cpu0.fuPool.FUList2.opList]
338type=OpDesc
339eventq_index=0
340opClass=MemRead
341opLat=2
342pipelined=true
343
344[system.cpu0.fuPool.FUList3]
345type=FUDesc
346children=opList
347count=1
348eventq_index=0
349opList=system.cpu0.fuPool.FUList3.opList
350
351[system.cpu0.fuPool.FUList3.opList]
352type=OpDesc
353eventq_index=0
354opClass=MemWrite
355opLat=2
356pipelined=true
357
358[system.cpu0.fuPool.FUList4]
359type=FUDesc
360children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25
361count=2
362eventq_index=0
363opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25
364
365[system.cpu0.fuPool.FUList4.opList00]
366type=OpDesc
367eventq_index=0
368opClass=SimdAdd
369opLat=4
370pipelined=true
371
372[system.cpu0.fuPool.FUList4.opList01]
373type=OpDesc
374eventq_index=0
375opClass=SimdAddAcc
376opLat=4
377pipelined=true
378
379[system.cpu0.fuPool.FUList4.opList02]
380type=OpDesc
381eventq_index=0
382opClass=SimdAlu
383opLat=4
384pipelined=true
385
386[system.cpu0.fuPool.FUList4.opList03]
387type=OpDesc
388eventq_index=0
389opClass=SimdCmp
390opLat=4
391pipelined=true
392
393[system.cpu0.fuPool.FUList4.opList04]
394type=OpDesc
395eventq_index=0
396opClass=SimdCvt
397opLat=3
398pipelined=true
399
400[system.cpu0.fuPool.FUList4.opList05]
401type=OpDesc
402eventq_index=0
403opClass=SimdMisc
404opLat=3
405pipelined=true
406
407[system.cpu0.fuPool.FUList4.opList06]
408type=OpDesc
409eventq_index=0
410opClass=SimdMult
411opLat=5
412pipelined=true
413
414[system.cpu0.fuPool.FUList4.opList07]
415type=OpDesc
416eventq_index=0
417opClass=SimdMultAcc
418opLat=5
419pipelined=true
420
421[system.cpu0.fuPool.FUList4.opList08]
422type=OpDesc
423eventq_index=0
424opClass=SimdShift
425opLat=3
426pipelined=true
427
428[system.cpu0.fuPool.FUList4.opList09]
429type=OpDesc
430eventq_index=0
431opClass=SimdShiftAcc
432opLat=3
433pipelined=true
434
435[system.cpu0.fuPool.FUList4.opList10]
436type=OpDesc
437eventq_index=0
438opClass=SimdSqrt
439opLat=9
440pipelined=true
441
442[system.cpu0.fuPool.FUList4.opList11]
443type=OpDesc
444eventq_index=0
445opClass=SimdFloatAdd
446opLat=5
447pipelined=true
448
449[system.cpu0.fuPool.FUList4.opList12]
450type=OpDesc
451eventq_index=0
452opClass=SimdFloatAlu
453opLat=5
454pipelined=true
455
456[system.cpu0.fuPool.FUList4.opList13]
457type=OpDesc
458eventq_index=0
459opClass=SimdFloatCmp
460opLat=3
461pipelined=true
462
463[system.cpu0.fuPool.FUList4.opList14]
464type=OpDesc
465eventq_index=0
466opClass=SimdFloatCvt
467opLat=3
468pipelined=true
469
470[system.cpu0.fuPool.FUList4.opList15]
471type=OpDesc
472eventq_index=0
473opClass=SimdFloatDiv
474opLat=3
475pipelined=true
476
477[system.cpu0.fuPool.FUList4.opList16]
478type=OpDesc
479eventq_index=0
480opClass=SimdFloatMisc
481opLat=3
482pipelined=true
483
484[system.cpu0.fuPool.FUList4.opList17]
485type=OpDesc
486eventq_index=0
487opClass=SimdFloatMult
488opLat=3
489pipelined=true
490
491[system.cpu0.fuPool.FUList4.opList18]
492type=OpDesc
493eventq_index=0
494opClass=SimdFloatMultAcc
495opLat=1
496pipelined=true
497
498[system.cpu0.fuPool.FUList4.opList19]
499type=OpDesc
500eventq_index=0
501opClass=SimdFloatSqrt
502opLat=9
503pipelined=true
504
505[system.cpu0.fuPool.FUList4.opList20]
506type=OpDesc
507eventq_index=0
508opClass=FloatAdd
509opLat=5
510pipelined=true
511
512[system.cpu0.fuPool.FUList4.opList21]
513type=OpDesc
514eventq_index=0
515opClass=FloatCmp
516opLat=5
517pipelined=true
518
519[system.cpu0.fuPool.FUList4.opList22]
520type=OpDesc
521eventq_index=0
522opClass=FloatCvt
523opLat=5
524pipelined=true
525
526[system.cpu0.fuPool.FUList4.opList23]
527type=OpDesc
528eventq_index=0
529opClass=FloatDiv
530opLat=9
531pipelined=false
532
533[system.cpu0.fuPool.FUList4.opList24]
534type=OpDesc
535eventq_index=0
536opClass=FloatSqrt
537opLat=33
538pipelined=false
539
540[system.cpu0.fuPool.FUList4.opList25]
541type=OpDesc
542eventq_index=0
543opClass=FloatMult
544opLat=4
545pipelined=true
546
547[system.cpu0.icache]
548type=Cache
549children=tags
550addr_ranges=0:18446744073709551615
551assoc=2
552clk_domain=system.cpu_clk_domain
553clusivity=mostly_incl
554demand_mshr_reserve=1
555eventq_index=0
556hit_latency=1
557is_read_only=true
558max_miss_count=0
559mshrs=2
560prefetch_on_access=false
561prefetcher=Null
562response_latency=1
563sequential_access=false
564size=32768
565system=system
566tags=system.cpu0.icache.tags
567tgts_per_mshr=8
568write_buffers=8
569writeback_clean=true
570cpu_side=system.cpu0.icache_port
571mem_side=system.cpu0.toL2Bus.slave[0]
572
573[system.cpu0.icache.tags]
574type=LRU
575assoc=2
576block_size=64
577clk_domain=system.cpu_clk_domain
578eventq_index=0
579hit_latency=1
580sequential_access=false
581size=32768
582
583[system.cpu0.interrupts]
584type=ArmInterrupts
585eventq_index=0
586
587[system.cpu0.isa]
588type=ArmISA
589decoderFlavour=Generic
590eventq_index=0
591fpsid=1090793632
592id_aa64afr0_el1=0
593id_aa64afr1_el1=0
594id_aa64dfr0_el1=1052678
595id_aa64dfr1_el1=0
596id_aa64isar0_el1=0
597id_aa64isar1_el1=0
598id_aa64mmfr0_el1=15728642
599id_aa64mmfr1_el1=0
600id_aa64pfr0_el1=17
601id_aa64pfr1_el1=0
602id_isar0=34607377
603id_isar1=34677009
604id_isar2=555950401
605id_isar3=17899825
606id_isar4=268501314
607id_isar5=0
608id_mmfr0=270536963
609id_mmfr1=0
610id_mmfr2=19070976
611id_mmfr3=34611729
612id_pfr0=49
613id_pfr1=4113
614midr=1091551472
615pmu=Null
616system=system
617
618[system.cpu0.istage2_mmu]
619type=ArmStage2MMU
620children=stage2_tlb
621eventq_index=0
622stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
623sys=system
624tlb=system.cpu0.itb
625
626[system.cpu0.istage2_mmu.stage2_tlb]
627type=ArmTLB
628children=walker
629eventq_index=0
630is_stage2=true
631size=32
632walker=system.cpu0.istage2_mmu.stage2_tlb.walker
633
634[system.cpu0.istage2_mmu.stage2_tlb.walker]
635type=ArmTableWalker
636clk_domain=system.cpu_clk_domain
637eventq_index=0
638is_stage2=true
639num_squash_per_cycle=2
640sys=system
641
642[system.cpu0.itb]
643type=ArmTLB
644children=walker
645eventq_index=0
646is_stage2=false
647size=64
648walker=system.cpu0.itb.walker
649
650[system.cpu0.itb.walker]
651type=ArmTableWalker
652clk_domain=system.cpu_clk_domain
653eventq_index=0
654is_stage2=false
655num_squash_per_cycle=2
656sys=system
657port=system.cpu0.toL2Bus.slave[2]
658
659[system.cpu0.l2cache]
660type=Cache
661children=prefetcher tags
662addr_ranges=0:18446744073709551615
663assoc=16
664clk_domain=system.cpu_clk_domain
665clusivity=mostly_excl
666demand_mshr_reserve=1
667eventq_index=0
668hit_latency=12
669is_read_only=false
670max_miss_count=0
671mshrs=16
672prefetch_on_access=true
673prefetcher=system.cpu0.l2cache.prefetcher
674response_latency=12
675sequential_access=false
676size=1048576
677system=system
678tags=system.cpu0.l2cache.tags
679tgts_per_mshr=8
680write_buffers=8
681writeback_clean=false
682cpu_side=system.cpu0.toL2Bus.master[0]
683mem_side=system.toL2Bus.slave[0]
684
685[system.cpu0.l2cache.prefetcher]
686type=StridePrefetcher
687cache_snoop=false
688clk_domain=system.cpu_clk_domain
689degree=8
690eventq_index=0
691latency=1
692max_conf=7
693min_conf=0
694on_data=true
695on_inst=true
696on_miss=false
697on_read=true
698on_write=true
699queue_filter=true
700queue_size=32
701queue_squash=true
702start_conf=4
703sys=system
704table_assoc=4
705table_sets=16
706tag_prefetch=true
707thresh_conf=4
708use_master_id=true
709
710[system.cpu0.l2cache.tags]
711type=RandomRepl
712assoc=16
713block_size=64
714clk_domain=system.cpu_clk_domain
715eventq_index=0
716hit_latency=12
717sequential_access=false
718size=1048576
719
720[system.cpu0.toL2Bus]
721type=CoherentXBar
722children=snoop_filter
723clk_domain=system.cpu_clk_domain
724eventq_index=0
725forward_latency=0
726frontend_latency=1
727point_of_coherency=false
728response_latency=1
729snoop_filter=system.cpu0.toL2Bus.snoop_filter
730snoop_response_latency=1
731system=system
732use_default_range=false
733width=32
734master=system.cpu0.l2cache.cpu_side
735slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
736
737[system.cpu0.toL2Bus.snoop_filter]
738type=SnoopFilter
739eventq_index=0
740lookup_latency=0
741max_capacity=8388608
742system=system
743
744[system.cpu0.tracer]
745type=ExeTracer
746eventq_index=0
747
748[system.cpu1]
749type=DerivO3CPU
750children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
751LFSTSize=1024
752LQEntries=16
753LSQCheckLoads=true
754LSQDepCheckShift=0
755SQEntries=16
756SSITSize=1024
757activity=0
758backComSize=5
759branchPred=system.cpu1.branchPred
760cachePorts=200
761checker=Null
762clk_domain=system.cpu_clk_domain
763commitToDecodeDelay=1
764commitToFetchDelay=1
765commitToIEWDelay=1
766commitToRenameDelay=1
767commitWidth=8
768cpu_id=1
769decodeToFetchDelay=1
770decodeToRenameDelay=2
771decodeWidth=3
772dispatchWidth=6
773do_checkpoint_insts=true
774do_quiesce=true
775do_statistics_insts=true
776dstage2_mmu=system.cpu1.dstage2_mmu
777dtb=system.cpu1.dtb
778eventq_index=0
779fetchBufferSize=16
780fetchQueueSize=32
781fetchToDecodeDelay=3
782fetchTrapLatency=1
783fetchWidth=3
784forwardComSize=5
785fuPool=system.cpu1.fuPool
786function_trace=false
787function_trace_start=0
788iewToCommitDelay=1
789iewToDecodeDelay=1
790iewToFetchDelay=1
791iewToRenameDelay=1
792interrupts=system.cpu1.interrupts
793isa=system.cpu1.isa
794issueToExecuteDelay=1
795issueWidth=8
796istage2_mmu=system.cpu1.istage2_mmu
797itb=system.cpu1.itb
798max_insts_all_threads=0
799max_insts_any_thread=0
800max_loads_all_threads=0
801max_loads_any_thread=0
802needsTSO=false
803numIQEntries=32
804numPhysCCRegs=640
805numPhysFloatRegs=192
806numPhysIntRegs=128
807numROBEntries=40
808numRobs=1
809numThreads=1
810profile=0
811progress_interval=0
812renameToDecodeDelay=1
813renameToFetchDelay=1
814renameToIEWDelay=1
815renameToROBDelay=1
816renameWidth=3
817simpoint_start_insts=
818smtCommitPolicy=RoundRobin
819smtFetchPolicy=SingleThread
820smtIQPolicy=Partitioned
821smtIQThreshold=100
822smtLSQPolicy=Partitioned
823smtLSQThreshold=100
824smtNumFetchingThreads=1
825smtROBPolicy=Partitioned
826smtROBThreshold=100
827socket_id=0
828squashWidth=8
829store_set_clear_period=250000
830switched_out=false
831system=system
832tracer=system.cpu1.tracer
833trapLatency=13
834wbWidth=8
835workload=
836dcache_port=system.cpu1.dcache.cpu_side
837icache_port=system.cpu1.icache.cpu_side
838
839[system.cpu1.branchPred]
840type=BiModeBP
841BTBEntries=2048
842BTBTagSize=18
843RASSize=16
844choiceCtrBits=2
845choicePredictorSize=8192
846eventq_index=0
847globalCtrBits=2
848globalPredictorSize=8192
213
214[system.cpu0.dcache]
215type=Cache
216children=tags
217addr_ranges=0:18446744073709551615
218assoc=2
219clk_domain=system.cpu_clk_domain
220clusivity=mostly_incl
221demand_mshr_reserve=1
222eventq_index=0
223hit_latency=2
224is_read_only=false
225max_miss_count=0
226mshrs=6
227prefetch_on_access=false
228prefetcher=Null
229response_latency=2
230sequential_access=false
231size=32768
232system=system
233tags=system.cpu0.dcache.tags
234tgts_per_mshr=8
235write_buffers=16
236writeback_clean=true
237cpu_side=system.cpu0.dcache_port
238mem_side=system.cpu0.toL2Bus.slave[1]
239
240[system.cpu0.dcache.tags]
241type=LRU
242assoc=2
243block_size=64
244clk_domain=system.cpu_clk_domain
245eventq_index=0
246hit_latency=2
247sequential_access=false
248size=32768
249
250[system.cpu0.dstage2_mmu]
251type=ArmStage2MMU
252children=stage2_tlb
253eventq_index=0
254stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
255sys=system
256tlb=system.cpu0.dtb
257
258[system.cpu0.dstage2_mmu.stage2_tlb]
259type=ArmTLB
260children=walker
261eventq_index=0
262is_stage2=true
263size=32
264walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
265
266[system.cpu0.dstage2_mmu.stage2_tlb.walker]
267type=ArmTableWalker
268clk_domain=system.cpu_clk_domain
269eventq_index=0
270is_stage2=true
271num_squash_per_cycle=2
272sys=system
273
274[system.cpu0.dtb]
275type=ArmTLB
276children=walker
277eventq_index=0
278is_stage2=false
279size=64
280walker=system.cpu0.dtb.walker
281
282[system.cpu0.dtb.walker]
283type=ArmTableWalker
284clk_domain=system.cpu_clk_domain
285eventq_index=0
286is_stage2=false
287num_squash_per_cycle=2
288sys=system
289port=system.cpu0.toL2Bus.slave[3]
290
291[system.cpu0.fuPool]
292type=FUPool
293children=FUList0 FUList1 FUList2 FUList3 FUList4
294FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4
295eventq_index=0
296
297[system.cpu0.fuPool.FUList0]
298type=FUDesc
299children=opList
300count=2
301eventq_index=0
302opList=system.cpu0.fuPool.FUList0.opList
303
304[system.cpu0.fuPool.FUList0.opList]
305type=OpDesc
306eventq_index=0
307opClass=IntAlu
308opLat=1
309pipelined=true
310
311[system.cpu0.fuPool.FUList1]
312type=FUDesc
313children=opList0 opList1 opList2
314count=1
315eventq_index=0
316opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2
317
318[system.cpu0.fuPool.FUList1.opList0]
319type=OpDesc
320eventq_index=0
321opClass=IntMult
322opLat=3
323pipelined=true
324
325[system.cpu0.fuPool.FUList1.opList1]
326type=OpDesc
327eventq_index=0
328opClass=IntDiv
329opLat=12
330pipelined=false
331
332[system.cpu0.fuPool.FUList1.opList2]
333type=OpDesc
334eventq_index=0
335opClass=IprAccess
336opLat=3
337pipelined=true
338
339[system.cpu0.fuPool.FUList2]
340type=FUDesc
341children=opList
342count=1
343eventq_index=0
344opList=system.cpu0.fuPool.FUList2.opList
345
346[system.cpu0.fuPool.FUList2.opList]
347type=OpDesc
348eventq_index=0
349opClass=MemRead
350opLat=2
351pipelined=true
352
353[system.cpu0.fuPool.FUList3]
354type=FUDesc
355children=opList
356count=1
357eventq_index=0
358opList=system.cpu0.fuPool.FUList3.opList
359
360[system.cpu0.fuPool.FUList3.opList]
361type=OpDesc
362eventq_index=0
363opClass=MemWrite
364opLat=2
365pipelined=true
366
367[system.cpu0.fuPool.FUList4]
368type=FUDesc
369children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25
370count=2
371eventq_index=0
372opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25
373
374[system.cpu0.fuPool.FUList4.opList00]
375type=OpDesc
376eventq_index=0
377opClass=SimdAdd
378opLat=4
379pipelined=true
380
381[system.cpu0.fuPool.FUList4.opList01]
382type=OpDesc
383eventq_index=0
384opClass=SimdAddAcc
385opLat=4
386pipelined=true
387
388[system.cpu0.fuPool.FUList4.opList02]
389type=OpDesc
390eventq_index=0
391opClass=SimdAlu
392opLat=4
393pipelined=true
394
395[system.cpu0.fuPool.FUList4.opList03]
396type=OpDesc
397eventq_index=0
398opClass=SimdCmp
399opLat=4
400pipelined=true
401
402[system.cpu0.fuPool.FUList4.opList04]
403type=OpDesc
404eventq_index=0
405opClass=SimdCvt
406opLat=3
407pipelined=true
408
409[system.cpu0.fuPool.FUList4.opList05]
410type=OpDesc
411eventq_index=0
412opClass=SimdMisc
413opLat=3
414pipelined=true
415
416[system.cpu0.fuPool.FUList4.opList06]
417type=OpDesc
418eventq_index=0
419opClass=SimdMult
420opLat=5
421pipelined=true
422
423[system.cpu0.fuPool.FUList4.opList07]
424type=OpDesc
425eventq_index=0
426opClass=SimdMultAcc
427opLat=5
428pipelined=true
429
430[system.cpu0.fuPool.FUList4.opList08]
431type=OpDesc
432eventq_index=0
433opClass=SimdShift
434opLat=3
435pipelined=true
436
437[system.cpu0.fuPool.FUList4.opList09]
438type=OpDesc
439eventq_index=0
440opClass=SimdShiftAcc
441opLat=3
442pipelined=true
443
444[system.cpu0.fuPool.FUList4.opList10]
445type=OpDesc
446eventq_index=0
447opClass=SimdSqrt
448opLat=9
449pipelined=true
450
451[system.cpu0.fuPool.FUList4.opList11]
452type=OpDesc
453eventq_index=0
454opClass=SimdFloatAdd
455opLat=5
456pipelined=true
457
458[system.cpu0.fuPool.FUList4.opList12]
459type=OpDesc
460eventq_index=0
461opClass=SimdFloatAlu
462opLat=5
463pipelined=true
464
465[system.cpu0.fuPool.FUList4.opList13]
466type=OpDesc
467eventq_index=0
468opClass=SimdFloatCmp
469opLat=3
470pipelined=true
471
472[system.cpu0.fuPool.FUList4.opList14]
473type=OpDesc
474eventq_index=0
475opClass=SimdFloatCvt
476opLat=3
477pipelined=true
478
479[system.cpu0.fuPool.FUList4.opList15]
480type=OpDesc
481eventq_index=0
482opClass=SimdFloatDiv
483opLat=3
484pipelined=true
485
486[system.cpu0.fuPool.FUList4.opList16]
487type=OpDesc
488eventq_index=0
489opClass=SimdFloatMisc
490opLat=3
491pipelined=true
492
493[system.cpu0.fuPool.FUList4.opList17]
494type=OpDesc
495eventq_index=0
496opClass=SimdFloatMult
497opLat=3
498pipelined=true
499
500[system.cpu0.fuPool.FUList4.opList18]
501type=OpDesc
502eventq_index=0
503opClass=SimdFloatMultAcc
504opLat=1
505pipelined=true
506
507[system.cpu0.fuPool.FUList4.opList19]
508type=OpDesc
509eventq_index=0
510opClass=SimdFloatSqrt
511opLat=9
512pipelined=true
513
514[system.cpu0.fuPool.FUList4.opList20]
515type=OpDesc
516eventq_index=0
517opClass=FloatAdd
518opLat=5
519pipelined=true
520
521[system.cpu0.fuPool.FUList4.opList21]
522type=OpDesc
523eventq_index=0
524opClass=FloatCmp
525opLat=5
526pipelined=true
527
528[system.cpu0.fuPool.FUList4.opList22]
529type=OpDesc
530eventq_index=0
531opClass=FloatCvt
532opLat=5
533pipelined=true
534
535[system.cpu0.fuPool.FUList4.opList23]
536type=OpDesc
537eventq_index=0
538opClass=FloatDiv
539opLat=9
540pipelined=false
541
542[system.cpu0.fuPool.FUList4.opList24]
543type=OpDesc
544eventq_index=0
545opClass=FloatSqrt
546opLat=33
547pipelined=false
548
549[system.cpu0.fuPool.FUList4.opList25]
550type=OpDesc
551eventq_index=0
552opClass=FloatMult
553opLat=4
554pipelined=true
555
556[system.cpu0.icache]
557type=Cache
558children=tags
559addr_ranges=0:18446744073709551615
560assoc=2
561clk_domain=system.cpu_clk_domain
562clusivity=mostly_incl
563demand_mshr_reserve=1
564eventq_index=0
565hit_latency=1
566is_read_only=true
567max_miss_count=0
568mshrs=2
569prefetch_on_access=false
570prefetcher=Null
571response_latency=1
572sequential_access=false
573size=32768
574system=system
575tags=system.cpu0.icache.tags
576tgts_per_mshr=8
577write_buffers=8
578writeback_clean=true
579cpu_side=system.cpu0.icache_port
580mem_side=system.cpu0.toL2Bus.slave[0]
581
582[system.cpu0.icache.tags]
583type=LRU
584assoc=2
585block_size=64
586clk_domain=system.cpu_clk_domain
587eventq_index=0
588hit_latency=1
589sequential_access=false
590size=32768
591
592[system.cpu0.interrupts]
593type=ArmInterrupts
594eventq_index=0
595
596[system.cpu0.isa]
597type=ArmISA
598decoderFlavour=Generic
599eventq_index=0
600fpsid=1090793632
601id_aa64afr0_el1=0
602id_aa64afr1_el1=0
603id_aa64dfr0_el1=1052678
604id_aa64dfr1_el1=0
605id_aa64isar0_el1=0
606id_aa64isar1_el1=0
607id_aa64mmfr0_el1=15728642
608id_aa64mmfr1_el1=0
609id_aa64pfr0_el1=17
610id_aa64pfr1_el1=0
611id_isar0=34607377
612id_isar1=34677009
613id_isar2=555950401
614id_isar3=17899825
615id_isar4=268501314
616id_isar5=0
617id_mmfr0=270536963
618id_mmfr1=0
619id_mmfr2=19070976
620id_mmfr3=34611729
621id_pfr0=49
622id_pfr1=4113
623midr=1091551472
624pmu=Null
625system=system
626
627[system.cpu0.istage2_mmu]
628type=ArmStage2MMU
629children=stage2_tlb
630eventq_index=0
631stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
632sys=system
633tlb=system.cpu0.itb
634
635[system.cpu0.istage2_mmu.stage2_tlb]
636type=ArmTLB
637children=walker
638eventq_index=0
639is_stage2=true
640size=32
641walker=system.cpu0.istage2_mmu.stage2_tlb.walker
642
643[system.cpu0.istage2_mmu.stage2_tlb.walker]
644type=ArmTableWalker
645clk_domain=system.cpu_clk_domain
646eventq_index=0
647is_stage2=true
648num_squash_per_cycle=2
649sys=system
650
651[system.cpu0.itb]
652type=ArmTLB
653children=walker
654eventq_index=0
655is_stage2=false
656size=64
657walker=system.cpu0.itb.walker
658
659[system.cpu0.itb.walker]
660type=ArmTableWalker
661clk_domain=system.cpu_clk_domain
662eventq_index=0
663is_stage2=false
664num_squash_per_cycle=2
665sys=system
666port=system.cpu0.toL2Bus.slave[2]
667
668[system.cpu0.l2cache]
669type=Cache
670children=prefetcher tags
671addr_ranges=0:18446744073709551615
672assoc=16
673clk_domain=system.cpu_clk_domain
674clusivity=mostly_excl
675demand_mshr_reserve=1
676eventq_index=0
677hit_latency=12
678is_read_only=false
679max_miss_count=0
680mshrs=16
681prefetch_on_access=true
682prefetcher=system.cpu0.l2cache.prefetcher
683response_latency=12
684sequential_access=false
685size=1048576
686system=system
687tags=system.cpu0.l2cache.tags
688tgts_per_mshr=8
689write_buffers=8
690writeback_clean=false
691cpu_side=system.cpu0.toL2Bus.master[0]
692mem_side=system.toL2Bus.slave[0]
693
694[system.cpu0.l2cache.prefetcher]
695type=StridePrefetcher
696cache_snoop=false
697clk_domain=system.cpu_clk_domain
698degree=8
699eventq_index=0
700latency=1
701max_conf=7
702min_conf=0
703on_data=true
704on_inst=true
705on_miss=false
706on_read=true
707on_write=true
708queue_filter=true
709queue_size=32
710queue_squash=true
711start_conf=4
712sys=system
713table_assoc=4
714table_sets=16
715tag_prefetch=true
716thresh_conf=4
717use_master_id=true
718
719[system.cpu0.l2cache.tags]
720type=RandomRepl
721assoc=16
722block_size=64
723clk_domain=system.cpu_clk_domain
724eventq_index=0
725hit_latency=12
726sequential_access=false
727size=1048576
728
729[system.cpu0.toL2Bus]
730type=CoherentXBar
731children=snoop_filter
732clk_domain=system.cpu_clk_domain
733eventq_index=0
734forward_latency=0
735frontend_latency=1
736point_of_coherency=false
737response_latency=1
738snoop_filter=system.cpu0.toL2Bus.snoop_filter
739snoop_response_latency=1
740system=system
741use_default_range=false
742width=32
743master=system.cpu0.l2cache.cpu_side
744slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
745
746[system.cpu0.toL2Bus.snoop_filter]
747type=SnoopFilter
748eventq_index=0
749lookup_latency=0
750max_capacity=8388608
751system=system
752
753[system.cpu0.tracer]
754type=ExeTracer
755eventq_index=0
756
757[system.cpu1]
758type=DerivO3CPU
759children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
760LFSTSize=1024
761LQEntries=16
762LSQCheckLoads=true
763LSQDepCheckShift=0
764SQEntries=16
765SSITSize=1024
766activity=0
767backComSize=5
768branchPred=system.cpu1.branchPred
769cachePorts=200
770checker=Null
771clk_domain=system.cpu_clk_domain
772commitToDecodeDelay=1
773commitToFetchDelay=1
774commitToIEWDelay=1
775commitToRenameDelay=1
776commitWidth=8
777cpu_id=1
778decodeToFetchDelay=1
779decodeToRenameDelay=2
780decodeWidth=3
781dispatchWidth=6
782do_checkpoint_insts=true
783do_quiesce=true
784do_statistics_insts=true
785dstage2_mmu=system.cpu1.dstage2_mmu
786dtb=system.cpu1.dtb
787eventq_index=0
788fetchBufferSize=16
789fetchQueueSize=32
790fetchToDecodeDelay=3
791fetchTrapLatency=1
792fetchWidth=3
793forwardComSize=5
794fuPool=system.cpu1.fuPool
795function_trace=false
796function_trace_start=0
797iewToCommitDelay=1
798iewToDecodeDelay=1
799iewToFetchDelay=1
800iewToRenameDelay=1
801interrupts=system.cpu1.interrupts
802isa=system.cpu1.isa
803issueToExecuteDelay=1
804issueWidth=8
805istage2_mmu=system.cpu1.istage2_mmu
806itb=system.cpu1.itb
807max_insts_all_threads=0
808max_insts_any_thread=0
809max_loads_all_threads=0
810max_loads_any_thread=0
811needsTSO=false
812numIQEntries=32
813numPhysCCRegs=640
814numPhysFloatRegs=192
815numPhysIntRegs=128
816numROBEntries=40
817numRobs=1
818numThreads=1
819profile=0
820progress_interval=0
821renameToDecodeDelay=1
822renameToFetchDelay=1
823renameToIEWDelay=1
824renameToROBDelay=1
825renameWidth=3
826simpoint_start_insts=
827smtCommitPolicy=RoundRobin
828smtFetchPolicy=SingleThread
829smtIQPolicy=Partitioned
830smtIQThreshold=100
831smtLSQPolicy=Partitioned
832smtLSQThreshold=100
833smtNumFetchingThreads=1
834smtROBPolicy=Partitioned
835smtROBThreshold=100
836socket_id=0
837squashWidth=8
838store_set_clear_period=250000
839switched_out=false
840system=system
841tracer=system.cpu1.tracer
842trapLatency=13
843wbWidth=8
844workload=
845dcache_port=system.cpu1.dcache.cpu_side
846icache_port=system.cpu1.icache.cpu_side
847
848[system.cpu1.branchPred]
849type=BiModeBP
850BTBEntries=2048
851BTBTagSize=18
852RASSize=16
853choiceCtrBits=2
854choicePredictorSize=8192
855eventq_index=0
856globalCtrBits=2
857globalPredictorSize=8192
858indirectHashGHR=true
859indirectHashTargets=true
860indirectPathLength=3
861indirectSets=256
862indirectTagSize=16
863indirectWays=2
849instShiftAmt=2
850numThreads=1
864instShiftAmt=2
865numThreads=1
866useIndirect=true
851
852[system.cpu1.dcache]
853type=Cache
854children=tags
855addr_ranges=0:18446744073709551615
856assoc=2
857clk_domain=system.cpu_clk_domain
858clusivity=mostly_incl
859demand_mshr_reserve=1
860eventq_index=0
861hit_latency=2
862is_read_only=false
863max_miss_count=0
864mshrs=6
865prefetch_on_access=false
866prefetcher=Null
867response_latency=2
868sequential_access=false
869size=32768
870system=system
871tags=system.cpu1.dcache.tags
872tgts_per_mshr=8
873write_buffers=16
874writeback_clean=true
875cpu_side=system.cpu1.dcache_port
876mem_side=system.cpu1.toL2Bus.slave[1]
877
878[system.cpu1.dcache.tags]
879type=LRU
880assoc=2
881block_size=64
882clk_domain=system.cpu_clk_domain
883eventq_index=0
884hit_latency=2
885sequential_access=false
886size=32768
887
888[system.cpu1.dstage2_mmu]
889type=ArmStage2MMU
890children=stage2_tlb
891eventq_index=0
892stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
893sys=system
894tlb=system.cpu1.dtb
895
896[system.cpu1.dstage2_mmu.stage2_tlb]
897type=ArmTLB
898children=walker
899eventq_index=0
900is_stage2=true
901size=32
902walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
903
904[system.cpu1.dstage2_mmu.stage2_tlb.walker]
905type=ArmTableWalker
906clk_domain=system.cpu_clk_domain
907eventq_index=0
908is_stage2=true
909num_squash_per_cycle=2
910sys=system
911
912[system.cpu1.dtb]
913type=ArmTLB
914children=walker
915eventq_index=0
916is_stage2=false
917size=64
918walker=system.cpu1.dtb.walker
919
920[system.cpu1.dtb.walker]
921type=ArmTableWalker
922clk_domain=system.cpu_clk_domain
923eventq_index=0
924is_stage2=false
925num_squash_per_cycle=2
926sys=system
927port=system.cpu1.toL2Bus.slave[3]
928
929[system.cpu1.fuPool]
930type=FUPool
931children=FUList0 FUList1 FUList2 FUList3 FUList4
932FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4
933eventq_index=0
934
935[system.cpu1.fuPool.FUList0]
936type=FUDesc
937children=opList
938count=2
939eventq_index=0
940opList=system.cpu1.fuPool.FUList0.opList
941
942[system.cpu1.fuPool.FUList0.opList]
943type=OpDesc
944eventq_index=0
945opClass=IntAlu
946opLat=1
947pipelined=true
948
949[system.cpu1.fuPool.FUList1]
950type=FUDesc
951children=opList0 opList1 opList2
952count=1
953eventq_index=0
954opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2
955
956[system.cpu1.fuPool.FUList1.opList0]
957type=OpDesc
958eventq_index=0
959opClass=IntMult
960opLat=3
961pipelined=true
962
963[system.cpu1.fuPool.FUList1.opList1]
964type=OpDesc
965eventq_index=0
966opClass=IntDiv
967opLat=12
968pipelined=false
969
970[system.cpu1.fuPool.FUList1.opList2]
971type=OpDesc
972eventq_index=0
973opClass=IprAccess
974opLat=3
975pipelined=true
976
977[system.cpu1.fuPool.FUList2]
978type=FUDesc
979children=opList
980count=1
981eventq_index=0
982opList=system.cpu1.fuPool.FUList2.opList
983
984[system.cpu1.fuPool.FUList2.opList]
985type=OpDesc
986eventq_index=0
987opClass=MemRead
988opLat=2
989pipelined=true
990
991[system.cpu1.fuPool.FUList3]
992type=FUDesc
993children=opList
994count=1
995eventq_index=0
996opList=system.cpu1.fuPool.FUList3.opList
997
998[system.cpu1.fuPool.FUList3.opList]
999type=OpDesc
1000eventq_index=0
1001opClass=MemWrite
1002opLat=2
1003pipelined=true
1004
1005[system.cpu1.fuPool.FUList4]
1006type=FUDesc
1007children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25
1008count=2
1009eventq_index=0
1010opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25
1011
1012[system.cpu1.fuPool.FUList4.opList00]
1013type=OpDesc
1014eventq_index=0
1015opClass=SimdAdd
1016opLat=4
1017pipelined=true
1018
1019[system.cpu1.fuPool.FUList4.opList01]
1020type=OpDesc
1021eventq_index=0
1022opClass=SimdAddAcc
1023opLat=4
1024pipelined=true
1025
1026[system.cpu1.fuPool.FUList4.opList02]
1027type=OpDesc
1028eventq_index=0
1029opClass=SimdAlu
1030opLat=4
1031pipelined=true
1032
1033[system.cpu1.fuPool.FUList4.opList03]
1034type=OpDesc
1035eventq_index=0
1036opClass=SimdCmp
1037opLat=4
1038pipelined=true
1039
1040[system.cpu1.fuPool.FUList4.opList04]
1041type=OpDesc
1042eventq_index=0
1043opClass=SimdCvt
1044opLat=3
1045pipelined=true
1046
1047[system.cpu1.fuPool.FUList4.opList05]
1048type=OpDesc
1049eventq_index=0
1050opClass=SimdMisc
1051opLat=3
1052pipelined=true
1053
1054[system.cpu1.fuPool.FUList4.opList06]
1055type=OpDesc
1056eventq_index=0
1057opClass=SimdMult
1058opLat=5
1059pipelined=true
1060
1061[system.cpu1.fuPool.FUList4.opList07]
1062type=OpDesc
1063eventq_index=0
1064opClass=SimdMultAcc
1065opLat=5
1066pipelined=true
1067
1068[system.cpu1.fuPool.FUList4.opList08]
1069type=OpDesc
1070eventq_index=0
1071opClass=SimdShift
1072opLat=3
1073pipelined=true
1074
1075[system.cpu1.fuPool.FUList4.opList09]
1076type=OpDesc
1077eventq_index=0
1078opClass=SimdShiftAcc
1079opLat=3
1080pipelined=true
1081
1082[system.cpu1.fuPool.FUList4.opList10]
1083type=OpDesc
1084eventq_index=0
1085opClass=SimdSqrt
1086opLat=9
1087pipelined=true
1088
1089[system.cpu1.fuPool.FUList4.opList11]
1090type=OpDesc
1091eventq_index=0
1092opClass=SimdFloatAdd
1093opLat=5
1094pipelined=true
1095
1096[system.cpu1.fuPool.FUList4.opList12]
1097type=OpDesc
1098eventq_index=0
1099opClass=SimdFloatAlu
1100opLat=5
1101pipelined=true
1102
1103[system.cpu1.fuPool.FUList4.opList13]
1104type=OpDesc
1105eventq_index=0
1106opClass=SimdFloatCmp
1107opLat=3
1108pipelined=true
1109
1110[system.cpu1.fuPool.FUList4.opList14]
1111type=OpDesc
1112eventq_index=0
1113opClass=SimdFloatCvt
1114opLat=3
1115pipelined=true
1116
1117[system.cpu1.fuPool.FUList4.opList15]
1118type=OpDesc
1119eventq_index=0
1120opClass=SimdFloatDiv
1121opLat=3
1122pipelined=true
1123
1124[system.cpu1.fuPool.FUList4.opList16]
1125type=OpDesc
1126eventq_index=0
1127opClass=SimdFloatMisc
1128opLat=3
1129pipelined=true
1130
1131[system.cpu1.fuPool.FUList4.opList17]
1132type=OpDesc
1133eventq_index=0
1134opClass=SimdFloatMult
1135opLat=3
1136pipelined=true
1137
1138[system.cpu1.fuPool.FUList4.opList18]
1139type=OpDesc
1140eventq_index=0
1141opClass=SimdFloatMultAcc
1142opLat=1
1143pipelined=true
1144
1145[system.cpu1.fuPool.FUList4.opList19]
1146type=OpDesc
1147eventq_index=0
1148opClass=SimdFloatSqrt
1149opLat=9
1150pipelined=true
1151
1152[system.cpu1.fuPool.FUList4.opList20]
1153type=OpDesc
1154eventq_index=0
1155opClass=FloatAdd
1156opLat=5
1157pipelined=true
1158
1159[system.cpu1.fuPool.FUList4.opList21]
1160type=OpDesc
1161eventq_index=0
1162opClass=FloatCmp
1163opLat=5
1164pipelined=true
1165
1166[system.cpu1.fuPool.FUList4.opList22]
1167type=OpDesc
1168eventq_index=0
1169opClass=FloatCvt
1170opLat=5
1171pipelined=true
1172
1173[system.cpu1.fuPool.FUList4.opList23]
1174type=OpDesc
1175eventq_index=0
1176opClass=FloatDiv
1177opLat=9
1178pipelined=false
1179
1180[system.cpu1.fuPool.FUList4.opList24]
1181type=OpDesc
1182eventq_index=0
1183opClass=FloatSqrt
1184opLat=33
1185pipelined=false
1186
1187[system.cpu1.fuPool.FUList4.opList25]
1188type=OpDesc
1189eventq_index=0
1190opClass=FloatMult
1191opLat=4
1192pipelined=true
1193
1194[system.cpu1.icache]
1195type=Cache
1196children=tags
1197addr_ranges=0:18446744073709551615
1198assoc=2
1199clk_domain=system.cpu_clk_domain
1200clusivity=mostly_incl
1201demand_mshr_reserve=1
1202eventq_index=0
1203hit_latency=1
1204is_read_only=true
1205max_miss_count=0
1206mshrs=2
1207prefetch_on_access=false
1208prefetcher=Null
1209response_latency=1
1210sequential_access=false
1211size=32768
1212system=system
1213tags=system.cpu1.icache.tags
1214tgts_per_mshr=8
1215write_buffers=8
1216writeback_clean=true
1217cpu_side=system.cpu1.icache_port
1218mem_side=system.cpu1.toL2Bus.slave[0]
1219
1220[system.cpu1.icache.tags]
1221type=LRU
1222assoc=2
1223block_size=64
1224clk_domain=system.cpu_clk_domain
1225eventq_index=0
1226hit_latency=1
1227sequential_access=false
1228size=32768
1229
1230[system.cpu1.interrupts]
1231type=ArmInterrupts
1232eventq_index=0
1233
1234[system.cpu1.isa]
1235type=ArmISA
1236decoderFlavour=Generic
1237eventq_index=0
1238fpsid=1090793632
1239id_aa64afr0_el1=0
1240id_aa64afr1_el1=0
1241id_aa64dfr0_el1=1052678
1242id_aa64dfr1_el1=0
1243id_aa64isar0_el1=0
1244id_aa64isar1_el1=0
1245id_aa64mmfr0_el1=15728642
1246id_aa64mmfr1_el1=0
1247id_aa64pfr0_el1=17
1248id_aa64pfr1_el1=0
1249id_isar0=34607377
1250id_isar1=34677009
1251id_isar2=555950401
1252id_isar3=17899825
1253id_isar4=268501314
1254id_isar5=0
1255id_mmfr0=270536963
1256id_mmfr1=0
1257id_mmfr2=19070976
1258id_mmfr3=34611729
1259id_pfr0=49
1260id_pfr1=4113
1261midr=1091551472
1262pmu=Null
1263system=system
1264
1265[system.cpu1.istage2_mmu]
1266type=ArmStage2MMU
1267children=stage2_tlb
1268eventq_index=0
1269stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
1270sys=system
1271tlb=system.cpu1.itb
1272
1273[system.cpu1.istage2_mmu.stage2_tlb]
1274type=ArmTLB
1275children=walker
1276eventq_index=0
1277is_stage2=true
1278size=32
1279walker=system.cpu1.istage2_mmu.stage2_tlb.walker
1280
1281[system.cpu1.istage2_mmu.stage2_tlb.walker]
1282type=ArmTableWalker
1283clk_domain=system.cpu_clk_domain
1284eventq_index=0
1285is_stage2=true
1286num_squash_per_cycle=2
1287sys=system
1288
1289[system.cpu1.itb]
1290type=ArmTLB
1291children=walker
1292eventq_index=0
1293is_stage2=false
1294size=64
1295walker=system.cpu1.itb.walker
1296
1297[system.cpu1.itb.walker]
1298type=ArmTableWalker
1299clk_domain=system.cpu_clk_domain
1300eventq_index=0
1301is_stage2=false
1302num_squash_per_cycle=2
1303sys=system
1304port=system.cpu1.toL2Bus.slave[2]
1305
1306[system.cpu1.l2cache]
1307type=Cache
1308children=prefetcher tags
1309addr_ranges=0:18446744073709551615
1310assoc=16
1311clk_domain=system.cpu_clk_domain
1312clusivity=mostly_excl
1313demand_mshr_reserve=1
1314eventq_index=0
1315hit_latency=12
1316is_read_only=false
1317max_miss_count=0
1318mshrs=16
1319prefetch_on_access=true
1320prefetcher=system.cpu1.l2cache.prefetcher
1321response_latency=12
1322sequential_access=false
1323size=1048576
1324system=system
1325tags=system.cpu1.l2cache.tags
1326tgts_per_mshr=8
1327write_buffers=8
1328writeback_clean=false
1329cpu_side=system.cpu1.toL2Bus.master[0]
1330mem_side=system.toL2Bus.slave[1]
1331
1332[system.cpu1.l2cache.prefetcher]
1333type=StridePrefetcher
1334cache_snoop=false
1335clk_domain=system.cpu_clk_domain
1336degree=8
1337eventq_index=0
1338latency=1
1339max_conf=7
1340min_conf=0
1341on_data=true
1342on_inst=true
1343on_miss=false
1344on_read=true
1345on_write=true
1346queue_filter=true
1347queue_size=32
1348queue_squash=true
1349start_conf=4
1350sys=system
1351table_assoc=4
1352table_sets=16
1353tag_prefetch=true
1354thresh_conf=4
1355use_master_id=true
1356
1357[system.cpu1.l2cache.tags]
1358type=RandomRepl
1359assoc=16
1360block_size=64
1361clk_domain=system.cpu_clk_domain
1362eventq_index=0
1363hit_latency=12
1364sequential_access=false
1365size=1048576
1366
1367[system.cpu1.toL2Bus]
1368type=CoherentXBar
1369children=snoop_filter
1370clk_domain=system.cpu_clk_domain
1371eventq_index=0
1372forward_latency=0
1373frontend_latency=1
1374point_of_coherency=false
1375response_latency=1
1376snoop_filter=system.cpu1.toL2Bus.snoop_filter
1377snoop_response_latency=1
1378system=system
1379use_default_range=false
1380width=32
1381master=system.cpu1.l2cache.cpu_side
1382slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
1383
1384[system.cpu1.toL2Bus.snoop_filter]
1385type=SnoopFilter
1386eventq_index=0
1387lookup_latency=0
1388max_capacity=8388608
1389system=system
1390
1391[system.cpu1.tracer]
1392type=ExeTracer
1393eventq_index=0
1394
1395[system.cpu_clk_domain]
1396type=SrcClockDomain
1397clock=500
1398domain_id=-1
1399eventq_index=0
1400init_perf_level=0
1401voltage_domain=system.voltage_domain
1402
1403[system.dvfs_handler]
1404type=DVFSHandler
1405domains=
1406enable=false
1407eventq_index=0
1408sys_clk_domain=system.clk_domain
1409transition_latency=100000000
1410
1411[system.intrctrl]
1412type=IntrControl
1413eventq_index=0
1414sys=system
1415
1416[system.iobus]
1417type=NoncoherentXBar
1418clk_domain=system.clk_domain
1419eventq_index=0
1420forward_latency=1
1421frontend_latency=2
1422response_latency=2
1423use_default_range=false
1424width=16
1425master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side
1426slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
1427
1428[system.iocache]
1429type=Cache
1430children=tags
1431addr_ranges=2147483648:2415919103
1432assoc=8
1433clk_domain=system.clk_domain
1434clusivity=mostly_incl
1435demand_mshr_reserve=1
1436eventq_index=0
1437hit_latency=50
1438is_read_only=false
1439max_miss_count=0
1440mshrs=20
1441prefetch_on_access=false
1442prefetcher=Null
1443response_latency=50
1444sequential_access=false
1445size=1024
1446system=system
1447tags=system.iocache.tags
1448tgts_per_mshr=12
1449write_buffers=8
1450writeback_clean=false
1451cpu_side=system.iobus.master[25]
1452mem_side=system.membus.slave[3]
1453
1454[system.iocache.tags]
1455type=LRU
1456assoc=8
1457block_size=64
1458clk_domain=system.clk_domain
1459eventq_index=0
1460hit_latency=50
1461sequential_access=false
1462size=1024
1463
1464[system.l2c]
1465type=Cache
1466children=tags
1467addr_ranges=0:18446744073709551615
1468assoc=8
1469clk_domain=system.cpu_clk_domain
1470clusivity=mostly_incl
1471demand_mshr_reserve=1
1472eventq_index=0
1473hit_latency=20
1474is_read_only=false
1475max_miss_count=0
1476mshrs=20
1477prefetch_on_access=false
1478prefetcher=Null
1479response_latency=20
1480sequential_access=false
1481size=4194304
1482system=system
1483tags=system.l2c.tags
1484tgts_per_mshr=12
1485write_buffers=8
1486writeback_clean=false
1487cpu_side=system.toL2Bus.master[0]
1488mem_side=system.membus.slave[2]
1489
1490[system.l2c.tags]
1491type=LRU
1492assoc=8
1493block_size=64
1494clk_domain=system.cpu_clk_domain
1495eventq_index=0
1496hit_latency=20
1497sequential_access=false
1498size=4194304
1499
1500[system.membus]
1501type=CoherentXBar
867
868[system.cpu1.dcache]
869type=Cache
870children=tags
871addr_ranges=0:18446744073709551615
872assoc=2
873clk_domain=system.cpu_clk_domain
874clusivity=mostly_incl
875demand_mshr_reserve=1
876eventq_index=0
877hit_latency=2
878is_read_only=false
879max_miss_count=0
880mshrs=6
881prefetch_on_access=false
882prefetcher=Null
883response_latency=2
884sequential_access=false
885size=32768
886system=system
887tags=system.cpu1.dcache.tags
888tgts_per_mshr=8
889write_buffers=16
890writeback_clean=true
891cpu_side=system.cpu1.dcache_port
892mem_side=system.cpu1.toL2Bus.slave[1]
893
894[system.cpu1.dcache.tags]
895type=LRU
896assoc=2
897block_size=64
898clk_domain=system.cpu_clk_domain
899eventq_index=0
900hit_latency=2
901sequential_access=false
902size=32768
903
904[system.cpu1.dstage2_mmu]
905type=ArmStage2MMU
906children=stage2_tlb
907eventq_index=0
908stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
909sys=system
910tlb=system.cpu1.dtb
911
912[system.cpu1.dstage2_mmu.stage2_tlb]
913type=ArmTLB
914children=walker
915eventq_index=0
916is_stage2=true
917size=32
918walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
919
920[system.cpu1.dstage2_mmu.stage2_tlb.walker]
921type=ArmTableWalker
922clk_domain=system.cpu_clk_domain
923eventq_index=0
924is_stage2=true
925num_squash_per_cycle=2
926sys=system
927
928[system.cpu1.dtb]
929type=ArmTLB
930children=walker
931eventq_index=0
932is_stage2=false
933size=64
934walker=system.cpu1.dtb.walker
935
936[system.cpu1.dtb.walker]
937type=ArmTableWalker
938clk_domain=system.cpu_clk_domain
939eventq_index=0
940is_stage2=false
941num_squash_per_cycle=2
942sys=system
943port=system.cpu1.toL2Bus.slave[3]
944
945[system.cpu1.fuPool]
946type=FUPool
947children=FUList0 FUList1 FUList2 FUList3 FUList4
948FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4
949eventq_index=0
950
951[system.cpu1.fuPool.FUList0]
952type=FUDesc
953children=opList
954count=2
955eventq_index=0
956opList=system.cpu1.fuPool.FUList0.opList
957
958[system.cpu1.fuPool.FUList0.opList]
959type=OpDesc
960eventq_index=0
961opClass=IntAlu
962opLat=1
963pipelined=true
964
965[system.cpu1.fuPool.FUList1]
966type=FUDesc
967children=opList0 opList1 opList2
968count=1
969eventq_index=0
970opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2
971
972[system.cpu1.fuPool.FUList1.opList0]
973type=OpDesc
974eventq_index=0
975opClass=IntMult
976opLat=3
977pipelined=true
978
979[system.cpu1.fuPool.FUList1.opList1]
980type=OpDesc
981eventq_index=0
982opClass=IntDiv
983opLat=12
984pipelined=false
985
986[system.cpu1.fuPool.FUList1.opList2]
987type=OpDesc
988eventq_index=0
989opClass=IprAccess
990opLat=3
991pipelined=true
992
993[system.cpu1.fuPool.FUList2]
994type=FUDesc
995children=opList
996count=1
997eventq_index=0
998opList=system.cpu1.fuPool.FUList2.opList
999
1000[system.cpu1.fuPool.FUList2.opList]
1001type=OpDesc
1002eventq_index=0
1003opClass=MemRead
1004opLat=2
1005pipelined=true
1006
1007[system.cpu1.fuPool.FUList3]
1008type=FUDesc
1009children=opList
1010count=1
1011eventq_index=0
1012opList=system.cpu1.fuPool.FUList3.opList
1013
1014[system.cpu1.fuPool.FUList3.opList]
1015type=OpDesc
1016eventq_index=0
1017opClass=MemWrite
1018opLat=2
1019pipelined=true
1020
1021[system.cpu1.fuPool.FUList4]
1022type=FUDesc
1023children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25
1024count=2
1025eventq_index=0
1026opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25
1027
1028[system.cpu1.fuPool.FUList4.opList00]
1029type=OpDesc
1030eventq_index=0
1031opClass=SimdAdd
1032opLat=4
1033pipelined=true
1034
1035[system.cpu1.fuPool.FUList4.opList01]
1036type=OpDesc
1037eventq_index=0
1038opClass=SimdAddAcc
1039opLat=4
1040pipelined=true
1041
1042[system.cpu1.fuPool.FUList4.opList02]
1043type=OpDesc
1044eventq_index=0
1045opClass=SimdAlu
1046opLat=4
1047pipelined=true
1048
1049[system.cpu1.fuPool.FUList4.opList03]
1050type=OpDesc
1051eventq_index=0
1052opClass=SimdCmp
1053opLat=4
1054pipelined=true
1055
1056[system.cpu1.fuPool.FUList4.opList04]
1057type=OpDesc
1058eventq_index=0
1059opClass=SimdCvt
1060opLat=3
1061pipelined=true
1062
1063[system.cpu1.fuPool.FUList4.opList05]
1064type=OpDesc
1065eventq_index=0
1066opClass=SimdMisc
1067opLat=3
1068pipelined=true
1069
1070[system.cpu1.fuPool.FUList4.opList06]
1071type=OpDesc
1072eventq_index=0
1073opClass=SimdMult
1074opLat=5
1075pipelined=true
1076
1077[system.cpu1.fuPool.FUList4.opList07]
1078type=OpDesc
1079eventq_index=0
1080opClass=SimdMultAcc
1081opLat=5
1082pipelined=true
1083
1084[system.cpu1.fuPool.FUList4.opList08]
1085type=OpDesc
1086eventq_index=0
1087opClass=SimdShift
1088opLat=3
1089pipelined=true
1090
1091[system.cpu1.fuPool.FUList4.opList09]
1092type=OpDesc
1093eventq_index=0
1094opClass=SimdShiftAcc
1095opLat=3
1096pipelined=true
1097
1098[system.cpu1.fuPool.FUList4.opList10]
1099type=OpDesc
1100eventq_index=0
1101opClass=SimdSqrt
1102opLat=9
1103pipelined=true
1104
1105[system.cpu1.fuPool.FUList4.opList11]
1106type=OpDesc
1107eventq_index=0
1108opClass=SimdFloatAdd
1109opLat=5
1110pipelined=true
1111
1112[system.cpu1.fuPool.FUList4.opList12]
1113type=OpDesc
1114eventq_index=0
1115opClass=SimdFloatAlu
1116opLat=5
1117pipelined=true
1118
1119[system.cpu1.fuPool.FUList4.opList13]
1120type=OpDesc
1121eventq_index=0
1122opClass=SimdFloatCmp
1123opLat=3
1124pipelined=true
1125
1126[system.cpu1.fuPool.FUList4.opList14]
1127type=OpDesc
1128eventq_index=0
1129opClass=SimdFloatCvt
1130opLat=3
1131pipelined=true
1132
1133[system.cpu1.fuPool.FUList4.opList15]
1134type=OpDesc
1135eventq_index=0
1136opClass=SimdFloatDiv
1137opLat=3
1138pipelined=true
1139
1140[system.cpu1.fuPool.FUList4.opList16]
1141type=OpDesc
1142eventq_index=0
1143opClass=SimdFloatMisc
1144opLat=3
1145pipelined=true
1146
1147[system.cpu1.fuPool.FUList4.opList17]
1148type=OpDesc
1149eventq_index=0
1150opClass=SimdFloatMult
1151opLat=3
1152pipelined=true
1153
1154[system.cpu1.fuPool.FUList4.opList18]
1155type=OpDesc
1156eventq_index=0
1157opClass=SimdFloatMultAcc
1158opLat=1
1159pipelined=true
1160
1161[system.cpu1.fuPool.FUList4.opList19]
1162type=OpDesc
1163eventq_index=0
1164opClass=SimdFloatSqrt
1165opLat=9
1166pipelined=true
1167
1168[system.cpu1.fuPool.FUList4.opList20]
1169type=OpDesc
1170eventq_index=0
1171opClass=FloatAdd
1172opLat=5
1173pipelined=true
1174
1175[system.cpu1.fuPool.FUList4.opList21]
1176type=OpDesc
1177eventq_index=0
1178opClass=FloatCmp
1179opLat=5
1180pipelined=true
1181
1182[system.cpu1.fuPool.FUList4.opList22]
1183type=OpDesc
1184eventq_index=0
1185opClass=FloatCvt
1186opLat=5
1187pipelined=true
1188
1189[system.cpu1.fuPool.FUList4.opList23]
1190type=OpDesc
1191eventq_index=0
1192opClass=FloatDiv
1193opLat=9
1194pipelined=false
1195
1196[system.cpu1.fuPool.FUList4.opList24]
1197type=OpDesc
1198eventq_index=0
1199opClass=FloatSqrt
1200opLat=33
1201pipelined=false
1202
1203[system.cpu1.fuPool.FUList4.opList25]
1204type=OpDesc
1205eventq_index=0
1206opClass=FloatMult
1207opLat=4
1208pipelined=true
1209
1210[system.cpu1.icache]
1211type=Cache
1212children=tags
1213addr_ranges=0:18446744073709551615
1214assoc=2
1215clk_domain=system.cpu_clk_domain
1216clusivity=mostly_incl
1217demand_mshr_reserve=1
1218eventq_index=0
1219hit_latency=1
1220is_read_only=true
1221max_miss_count=0
1222mshrs=2
1223prefetch_on_access=false
1224prefetcher=Null
1225response_latency=1
1226sequential_access=false
1227size=32768
1228system=system
1229tags=system.cpu1.icache.tags
1230tgts_per_mshr=8
1231write_buffers=8
1232writeback_clean=true
1233cpu_side=system.cpu1.icache_port
1234mem_side=system.cpu1.toL2Bus.slave[0]
1235
1236[system.cpu1.icache.tags]
1237type=LRU
1238assoc=2
1239block_size=64
1240clk_domain=system.cpu_clk_domain
1241eventq_index=0
1242hit_latency=1
1243sequential_access=false
1244size=32768
1245
1246[system.cpu1.interrupts]
1247type=ArmInterrupts
1248eventq_index=0
1249
1250[system.cpu1.isa]
1251type=ArmISA
1252decoderFlavour=Generic
1253eventq_index=0
1254fpsid=1090793632
1255id_aa64afr0_el1=0
1256id_aa64afr1_el1=0
1257id_aa64dfr0_el1=1052678
1258id_aa64dfr1_el1=0
1259id_aa64isar0_el1=0
1260id_aa64isar1_el1=0
1261id_aa64mmfr0_el1=15728642
1262id_aa64mmfr1_el1=0
1263id_aa64pfr0_el1=17
1264id_aa64pfr1_el1=0
1265id_isar0=34607377
1266id_isar1=34677009
1267id_isar2=555950401
1268id_isar3=17899825
1269id_isar4=268501314
1270id_isar5=0
1271id_mmfr0=270536963
1272id_mmfr1=0
1273id_mmfr2=19070976
1274id_mmfr3=34611729
1275id_pfr0=49
1276id_pfr1=4113
1277midr=1091551472
1278pmu=Null
1279system=system
1280
1281[system.cpu1.istage2_mmu]
1282type=ArmStage2MMU
1283children=stage2_tlb
1284eventq_index=0
1285stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
1286sys=system
1287tlb=system.cpu1.itb
1288
1289[system.cpu1.istage2_mmu.stage2_tlb]
1290type=ArmTLB
1291children=walker
1292eventq_index=0
1293is_stage2=true
1294size=32
1295walker=system.cpu1.istage2_mmu.stage2_tlb.walker
1296
1297[system.cpu1.istage2_mmu.stage2_tlb.walker]
1298type=ArmTableWalker
1299clk_domain=system.cpu_clk_domain
1300eventq_index=0
1301is_stage2=true
1302num_squash_per_cycle=2
1303sys=system
1304
1305[system.cpu1.itb]
1306type=ArmTLB
1307children=walker
1308eventq_index=0
1309is_stage2=false
1310size=64
1311walker=system.cpu1.itb.walker
1312
1313[system.cpu1.itb.walker]
1314type=ArmTableWalker
1315clk_domain=system.cpu_clk_domain
1316eventq_index=0
1317is_stage2=false
1318num_squash_per_cycle=2
1319sys=system
1320port=system.cpu1.toL2Bus.slave[2]
1321
1322[system.cpu1.l2cache]
1323type=Cache
1324children=prefetcher tags
1325addr_ranges=0:18446744073709551615
1326assoc=16
1327clk_domain=system.cpu_clk_domain
1328clusivity=mostly_excl
1329demand_mshr_reserve=1
1330eventq_index=0
1331hit_latency=12
1332is_read_only=false
1333max_miss_count=0
1334mshrs=16
1335prefetch_on_access=true
1336prefetcher=system.cpu1.l2cache.prefetcher
1337response_latency=12
1338sequential_access=false
1339size=1048576
1340system=system
1341tags=system.cpu1.l2cache.tags
1342tgts_per_mshr=8
1343write_buffers=8
1344writeback_clean=false
1345cpu_side=system.cpu1.toL2Bus.master[0]
1346mem_side=system.toL2Bus.slave[1]
1347
1348[system.cpu1.l2cache.prefetcher]
1349type=StridePrefetcher
1350cache_snoop=false
1351clk_domain=system.cpu_clk_domain
1352degree=8
1353eventq_index=0
1354latency=1
1355max_conf=7
1356min_conf=0
1357on_data=true
1358on_inst=true
1359on_miss=false
1360on_read=true
1361on_write=true
1362queue_filter=true
1363queue_size=32
1364queue_squash=true
1365start_conf=4
1366sys=system
1367table_assoc=4
1368table_sets=16
1369tag_prefetch=true
1370thresh_conf=4
1371use_master_id=true
1372
1373[system.cpu1.l2cache.tags]
1374type=RandomRepl
1375assoc=16
1376block_size=64
1377clk_domain=system.cpu_clk_domain
1378eventq_index=0
1379hit_latency=12
1380sequential_access=false
1381size=1048576
1382
1383[system.cpu1.toL2Bus]
1384type=CoherentXBar
1385children=snoop_filter
1386clk_domain=system.cpu_clk_domain
1387eventq_index=0
1388forward_latency=0
1389frontend_latency=1
1390point_of_coherency=false
1391response_latency=1
1392snoop_filter=system.cpu1.toL2Bus.snoop_filter
1393snoop_response_latency=1
1394system=system
1395use_default_range=false
1396width=32
1397master=system.cpu1.l2cache.cpu_side
1398slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
1399
1400[system.cpu1.toL2Bus.snoop_filter]
1401type=SnoopFilter
1402eventq_index=0
1403lookup_latency=0
1404max_capacity=8388608
1405system=system
1406
1407[system.cpu1.tracer]
1408type=ExeTracer
1409eventq_index=0
1410
1411[system.cpu_clk_domain]
1412type=SrcClockDomain
1413clock=500
1414domain_id=-1
1415eventq_index=0
1416init_perf_level=0
1417voltage_domain=system.voltage_domain
1418
1419[system.dvfs_handler]
1420type=DVFSHandler
1421domains=
1422enable=false
1423eventq_index=0
1424sys_clk_domain=system.clk_domain
1425transition_latency=100000000
1426
1427[system.intrctrl]
1428type=IntrControl
1429eventq_index=0
1430sys=system
1431
1432[system.iobus]
1433type=NoncoherentXBar
1434clk_domain=system.clk_domain
1435eventq_index=0
1436forward_latency=1
1437frontend_latency=2
1438response_latency=2
1439use_default_range=false
1440width=16
1441master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side
1442slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
1443
1444[system.iocache]
1445type=Cache
1446children=tags
1447addr_ranges=2147483648:2415919103
1448assoc=8
1449clk_domain=system.clk_domain
1450clusivity=mostly_incl
1451demand_mshr_reserve=1
1452eventq_index=0
1453hit_latency=50
1454is_read_only=false
1455max_miss_count=0
1456mshrs=20
1457prefetch_on_access=false
1458prefetcher=Null
1459response_latency=50
1460sequential_access=false
1461size=1024
1462system=system
1463tags=system.iocache.tags
1464tgts_per_mshr=12
1465write_buffers=8
1466writeback_clean=false
1467cpu_side=system.iobus.master[25]
1468mem_side=system.membus.slave[3]
1469
1470[system.iocache.tags]
1471type=LRU
1472assoc=8
1473block_size=64
1474clk_domain=system.clk_domain
1475eventq_index=0
1476hit_latency=50
1477sequential_access=false
1478size=1024
1479
1480[system.l2c]
1481type=Cache
1482children=tags
1483addr_ranges=0:18446744073709551615
1484assoc=8
1485clk_domain=system.cpu_clk_domain
1486clusivity=mostly_incl
1487demand_mshr_reserve=1
1488eventq_index=0
1489hit_latency=20
1490is_read_only=false
1491max_miss_count=0
1492mshrs=20
1493prefetch_on_access=false
1494prefetcher=Null
1495response_latency=20
1496sequential_access=false
1497size=4194304
1498system=system
1499tags=system.l2c.tags
1500tgts_per_mshr=12
1501write_buffers=8
1502writeback_clean=false
1503cpu_side=system.toL2Bus.master[0]
1504mem_side=system.membus.slave[2]
1505
1506[system.l2c.tags]
1507type=LRU
1508assoc=8
1509block_size=64
1510clk_domain=system.cpu_clk_domain
1511eventq_index=0
1512hit_latency=20
1513sequential_access=false
1514size=4194304
1515
1516[system.membus]
1517type=CoherentXBar
1502children=badaddr_responder
1518children=badaddr_responder snoop_filter
1503clk_domain=system.clk_domain
1504eventq_index=0
1505forward_latency=4
1506frontend_latency=3
1507point_of_coherency=true
1508response_latency=2
1519clk_domain=system.clk_domain
1520eventq_index=0
1521forward_latency=4
1522frontend_latency=3
1523point_of_coherency=true
1524response_latency=2
1509snoop_filter=Null
1525snoop_filter=system.membus.snoop_filter
1510snoop_response_latency=4
1511system=system
1512use_default_range=false
1513width=16
1514default=system.membus.badaddr_responder.pio
1515master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
1516slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
1517
1518[system.membus.badaddr_responder]
1519type=IsaFake
1520clk_domain=system.clk_domain
1521eventq_index=0
1522fake_mem=false
1523pio_addr=0
1524pio_latency=100000
1525pio_size=8
1526ret_bad_addr=true
1527ret_data16=65535
1528ret_data32=4294967295
1529ret_data64=18446744073709551615
1530ret_data8=255
1531system=system
1532update_data=false
1533warn_access=warn
1534pio=system.membus.default
1535
1526snoop_response_latency=4
1527system=system
1528use_default_range=false
1529width=16
1530default=system.membus.badaddr_responder.pio
1531master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
1532slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
1533
1534[system.membus.badaddr_responder]
1535type=IsaFake
1536clk_domain=system.clk_domain
1537eventq_index=0
1538fake_mem=false
1539pio_addr=0
1540pio_latency=100000
1541pio_size=8
1542ret_bad_addr=true
1543ret_data16=65535
1544ret_data32=4294967295
1545ret_data64=18446744073709551615
1546ret_data8=255
1547system=system
1548update_data=false
1549warn_access=warn
1550pio=system.membus.default
1551
1552[system.membus.snoop_filter]
1553type=SnoopFilter
1554eventq_index=0
1555lookup_latency=1
1556max_capacity=8388608
1557system=system
1558
1536[system.physmem]
1537type=DRAMCtrl
1538IDD0=0.075000
1539IDD02=0.000000
1540IDD2N=0.050000
1541IDD2N2=0.000000
1542IDD2P0=0.000000
1543IDD2P02=0.000000
1544IDD2P1=0.000000
1545IDD2P12=0.000000
1546IDD3N=0.057000
1547IDD3N2=0.000000
1548IDD3P0=0.000000
1549IDD3P02=0.000000
1550IDD3P1=0.000000
1551IDD3P12=0.000000
1552IDD4R=0.187000
1553IDD4R2=0.000000
1554IDD4W=0.165000
1555IDD4W2=0.000000
1556IDD5=0.220000
1557IDD52=0.000000
1558IDD6=0.000000
1559IDD62=0.000000
1560VDD=1.500000
1561VDD2=0.000000
1562activation_limit=4
1563addr_mapping=RoRaBaCoCh
1564bank_groups_per_rank=0
1565banks_per_rank=8
1566burst_length=8
1567channels=1
1568clk_domain=system.clk_domain
1569conf_table_reported=true
1570device_bus_width=8
1571device_rowbuffer_size=1024
1572device_size=536870912
1573devices_per_rank=8
1574dll=true
1575eventq_index=0
1576in_addr_map=true
1577max_accesses_per_row=16
1578mem_sched_policy=frfcfs
1579min_writes_per_switch=16
1580null=false
1581page_policy=open_adaptive
1582range=2147483648:2415919103
1583ranks_per_channel=2
1584read_buffer_size=32
1585static_backend_latency=10000
1586static_frontend_latency=10000
1587tBURST=5000
1588tCCD_L=0
1589tCK=1250
1590tCL=13750
1591tCS=2500
1592tRAS=35000
1593tRCD=13750
1594tREFI=7800000
1595tRFC=260000
1596tRP=13750
1597tRRD=6000
1598tRRD_L=0
1599tRTP=7500
1600tRTW=2500
1601tWR=15000
1602tWTR=7500
1603tXAW=30000
1604tXP=0
1605tXPDLL=0
1606tXS=0
1607tXSDLL=0
1608write_buffer_size=64
1609write_high_thresh_perc=85
1610write_low_thresh_perc=50
1611port=system.membus.master[5]
1612
1613[system.realview]
1614type=RealView
1615children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
1616eventq_index=0
1617intrctrl=system.intrctrl
1618system=system
1619
1620[system.realview.aaci_fake]
1621type=AmbaFake
1622amba_id=0
1623clk_domain=system.clk_domain
1624eventq_index=0
1625ignore_access=false
1626pio_addr=470024192
1627pio_latency=100000
1628system=system
1629pio=system.iobus.master[18]
1630
1631[system.realview.cf_ctrl]
1632type=IdeController
1633BAR0=471465984
1634BAR0LegacyIO=true
1635BAR0Size=256
1636BAR1=471466240
1637BAR1LegacyIO=true
1638BAR1Size=4096
1639BAR2=1
1640BAR2LegacyIO=false
1641BAR2Size=8
1642BAR3=1
1643BAR3LegacyIO=false
1644BAR3Size=4
1645BAR4=1
1646BAR4LegacyIO=false
1647BAR4Size=16
1648BAR5=1
1649BAR5LegacyIO=false
1650BAR5Size=0
1651BIST=0
1652CacheLineSize=0
1653CapabilityPtr=0
1654CardbusCIS=0
1655ClassCode=1
1656Command=1
1657DeviceID=28945
1658ExpansionROM=0
1659HeaderType=0
1660InterruptLine=31
1661InterruptPin=1
1662LatencyTimer=0
1663LegacyIOBase=0
1664MSICAPBaseOffset=0
1665MSICAPCapId=0
1666MSICAPMaskBits=0
1667MSICAPMsgAddr=0
1668MSICAPMsgCtrl=0
1669MSICAPMsgData=0
1670MSICAPMsgUpperAddr=0
1671MSICAPNextCapability=0
1672MSICAPPendingBits=0
1673MSIXCAPBaseOffset=0
1674MSIXCAPCapId=0
1675MSIXCAPNextCapability=0
1676MSIXMsgCtrl=0
1677MSIXPbaOffset=0
1678MSIXTableOffset=0
1679MaximumLatency=0
1680MinimumGrant=0
1681PMCAPBaseOffset=0
1682PMCAPCapId=0
1683PMCAPCapabilities=0
1684PMCAPCtrlStatus=0
1685PMCAPNextCapability=0
1686PXCAPBaseOffset=0
1687PXCAPCapId=0
1688PXCAPCapabilities=0
1689PXCAPDevCap2=0
1690PXCAPDevCapabilities=0
1691PXCAPDevCtrl=0
1692PXCAPDevCtrl2=0
1693PXCAPDevStatus=0
1694PXCAPLinkCap=0
1695PXCAPLinkCtrl=0
1696PXCAPLinkStatus=0
1697PXCAPNextCapability=0
1698ProgIF=133
1699Revision=0
1700Status=640
1701SubClassCode=1
1702SubsystemID=0
1703SubsystemVendorID=0
1704VendorID=32902
1705clk_domain=system.clk_domain
1706config_latency=20000
1707ctrl_offset=2
1708disks=
1709eventq_index=0
1710host=system.realview.pci_host
1711io_shift=2
1712pci_bus=2
1713pci_dev=0
1714pci_func=0
1715pio_latency=30000
1716system=system
1717dma=system.iobus.slave[2]
1718pio=system.iobus.master[9]
1719
1720[system.realview.clcd]
1721type=Pl111
1722amba_id=1315089
1723clk_domain=system.clk_domain
1724enable_capture=true
1725eventq_index=0
1726gic=system.realview.gic
1727int_num=46
1728pio_addr=471793664
1729pio_latency=10000
1730pixel_clock=41667
1731system=system
1732vnc=system.vncserver
1733dma=system.iobus.slave[1]
1734pio=system.iobus.master[5]
1735
1736[system.realview.dcc]
1737type=SubSystem
1738children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
1739eventq_index=0
1559[system.physmem]
1560type=DRAMCtrl
1561IDD0=0.075000
1562IDD02=0.000000
1563IDD2N=0.050000
1564IDD2N2=0.000000
1565IDD2P0=0.000000
1566IDD2P02=0.000000
1567IDD2P1=0.000000
1568IDD2P12=0.000000
1569IDD3N=0.057000
1570IDD3N2=0.000000
1571IDD3P0=0.000000
1572IDD3P02=0.000000
1573IDD3P1=0.000000
1574IDD3P12=0.000000
1575IDD4R=0.187000
1576IDD4R2=0.000000
1577IDD4W=0.165000
1578IDD4W2=0.000000
1579IDD5=0.220000
1580IDD52=0.000000
1581IDD6=0.000000
1582IDD62=0.000000
1583VDD=1.500000
1584VDD2=0.000000
1585activation_limit=4
1586addr_mapping=RoRaBaCoCh
1587bank_groups_per_rank=0
1588banks_per_rank=8
1589burst_length=8
1590channels=1
1591clk_domain=system.clk_domain
1592conf_table_reported=true
1593device_bus_width=8
1594device_rowbuffer_size=1024
1595device_size=536870912
1596devices_per_rank=8
1597dll=true
1598eventq_index=0
1599in_addr_map=true
1600max_accesses_per_row=16
1601mem_sched_policy=frfcfs
1602min_writes_per_switch=16
1603null=false
1604page_policy=open_adaptive
1605range=2147483648:2415919103
1606ranks_per_channel=2
1607read_buffer_size=32
1608static_backend_latency=10000
1609static_frontend_latency=10000
1610tBURST=5000
1611tCCD_L=0
1612tCK=1250
1613tCL=13750
1614tCS=2500
1615tRAS=35000
1616tRCD=13750
1617tREFI=7800000
1618tRFC=260000
1619tRP=13750
1620tRRD=6000
1621tRRD_L=0
1622tRTP=7500
1623tRTW=2500
1624tWR=15000
1625tWTR=7500
1626tXAW=30000
1627tXP=0
1628tXPDLL=0
1629tXS=0
1630tXSDLL=0
1631write_buffer_size=64
1632write_high_thresh_perc=85
1633write_low_thresh_perc=50
1634port=system.membus.master[5]
1635
1636[system.realview]
1637type=RealView
1638children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
1639eventq_index=0
1640intrctrl=system.intrctrl
1641system=system
1642
1643[system.realview.aaci_fake]
1644type=AmbaFake
1645amba_id=0
1646clk_domain=system.clk_domain
1647eventq_index=0
1648ignore_access=false
1649pio_addr=470024192
1650pio_latency=100000
1651system=system
1652pio=system.iobus.master[18]
1653
1654[system.realview.cf_ctrl]
1655type=IdeController
1656BAR0=471465984
1657BAR0LegacyIO=true
1658BAR0Size=256
1659BAR1=471466240
1660BAR1LegacyIO=true
1661BAR1Size=4096
1662BAR2=1
1663BAR2LegacyIO=false
1664BAR2Size=8
1665BAR3=1
1666BAR3LegacyIO=false
1667BAR3Size=4
1668BAR4=1
1669BAR4LegacyIO=false
1670BAR4Size=16
1671BAR5=1
1672BAR5LegacyIO=false
1673BAR5Size=0
1674BIST=0
1675CacheLineSize=0
1676CapabilityPtr=0
1677CardbusCIS=0
1678ClassCode=1
1679Command=1
1680DeviceID=28945
1681ExpansionROM=0
1682HeaderType=0
1683InterruptLine=31
1684InterruptPin=1
1685LatencyTimer=0
1686LegacyIOBase=0
1687MSICAPBaseOffset=0
1688MSICAPCapId=0
1689MSICAPMaskBits=0
1690MSICAPMsgAddr=0
1691MSICAPMsgCtrl=0
1692MSICAPMsgData=0
1693MSICAPMsgUpperAddr=0
1694MSICAPNextCapability=0
1695MSICAPPendingBits=0
1696MSIXCAPBaseOffset=0
1697MSIXCAPCapId=0
1698MSIXCAPNextCapability=0
1699MSIXMsgCtrl=0
1700MSIXPbaOffset=0
1701MSIXTableOffset=0
1702MaximumLatency=0
1703MinimumGrant=0
1704PMCAPBaseOffset=0
1705PMCAPCapId=0
1706PMCAPCapabilities=0
1707PMCAPCtrlStatus=0
1708PMCAPNextCapability=0
1709PXCAPBaseOffset=0
1710PXCAPCapId=0
1711PXCAPCapabilities=0
1712PXCAPDevCap2=0
1713PXCAPDevCapabilities=0
1714PXCAPDevCtrl=0
1715PXCAPDevCtrl2=0
1716PXCAPDevStatus=0
1717PXCAPLinkCap=0
1718PXCAPLinkCtrl=0
1719PXCAPLinkStatus=0
1720PXCAPNextCapability=0
1721ProgIF=133
1722Revision=0
1723Status=640
1724SubClassCode=1
1725SubsystemID=0
1726SubsystemVendorID=0
1727VendorID=32902
1728clk_domain=system.clk_domain
1729config_latency=20000
1730ctrl_offset=2
1731disks=
1732eventq_index=0
1733host=system.realview.pci_host
1734io_shift=2
1735pci_bus=2
1736pci_dev=0
1737pci_func=0
1738pio_latency=30000
1739system=system
1740dma=system.iobus.slave[2]
1741pio=system.iobus.master[9]
1742
1743[system.realview.clcd]
1744type=Pl111
1745amba_id=1315089
1746clk_domain=system.clk_domain
1747enable_capture=true
1748eventq_index=0
1749gic=system.realview.gic
1750int_num=46
1751pio_addr=471793664
1752pio_latency=10000
1753pixel_clock=41667
1754system=system
1755vnc=system.vncserver
1756dma=system.iobus.slave[1]
1757pio=system.iobus.master[5]
1758
1759[system.realview.dcc]
1760type=SubSystem
1761children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
1762eventq_index=0
1763thermal_domain=Null
1740
1741[system.realview.dcc.osc_cpu]
1742type=RealViewOsc
1743dcc=0
1744device=0
1745eventq_index=0
1746freq=16667
1747parent=system.realview.realview_io
1748position=0
1749site=1
1750voltage_domain=system.voltage_domain
1751
1752[system.realview.dcc.osc_ddr]
1753type=RealViewOsc
1754dcc=0
1755device=8
1756eventq_index=0
1757freq=25000
1758parent=system.realview.realview_io
1759position=0
1760site=1
1761voltage_domain=system.voltage_domain
1762
1763[system.realview.dcc.osc_hsbm]
1764type=RealViewOsc
1765dcc=0
1766device=4
1767eventq_index=0
1768freq=25000
1769parent=system.realview.realview_io
1770position=0
1771site=1
1772voltage_domain=system.voltage_domain
1773
1774[system.realview.dcc.osc_pxl]
1775type=RealViewOsc
1776dcc=0
1777device=5
1778eventq_index=0
1779freq=42105
1780parent=system.realview.realview_io
1781position=0
1782site=1
1783voltage_domain=system.voltage_domain
1784
1785[system.realview.dcc.osc_smb]
1786type=RealViewOsc
1787dcc=0
1788device=6
1789eventq_index=0
1790freq=20000
1791parent=system.realview.realview_io
1792position=0
1793site=1
1794voltage_domain=system.voltage_domain
1795
1796[system.realview.dcc.osc_sys]
1797type=RealViewOsc
1798dcc=0
1799device=7
1800eventq_index=0
1801freq=16667
1802parent=system.realview.realview_io
1803position=0
1804site=1
1805voltage_domain=system.voltage_domain
1806
1807[system.realview.energy_ctrl]
1808type=EnergyCtrl
1809clk_domain=system.clk_domain
1810dvfs_handler=system.dvfs_handler
1811eventq_index=0
1812pio_addr=470286336
1813pio_latency=100000
1814system=system
1815pio=system.iobus.master[22]
1816
1817[system.realview.ethernet]
1818type=IGbE
1819BAR0=0
1820BAR0LegacyIO=false
1821BAR0Size=131072
1822BAR1=0
1823BAR1LegacyIO=false
1824BAR1Size=0
1825BAR2=0
1826BAR2LegacyIO=false
1827BAR2Size=0
1828BAR3=0
1829BAR3LegacyIO=false
1830BAR3Size=0
1831BAR4=0
1832BAR4LegacyIO=false
1833BAR4Size=0
1834BAR5=0
1835BAR5LegacyIO=false
1836BAR5Size=0
1837BIST=0
1838CacheLineSize=0
1839CapabilityPtr=0
1840CardbusCIS=0
1841ClassCode=2
1842Command=0
1843DeviceID=4213
1844ExpansionROM=0
1845HeaderType=0
1846InterruptLine=1
1847InterruptPin=1
1848LatencyTimer=0
1849LegacyIOBase=0
1850MSICAPBaseOffset=0
1851MSICAPCapId=0
1852MSICAPMaskBits=0
1853MSICAPMsgAddr=0
1854MSICAPMsgCtrl=0
1855MSICAPMsgData=0
1856MSICAPMsgUpperAddr=0
1857MSICAPNextCapability=0
1858MSICAPPendingBits=0
1859MSIXCAPBaseOffset=0
1860MSIXCAPCapId=0
1861MSIXCAPNextCapability=0
1862MSIXMsgCtrl=0
1863MSIXPbaOffset=0
1864MSIXTableOffset=0
1865MaximumLatency=0
1866MinimumGrant=255
1867PMCAPBaseOffset=0
1868PMCAPCapId=0
1869PMCAPCapabilities=0
1870PMCAPCtrlStatus=0
1871PMCAPNextCapability=0
1872PXCAPBaseOffset=0
1873PXCAPCapId=0
1874PXCAPCapabilities=0
1875PXCAPDevCap2=0
1876PXCAPDevCapabilities=0
1877PXCAPDevCtrl=0
1878PXCAPDevCtrl2=0
1879PXCAPDevStatus=0
1880PXCAPLinkCap=0
1881PXCAPLinkCtrl=0
1882PXCAPLinkStatus=0
1883PXCAPNextCapability=0
1884ProgIF=0
1885Revision=0
1886Status=0
1887SubClassCode=0
1888SubsystemID=4104
1889SubsystemVendorID=32902
1890VendorID=32902
1891clk_domain=system.clk_domain
1892config_latency=20000
1893eventq_index=0
1894fetch_comp_delay=10000
1895fetch_delay=10000
1896hardware_address=00:90:00:00:00:01
1897host=system.realview.pci_host
1898pci_bus=0
1899pci_dev=0
1900pci_func=0
1901phy_epid=896
1902phy_pid=680
1903pio_latency=30000
1904rx_desc_cache_size=64
1905rx_fifo_size=393216
1906rx_write_delay=0
1907system=system
1908tx_desc_cache_size=64
1909tx_fifo_size=393216
1910tx_read_delay=0
1911wb_comp_delay=10000
1912wb_delay=10000
1913dma=system.iobus.slave[4]
1914pio=system.iobus.master[24]
1915
1916[system.realview.generic_timer]
1917type=GenericTimer
1918eventq_index=0
1919gic=system.realview.gic
1920int_phys=29
1921int_virt=27
1922system=system
1923
1924[system.realview.gic]
1925type=Pl390
1926clk_domain=system.clk_domain
1927cpu_addr=738205696
1928cpu_pio_delay=10000
1929dist_addr=738201600
1930dist_pio_delay=10000
1931eventq_index=0
1764
1765[system.realview.dcc.osc_cpu]
1766type=RealViewOsc
1767dcc=0
1768device=0
1769eventq_index=0
1770freq=16667
1771parent=system.realview.realview_io
1772position=0
1773site=1
1774voltage_domain=system.voltage_domain
1775
1776[system.realview.dcc.osc_ddr]
1777type=RealViewOsc
1778dcc=0
1779device=8
1780eventq_index=0
1781freq=25000
1782parent=system.realview.realview_io
1783position=0
1784site=1
1785voltage_domain=system.voltage_domain
1786
1787[system.realview.dcc.osc_hsbm]
1788type=RealViewOsc
1789dcc=0
1790device=4
1791eventq_index=0
1792freq=25000
1793parent=system.realview.realview_io
1794position=0
1795site=1
1796voltage_domain=system.voltage_domain
1797
1798[system.realview.dcc.osc_pxl]
1799type=RealViewOsc
1800dcc=0
1801device=5
1802eventq_index=0
1803freq=42105
1804parent=system.realview.realview_io
1805position=0
1806site=1
1807voltage_domain=system.voltage_domain
1808
1809[system.realview.dcc.osc_smb]
1810type=RealViewOsc
1811dcc=0
1812device=6
1813eventq_index=0
1814freq=20000
1815parent=system.realview.realview_io
1816position=0
1817site=1
1818voltage_domain=system.voltage_domain
1819
1820[system.realview.dcc.osc_sys]
1821type=RealViewOsc
1822dcc=0
1823device=7
1824eventq_index=0
1825freq=16667
1826parent=system.realview.realview_io
1827position=0
1828site=1
1829voltage_domain=system.voltage_domain
1830
1831[system.realview.energy_ctrl]
1832type=EnergyCtrl
1833clk_domain=system.clk_domain
1834dvfs_handler=system.dvfs_handler
1835eventq_index=0
1836pio_addr=470286336
1837pio_latency=100000
1838system=system
1839pio=system.iobus.master[22]
1840
1841[system.realview.ethernet]
1842type=IGbE
1843BAR0=0
1844BAR0LegacyIO=false
1845BAR0Size=131072
1846BAR1=0
1847BAR1LegacyIO=false
1848BAR1Size=0
1849BAR2=0
1850BAR2LegacyIO=false
1851BAR2Size=0
1852BAR3=0
1853BAR3LegacyIO=false
1854BAR3Size=0
1855BAR4=0
1856BAR4LegacyIO=false
1857BAR4Size=0
1858BAR5=0
1859BAR5LegacyIO=false
1860BAR5Size=0
1861BIST=0
1862CacheLineSize=0
1863CapabilityPtr=0
1864CardbusCIS=0
1865ClassCode=2
1866Command=0
1867DeviceID=4213
1868ExpansionROM=0
1869HeaderType=0
1870InterruptLine=1
1871InterruptPin=1
1872LatencyTimer=0
1873LegacyIOBase=0
1874MSICAPBaseOffset=0
1875MSICAPCapId=0
1876MSICAPMaskBits=0
1877MSICAPMsgAddr=0
1878MSICAPMsgCtrl=0
1879MSICAPMsgData=0
1880MSICAPMsgUpperAddr=0
1881MSICAPNextCapability=0
1882MSICAPPendingBits=0
1883MSIXCAPBaseOffset=0
1884MSIXCAPCapId=0
1885MSIXCAPNextCapability=0
1886MSIXMsgCtrl=0
1887MSIXPbaOffset=0
1888MSIXTableOffset=0
1889MaximumLatency=0
1890MinimumGrant=255
1891PMCAPBaseOffset=0
1892PMCAPCapId=0
1893PMCAPCapabilities=0
1894PMCAPCtrlStatus=0
1895PMCAPNextCapability=0
1896PXCAPBaseOffset=0
1897PXCAPCapId=0
1898PXCAPCapabilities=0
1899PXCAPDevCap2=0
1900PXCAPDevCapabilities=0
1901PXCAPDevCtrl=0
1902PXCAPDevCtrl2=0
1903PXCAPDevStatus=0
1904PXCAPLinkCap=0
1905PXCAPLinkCtrl=0
1906PXCAPLinkStatus=0
1907PXCAPNextCapability=0
1908ProgIF=0
1909Revision=0
1910Status=0
1911SubClassCode=0
1912SubsystemID=4104
1913SubsystemVendorID=32902
1914VendorID=32902
1915clk_domain=system.clk_domain
1916config_latency=20000
1917eventq_index=0
1918fetch_comp_delay=10000
1919fetch_delay=10000
1920hardware_address=00:90:00:00:00:01
1921host=system.realview.pci_host
1922pci_bus=0
1923pci_dev=0
1924pci_func=0
1925phy_epid=896
1926phy_pid=680
1927pio_latency=30000
1928rx_desc_cache_size=64
1929rx_fifo_size=393216
1930rx_write_delay=0
1931system=system
1932tx_desc_cache_size=64
1933tx_fifo_size=393216
1934tx_read_delay=0
1935wb_comp_delay=10000
1936wb_delay=10000
1937dma=system.iobus.slave[4]
1938pio=system.iobus.master[24]
1939
1940[system.realview.generic_timer]
1941type=GenericTimer
1942eventq_index=0
1943gic=system.realview.gic
1944int_phys=29
1945int_virt=27
1946system=system
1947
1948[system.realview.gic]
1949type=Pl390
1950clk_domain=system.clk_domain
1951cpu_addr=738205696
1952cpu_pio_delay=10000
1953dist_addr=738201600
1954dist_pio_delay=10000
1955eventq_index=0
1956gem5_extensions=true
1932int_latency=10000
1933it_lines=128
1934platform=system.realview
1935system=system
1936pio=system.membus.master[2]
1937
1938[system.realview.hdlcd]
1939type=HDLcd
1940amba_id=1314816
1941clk_domain=system.clk_domain
1942enable_capture=true
1943eventq_index=0
1944gic=system.realview.gic
1945int_num=117
1946pio_addr=721420288
1947pio_latency=10000
1948pixel_buffer_size=2048
1949pixel_chunk=32
1950pxl_clk=system.realview.dcc.osc_pxl
1951system=system
1952vnc=system.vncserver
1953workaround_dma_line_count=true
1954workaround_swap_rb=true
1955dma=system.membus.slave[0]
1956pio=system.iobus.master[6]
1957
1958[system.realview.ide]
1959type=IdeController
1960BAR0=1
1961BAR0LegacyIO=false
1962BAR0Size=8
1963BAR1=1
1964BAR1LegacyIO=false
1965BAR1Size=4
1966BAR2=1
1967BAR2LegacyIO=false
1968BAR2Size=8
1969BAR3=1
1970BAR3LegacyIO=false
1971BAR3Size=4
1972BAR4=1
1973BAR4LegacyIO=false
1974BAR4Size=16
1975BAR5=1
1976BAR5LegacyIO=false
1977BAR5Size=0
1978BIST=0
1979CacheLineSize=0
1980CapabilityPtr=0
1981CardbusCIS=0
1982ClassCode=1
1983Command=0
1984DeviceID=28945
1985ExpansionROM=0
1986HeaderType=0
1987InterruptLine=2
1988InterruptPin=2
1989LatencyTimer=0
1990LegacyIOBase=0
1991MSICAPBaseOffset=0
1992MSICAPCapId=0
1993MSICAPMaskBits=0
1994MSICAPMsgAddr=0
1995MSICAPMsgCtrl=0
1996MSICAPMsgData=0
1997MSICAPMsgUpperAddr=0
1998MSICAPNextCapability=0
1999MSICAPPendingBits=0
2000MSIXCAPBaseOffset=0
2001MSIXCAPCapId=0
2002MSIXCAPNextCapability=0
2003MSIXMsgCtrl=0
2004MSIXPbaOffset=0
2005MSIXTableOffset=0
2006MaximumLatency=0
2007MinimumGrant=0
2008PMCAPBaseOffset=0
2009PMCAPCapId=0
2010PMCAPCapabilities=0
2011PMCAPCtrlStatus=0
2012PMCAPNextCapability=0
2013PXCAPBaseOffset=0
2014PXCAPCapId=0
2015PXCAPCapabilities=0
2016PXCAPDevCap2=0
2017PXCAPDevCapabilities=0
2018PXCAPDevCtrl=0
2019PXCAPDevCtrl2=0
2020PXCAPDevStatus=0
2021PXCAPLinkCap=0
2022PXCAPLinkCtrl=0
2023PXCAPLinkStatus=0
2024PXCAPNextCapability=0
2025ProgIF=133
2026Revision=0
2027Status=640
2028SubClassCode=1
2029SubsystemID=0
2030SubsystemVendorID=0
2031VendorID=32902
2032clk_domain=system.clk_domain
2033config_latency=20000
2034ctrl_offset=0
2035disks=system.cf0
2036eventq_index=0
2037host=system.realview.pci_host
2038io_shift=0
2039pci_bus=0
2040pci_dev=1
2041pci_func=0
2042pio_latency=30000
2043system=system
2044dma=system.iobus.slave[3]
2045pio=system.iobus.master[23]
2046
2047[system.realview.kmi0]
2048type=Pl050
2049amba_id=1314896
2050clk_domain=system.clk_domain
2051eventq_index=0
2052gic=system.realview.gic
2053int_delay=1000000
2054int_num=44
2055is_mouse=false
2056pio_addr=470155264
2057pio_latency=100000
2058system=system
2059vnc=system.vncserver
2060pio=system.iobus.master[7]
2061
2062[system.realview.kmi1]
2063type=Pl050
2064amba_id=1314896
2065clk_domain=system.clk_domain
2066eventq_index=0
2067gic=system.realview.gic
2068int_delay=1000000
2069int_num=45
2070is_mouse=true
2071pio_addr=470220800
2072pio_latency=100000
2073system=system
2074vnc=system.vncserver
2075pio=system.iobus.master[8]
2076
2077[system.realview.l2x0_fake]
2078type=IsaFake
2079clk_domain=system.clk_domain
2080eventq_index=0
2081fake_mem=false
2082pio_addr=739246080
2083pio_latency=100000
2084pio_size=4095
2085ret_bad_addr=false
2086ret_data16=65535
2087ret_data32=4294967295
2088ret_data64=18446744073709551615
2089ret_data8=255
2090system=system
2091update_data=false
2092warn_access=
2093pio=system.iobus.master[12]
2094
2095[system.realview.lan_fake]
2096type=IsaFake
2097clk_domain=system.clk_domain
2098eventq_index=0
2099fake_mem=false
2100pio_addr=436207616
2101pio_latency=100000
2102pio_size=65535
2103ret_bad_addr=false
2104ret_data16=65535
2105ret_data32=4294967295
2106ret_data64=18446744073709551615
2107ret_data8=255
2108system=system
2109update_data=false
2110warn_access=
2111pio=system.iobus.master[19]
2112
2113[system.realview.local_cpu_timer]
2114type=CpuLocalTimer
2115clk_domain=system.clk_domain
2116eventq_index=0
2117gic=system.realview.gic
2118int_num_timer=29
2119int_num_watchdog=30
2120pio_addr=738721792
2121pio_latency=100000
2122system=system
2123pio=system.membus.master[4]
2124
2125[system.realview.mcc]
2126type=SubSystem
1957int_latency=10000
1958it_lines=128
1959platform=system.realview
1960system=system
1961pio=system.membus.master[2]
1962
1963[system.realview.hdlcd]
1964type=HDLcd
1965amba_id=1314816
1966clk_domain=system.clk_domain
1967enable_capture=true
1968eventq_index=0
1969gic=system.realview.gic
1970int_num=117
1971pio_addr=721420288
1972pio_latency=10000
1973pixel_buffer_size=2048
1974pixel_chunk=32
1975pxl_clk=system.realview.dcc.osc_pxl
1976system=system
1977vnc=system.vncserver
1978workaround_dma_line_count=true
1979workaround_swap_rb=true
1980dma=system.membus.slave[0]
1981pio=system.iobus.master[6]
1982
1983[system.realview.ide]
1984type=IdeController
1985BAR0=1
1986BAR0LegacyIO=false
1987BAR0Size=8
1988BAR1=1
1989BAR1LegacyIO=false
1990BAR1Size=4
1991BAR2=1
1992BAR2LegacyIO=false
1993BAR2Size=8
1994BAR3=1
1995BAR3LegacyIO=false
1996BAR3Size=4
1997BAR4=1
1998BAR4LegacyIO=false
1999BAR4Size=16
2000BAR5=1
2001BAR5LegacyIO=false
2002BAR5Size=0
2003BIST=0
2004CacheLineSize=0
2005CapabilityPtr=0
2006CardbusCIS=0
2007ClassCode=1
2008Command=0
2009DeviceID=28945
2010ExpansionROM=0
2011HeaderType=0
2012InterruptLine=2
2013InterruptPin=2
2014LatencyTimer=0
2015LegacyIOBase=0
2016MSICAPBaseOffset=0
2017MSICAPCapId=0
2018MSICAPMaskBits=0
2019MSICAPMsgAddr=0
2020MSICAPMsgCtrl=0
2021MSICAPMsgData=0
2022MSICAPMsgUpperAddr=0
2023MSICAPNextCapability=0
2024MSICAPPendingBits=0
2025MSIXCAPBaseOffset=0
2026MSIXCAPCapId=0
2027MSIXCAPNextCapability=0
2028MSIXMsgCtrl=0
2029MSIXPbaOffset=0
2030MSIXTableOffset=0
2031MaximumLatency=0
2032MinimumGrant=0
2033PMCAPBaseOffset=0
2034PMCAPCapId=0
2035PMCAPCapabilities=0
2036PMCAPCtrlStatus=0
2037PMCAPNextCapability=0
2038PXCAPBaseOffset=0
2039PXCAPCapId=0
2040PXCAPCapabilities=0
2041PXCAPDevCap2=0
2042PXCAPDevCapabilities=0
2043PXCAPDevCtrl=0
2044PXCAPDevCtrl2=0
2045PXCAPDevStatus=0
2046PXCAPLinkCap=0
2047PXCAPLinkCtrl=0
2048PXCAPLinkStatus=0
2049PXCAPNextCapability=0
2050ProgIF=133
2051Revision=0
2052Status=640
2053SubClassCode=1
2054SubsystemID=0
2055SubsystemVendorID=0
2056VendorID=32902
2057clk_domain=system.clk_domain
2058config_latency=20000
2059ctrl_offset=0
2060disks=system.cf0
2061eventq_index=0
2062host=system.realview.pci_host
2063io_shift=0
2064pci_bus=0
2065pci_dev=1
2066pci_func=0
2067pio_latency=30000
2068system=system
2069dma=system.iobus.slave[3]
2070pio=system.iobus.master[23]
2071
2072[system.realview.kmi0]
2073type=Pl050
2074amba_id=1314896
2075clk_domain=system.clk_domain
2076eventq_index=0
2077gic=system.realview.gic
2078int_delay=1000000
2079int_num=44
2080is_mouse=false
2081pio_addr=470155264
2082pio_latency=100000
2083system=system
2084vnc=system.vncserver
2085pio=system.iobus.master[7]
2086
2087[system.realview.kmi1]
2088type=Pl050
2089amba_id=1314896
2090clk_domain=system.clk_domain
2091eventq_index=0
2092gic=system.realview.gic
2093int_delay=1000000
2094int_num=45
2095is_mouse=true
2096pio_addr=470220800
2097pio_latency=100000
2098system=system
2099vnc=system.vncserver
2100pio=system.iobus.master[8]
2101
2102[system.realview.l2x0_fake]
2103type=IsaFake
2104clk_domain=system.clk_domain
2105eventq_index=0
2106fake_mem=false
2107pio_addr=739246080
2108pio_latency=100000
2109pio_size=4095
2110ret_bad_addr=false
2111ret_data16=65535
2112ret_data32=4294967295
2113ret_data64=18446744073709551615
2114ret_data8=255
2115system=system
2116update_data=false
2117warn_access=
2118pio=system.iobus.master[12]
2119
2120[system.realview.lan_fake]
2121type=IsaFake
2122clk_domain=system.clk_domain
2123eventq_index=0
2124fake_mem=false
2125pio_addr=436207616
2126pio_latency=100000
2127pio_size=65535
2128ret_bad_addr=false
2129ret_data16=65535
2130ret_data32=4294967295
2131ret_data64=18446744073709551615
2132ret_data8=255
2133system=system
2134update_data=false
2135warn_access=
2136pio=system.iobus.master[19]
2137
2138[system.realview.local_cpu_timer]
2139type=CpuLocalTimer
2140clk_domain=system.clk_domain
2141eventq_index=0
2142gic=system.realview.gic
2143int_num_timer=29
2144int_num_watchdog=30
2145pio_addr=738721792
2146pio_latency=100000
2147system=system
2148pio=system.membus.master[4]
2149
2150[system.realview.mcc]
2151type=SubSystem
2127children=osc_clcd osc_mcc osc_peripheral osc_system_bus
2152children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl
2128eventq_index=0
2153eventq_index=0
2154thermal_domain=Null
2129
2130[system.realview.mcc.osc_clcd]
2131type=RealViewOsc
2132dcc=0
2133device=1
2134eventq_index=0
2135freq=42105
2136parent=system.realview.realview_io
2137position=0
2138site=0
2139voltage_domain=system.voltage_domain
2140
2141[system.realview.mcc.osc_mcc]
2142type=RealViewOsc
2143dcc=0
2144device=0
2145eventq_index=0
2146freq=20000
2147parent=system.realview.realview_io
2148position=0
2149site=0
2150voltage_domain=system.voltage_domain
2151
2152[system.realview.mcc.osc_peripheral]
2153type=RealViewOsc
2154dcc=0
2155device=2
2156eventq_index=0
2157freq=41667
2158parent=system.realview.realview_io
2159position=0
2160site=0
2161voltage_domain=system.voltage_domain
2162
2163[system.realview.mcc.osc_system_bus]
2164type=RealViewOsc
2165dcc=0
2166device=4
2167eventq_index=0
2168freq=41667
2169parent=system.realview.realview_io
2170position=0
2171site=0
2172voltage_domain=system.voltage_domain
2173
2155
2156[system.realview.mcc.osc_clcd]
2157type=RealViewOsc
2158dcc=0
2159device=1
2160eventq_index=0
2161freq=42105
2162parent=system.realview.realview_io
2163position=0
2164site=0
2165voltage_domain=system.voltage_domain
2166
2167[system.realview.mcc.osc_mcc]
2168type=RealViewOsc
2169dcc=0
2170device=0
2171eventq_index=0
2172freq=20000
2173parent=system.realview.realview_io
2174position=0
2175site=0
2176voltage_domain=system.voltage_domain
2177
2178[system.realview.mcc.osc_peripheral]
2179type=RealViewOsc
2180dcc=0
2181device=2
2182eventq_index=0
2183freq=41667
2184parent=system.realview.realview_io
2185position=0
2186site=0
2187voltage_domain=system.voltage_domain
2188
2189[system.realview.mcc.osc_system_bus]
2190type=RealViewOsc
2191dcc=0
2192device=4
2193eventq_index=0
2194freq=41667
2195parent=system.realview.realview_io
2196position=0
2197site=0
2198voltage_domain=system.voltage_domain
2199
2200[system.realview.mcc.temp_crtl]
2201type=RealViewTemperatureSensor
2202dcc=0
2203device=0
2204eventq_index=0
2205parent=system.realview.realview_io
2206position=0
2207site=0
2208system=system
2209
2174[system.realview.mmc_fake]
2175type=AmbaFake
2176amba_id=0
2177clk_domain=system.clk_domain
2178eventq_index=0
2179ignore_access=false
2180pio_addr=470089728
2181pio_latency=100000
2182system=system
2183pio=system.iobus.master[21]
2184
2185[system.realview.nvmem]
2186type=SimpleMemory
2187bandwidth=73.000000
2188clk_domain=system.clk_domain
2189conf_table_reported=false
2190eventq_index=0
2191in_addr_map=true
2192latency=30000
2193latency_var=0
2194null=false
2195range=0:67108863
2196port=system.membus.master[1]
2197
2198[system.realview.pci_host]
2199type=GenericPciHost
2200clk_domain=system.clk_domain
2201conf_base=805306368
2202conf_device_bits=16
2203conf_size=268435456
2204eventq_index=0
2205pci_dma_base=0
2206pci_mem_base=0
2207pci_pio_base=0
2208platform=system.realview
2209system=system
2210pio=system.iobus.master[2]
2211
2212[system.realview.realview_io]
2213type=RealViewCtrl
2214clk_domain=system.clk_domain
2215eventq_index=0
2216idreg=35979264
2217pio_addr=469827584
2218pio_latency=100000
2219proc_id0=335544320
2220proc_id1=335544320
2221system=system
2222pio=system.iobus.master[1]
2223
2224[system.realview.rtc]
2225type=PL031
2226amba_id=3412017
2227clk_domain=system.clk_domain
2228eventq_index=0
2229gic=system.realview.gic
2230int_delay=100000
2231int_num=36
2232pio_addr=471269376
2233pio_latency=100000
2234system=system
2235time=Thu Jan 1 00:00:00 2009
2236pio=system.iobus.master[10]
2237
2238[system.realview.sp810_fake]
2239type=AmbaFake
2240amba_id=0
2241clk_domain=system.clk_domain
2242eventq_index=0
2243ignore_access=true
2244pio_addr=469893120
2245pio_latency=100000
2246system=system
2247pio=system.iobus.master[16]
2248
2249[system.realview.timer0]
2250type=Sp804
2251amba_id=1316868
2252clk_domain=system.clk_domain
2253clock0=1000000
2254clock1=1000000
2255eventq_index=0
2256gic=system.realview.gic
2257int_num0=34
2258int_num1=34
2259pio_addr=470876160
2260pio_latency=100000
2261system=system
2262pio=system.iobus.master[3]
2263
2264[system.realview.timer1]
2265type=Sp804
2266amba_id=1316868
2267clk_domain=system.clk_domain
2268clock0=1000000
2269clock1=1000000
2270eventq_index=0
2271gic=system.realview.gic
2272int_num0=35
2273int_num1=35
2274pio_addr=470941696
2275pio_latency=100000
2276system=system
2277pio=system.iobus.master[4]
2278
2279[system.realview.uart]
2280type=Pl011
2281clk_domain=system.clk_domain
2282end_on_eot=false
2283eventq_index=0
2284gic=system.realview.gic
2285int_delay=100000
2286int_num=37
2287pio_addr=470351872
2288pio_latency=100000
2289platform=system.realview
2290system=system
2291terminal=system.terminal
2292pio=system.iobus.master[0]
2293
2294[system.realview.uart1_fake]
2295type=AmbaFake
2296amba_id=0
2297clk_domain=system.clk_domain
2298eventq_index=0
2299ignore_access=false
2300pio_addr=470417408
2301pio_latency=100000
2302system=system
2303pio=system.iobus.master[13]
2304
2305[system.realview.uart2_fake]
2306type=AmbaFake
2307amba_id=0
2308clk_domain=system.clk_domain
2309eventq_index=0
2310ignore_access=false
2311pio_addr=470482944
2312pio_latency=100000
2313system=system
2314pio=system.iobus.master[14]
2315
2316[system.realview.uart3_fake]
2317type=AmbaFake
2318amba_id=0
2319clk_domain=system.clk_domain
2320eventq_index=0
2321ignore_access=false
2322pio_addr=470548480
2323pio_latency=100000
2324system=system
2325pio=system.iobus.master[15]
2326
2327[system.realview.usb_fake]
2328type=IsaFake
2329clk_domain=system.clk_domain
2330eventq_index=0
2331fake_mem=false
2332pio_addr=452984832
2333pio_latency=100000
2334pio_size=131071
2335ret_bad_addr=false
2336ret_data16=65535
2337ret_data32=4294967295
2338ret_data64=18446744073709551615
2339ret_data8=255
2340system=system
2341update_data=false
2342warn_access=
2343pio=system.iobus.master[20]
2344
2345[system.realview.vgic]
2346type=VGic
2347clk_domain=system.clk_domain
2348eventq_index=0
2349gic=system.realview.gic
2350hv_addr=738213888
2351pio_delay=10000
2352platform=system.realview
2353ppint=25
2354system=system
2355vcpu_addr=738222080
2356pio=system.membus.master[3]
2357
2358[system.realview.vram]
2359type=SimpleMemory
2360bandwidth=73.000000
2361clk_domain=system.clk_domain
2362conf_table_reported=false
2363eventq_index=0
2364in_addr_map=true
2365latency=30000
2366latency_var=0
2367null=false
2368range=402653184:436207615
2369port=system.iobus.master[11]
2370
2371[system.realview.watchdog_fake]
2372type=AmbaFake
2373amba_id=0
2374clk_domain=system.clk_domain
2375eventq_index=0
2376ignore_access=false
2377pio_addr=470745088
2378pio_latency=100000
2379system=system
2380pio=system.iobus.master[17]
2381
2382[system.terminal]
2383type=Terminal
2384eventq_index=0
2385intr_control=system.intrctrl
2386number=0
2387output=true
2388port=3456
2389
2390[system.toL2Bus]
2391type=CoherentXBar
2392children=snoop_filter
2393clk_domain=system.cpu_clk_domain
2394eventq_index=0
2395forward_latency=0
2396frontend_latency=1
2397point_of_coherency=false
2398response_latency=1
2399snoop_filter=system.toL2Bus.snoop_filter
2400snoop_response_latency=1
2401system=system
2402use_default_range=false
2403width=32
2404master=system.l2c.cpu_side
2405slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
2406
2407[system.toL2Bus.snoop_filter]
2408type=SnoopFilter
2409eventq_index=0
2410lookup_latency=0
2411max_capacity=8388608
2412system=system
2413
2414[system.vncserver]
2415type=VncServer
2416eventq_index=0
2417frame_capture=false
2418number=0
2419port=5900
2420
2421[system.voltage_domain]
2422type=VoltageDomain
2423eventq_index=0
2424voltage=1.000000
2425
2210[system.realview.mmc_fake]
2211type=AmbaFake
2212amba_id=0
2213clk_domain=system.clk_domain
2214eventq_index=0
2215ignore_access=false
2216pio_addr=470089728
2217pio_latency=100000
2218system=system
2219pio=system.iobus.master[21]
2220
2221[system.realview.nvmem]
2222type=SimpleMemory
2223bandwidth=73.000000
2224clk_domain=system.clk_domain
2225conf_table_reported=false
2226eventq_index=0
2227in_addr_map=true
2228latency=30000
2229latency_var=0
2230null=false
2231range=0:67108863
2232port=system.membus.master[1]
2233
2234[system.realview.pci_host]
2235type=GenericPciHost
2236clk_domain=system.clk_domain
2237conf_base=805306368
2238conf_device_bits=16
2239conf_size=268435456
2240eventq_index=0
2241pci_dma_base=0
2242pci_mem_base=0
2243pci_pio_base=0
2244platform=system.realview
2245system=system
2246pio=system.iobus.master[2]
2247
2248[system.realview.realview_io]
2249type=RealViewCtrl
2250clk_domain=system.clk_domain
2251eventq_index=0
2252idreg=35979264
2253pio_addr=469827584
2254pio_latency=100000
2255proc_id0=335544320
2256proc_id1=335544320
2257system=system
2258pio=system.iobus.master[1]
2259
2260[system.realview.rtc]
2261type=PL031
2262amba_id=3412017
2263clk_domain=system.clk_domain
2264eventq_index=0
2265gic=system.realview.gic
2266int_delay=100000
2267int_num=36
2268pio_addr=471269376
2269pio_latency=100000
2270system=system
2271time=Thu Jan 1 00:00:00 2009
2272pio=system.iobus.master[10]
2273
2274[system.realview.sp810_fake]
2275type=AmbaFake
2276amba_id=0
2277clk_domain=system.clk_domain
2278eventq_index=0
2279ignore_access=true
2280pio_addr=469893120
2281pio_latency=100000
2282system=system
2283pio=system.iobus.master[16]
2284
2285[system.realview.timer0]
2286type=Sp804
2287amba_id=1316868
2288clk_domain=system.clk_domain
2289clock0=1000000
2290clock1=1000000
2291eventq_index=0
2292gic=system.realview.gic
2293int_num0=34
2294int_num1=34
2295pio_addr=470876160
2296pio_latency=100000
2297system=system
2298pio=system.iobus.master[3]
2299
2300[system.realview.timer1]
2301type=Sp804
2302amba_id=1316868
2303clk_domain=system.clk_domain
2304clock0=1000000
2305clock1=1000000
2306eventq_index=0
2307gic=system.realview.gic
2308int_num0=35
2309int_num1=35
2310pio_addr=470941696
2311pio_latency=100000
2312system=system
2313pio=system.iobus.master[4]
2314
2315[system.realview.uart]
2316type=Pl011
2317clk_domain=system.clk_domain
2318end_on_eot=false
2319eventq_index=0
2320gic=system.realview.gic
2321int_delay=100000
2322int_num=37
2323pio_addr=470351872
2324pio_latency=100000
2325platform=system.realview
2326system=system
2327terminal=system.terminal
2328pio=system.iobus.master[0]
2329
2330[system.realview.uart1_fake]
2331type=AmbaFake
2332amba_id=0
2333clk_domain=system.clk_domain
2334eventq_index=0
2335ignore_access=false
2336pio_addr=470417408
2337pio_latency=100000
2338system=system
2339pio=system.iobus.master[13]
2340
2341[system.realview.uart2_fake]
2342type=AmbaFake
2343amba_id=0
2344clk_domain=system.clk_domain
2345eventq_index=0
2346ignore_access=false
2347pio_addr=470482944
2348pio_latency=100000
2349system=system
2350pio=system.iobus.master[14]
2351
2352[system.realview.uart3_fake]
2353type=AmbaFake
2354amba_id=0
2355clk_domain=system.clk_domain
2356eventq_index=0
2357ignore_access=false
2358pio_addr=470548480
2359pio_latency=100000
2360system=system
2361pio=system.iobus.master[15]
2362
2363[system.realview.usb_fake]
2364type=IsaFake
2365clk_domain=system.clk_domain
2366eventq_index=0
2367fake_mem=false
2368pio_addr=452984832
2369pio_latency=100000
2370pio_size=131071
2371ret_bad_addr=false
2372ret_data16=65535
2373ret_data32=4294967295
2374ret_data64=18446744073709551615
2375ret_data8=255
2376system=system
2377update_data=false
2378warn_access=
2379pio=system.iobus.master[20]
2380
2381[system.realview.vgic]
2382type=VGic
2383clk_domain=system.clk_domain
2384eventq_index=0
2385gic=system.realview.gic
2386hv_addr=738213888
2387pio_delay=10000
2388platform=system.realview
2389ppint=25
2390system=system
2391vcpu_addr=738222080
2392pio=system.membus.master[3]
2393
2394[system.realview.vram]
2395type=SimpleMemory
2396bandwidth=73.000000
2397clk_domain=system.clk_domain
2398conf_table_reported=false
2399eventq_index=0
2400in_addr_map=true
2401latency=30000
2402latency_var=0
2403null=false
2404range=402653184:436207615
2405port=system.iobus.master[11]
2406
2407[system.realview.watchdog_fake]
2408type=AmbaFake
2409amba_id=0
2410clk_domain=system.clk_domain
2411eventq_index=0
2412ignore_access=false
2413pio_addr=470745088
2414pio_latency=100000
2415system=system
2416pio=system.iobus.master[17]
2417
2418[system.terminal]
2419type=Terminal
2420eventq_index=0
2421intr_control=system.intrctrl
2422number=0
2423output=true
2424port=3456
2425
2426[system.toL2Bus]
2427type=CoherentXBar
2428children=snoop_filter
2429clk_domain=system.cpu_clk_domain
2430eventq_index=0
2431forward_latency=0
2432frontend_latency=1
2433point_of_coherency=false
2434response_latency=1
2435snoop_filter=system.toL2Bus.snoop_filter
2436snoop_response_latency=1
2437system=system
2438use_default_range=false
2439width=32
2440master=system.l2c.cpu_side
2441slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
2442
2443[system.toL2Bus.snoop_filter]
2444type=SnoopFilter
2445eventq_index=0
2446lookup_latency=0
2447max_capacity=8388608
2448system=system
2449
2450[system.vncserver]
2451type=VncServer
2452eventq_index=0
2453frame_capture=false
2454number=0
2455port=5900
2456
2457[system.voltage_domain]
2458type=VoltageDomain
2459eventq_index=0
2460voltage=1.000000
2461