1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728
|
15boot_loader=/dist/binaries/boot_emm.arm
| 15boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm
|
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain
| 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain
|
20dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
| 20dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
|
21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24flags_addr=469827632 25gic_cpu_addr=738205696 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0
| 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24flags_addr=469827632 25gic_cpu_addr=738205696 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0
|
33kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
| 33kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103
| 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103
|
40memories=system.physmem system.realview.vram system.realview.nvmem
| 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false
|
41multi_proc=true 42num_work_ids=16 43panic_on_oops=true 44panic_on_panic=true 45phys_addr_range_64=40
| 42multi_proc=true 43num_work_ids=16 44panic_on_oops=true 45panic_on_panic=true 46phys_addr_range_64=40
|
46readfile=/work/gem5.ext/tests/halt.sh
| 47readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
|
47reset_addr_64=0 48symbolfile= 49work_begin_ckpt_count=0 50work_begin_cpu_id_exit=-1 51work_begin_exit_count=0 52work_cpus_ckpt_count=0 53work_end_ckpt_count=0 54work_end_exit_count=0 55work_item_id=-1 56system_port=system.membus.slave[1] 57 58[system.bridge] 59type=Bridge 60clk_domain=system.clk_domain 61delay=50000 62eventq_index=0 63ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 64req_size=16 65resp_size=16 66master=system.iobus.slave[0] 67slave=system.membus.master[0] 68 69[system.cf0] 70type=IdeDisk 71children=image 72delay=1000000 73driveID=master 74eventq_index=0 75image=system.cf0.image 76 77[system.cf0.image] 78type=CowDiskImage 79children=child 80child=system.cf0.image.child 81eventq_index=0 82image_file= 83read_only=false 84table_size=65536 85 86[system.cf0.image.child] 87type=RawDiskImage 88eventq_index=0
| 48reset_addr_64=0 49symbolfile= 50work_begin_ckpt_count=0 51work_begin_cpu_id_exit=-1 52work_begin_exit_count=0 53work_cpus_ckpt_count=0 54work_end_ckpt_count=0 55work_end_exit_count=0 56work_item_id=-1 57system_port=system.membus.slave[1] 58 59[system.bridge] 60type=Bridge 61clk_domain=system.clk_domain 62delay=50000 63eventq_index=0 64ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 65req_size=16 66resp_size=16 67master=system.iobus.slave[0] 68slave=system.membus.master[0] 69 70[system.cf0] 71type=IdeDisk 72children=image 73delay=1000000 74driveID=master 75eventq_index=0 76image=system.cf0.image 77 78[system.cf0.image] 79type=CowDiskImage 80children=child 81child=system.cf0.image.child 82eventq_index=0 83image_file= 84read_only=false 85table_size=65536 86 87[system.cf0.image.child] 88type=RawDiskImage 89eventq_index=0
|
89image_file=/dist/disks/linux-aarch32-ael.img
| 90image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img
|
90read_only=true 91 92[system.clk_domain] 93type=SrcClockDomain 94clock=1000 95domain_id=-1 96eventq_index=0 97init_perf_level=0 98voltage_domain=system.voltage_domain 99 100[system.cpu0] 101type=DerivO3CPU 102children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 103LFSTSize=1024 104LQEntries=16 105LSQCheckLoads=true 106LSQDepCheckShift=0 107SQEntries=16 108SSITSize=1024 109activity=0 110backComSize=5 111branchPred=system.cpu0.branchPred 112cachePorts=200 113checker=Null 114clk_domain=system.cpu_clk_domain 115commitToDecodeDelay=1 116commitToFetchDelay=1 117commitToIEWDelay=1 118commitToRenameDelay=1 119commitWidth=8 120cpu_id=0 121decodeToFetchDelay=1 122decodeToRenameDelay=2 123decodeWidth=3 124dispatchWidth=6 125do_checkpoint_insts=true 126do_quiesce=true 127do_statistics_insts=true 128dstage2_mmu=system.cpu0.dstage2_mmu 129dtb=system.cpu0.dtb 130eventq_index=0 131fetchBufferSize=16 132fetchQueueSize=32 133fetchToDecodeDelay=3 134fetchTrapLatency=1 135fetchWidth=3 136forwardComSize=5 137fuPool=system.cpu0.fuPool 138function_trace=false 139function_trace_start=0 140iewToCommitDelay=1 141iewToDecodeDelay=1 142iewToFetchDelay=1 143iewToRenameDelay=1 144interrupts=system.cpu0.interrupts 145isa=system.cpu0.isa 146issueToExecuteDelay=1 147issueWidth=8 148istage2_mmu=system.cpu0.istage2_mmu 149itb=system.cpu0.itb 150max_insts_all_threads=0 151max_insts_any_thread=0 152max_loads_all_threads=0 153max_loads_any_thread=0 154needsTSO=false 155numIQEntries=32 156numPhysCCRegs=640 157numPhysFloatRegs=192 158numPhysIntRegs=128 159numROBEntries=40 160numRobs=1 161numThreads=1 162profile=0 163progress_interval=0 164renameToDecodeDelay=1 165renameToFetchDelay=1 166renameToIEWDelay=1 167renameToROBDelay=1 168renameWidth=3 169simpoint_start_insts= 170smtCommitPolicy=RoundRobin 171smtFetchPolicy=SingleThread 172smtIQPolicy=Partitioned 173smtIQThreshold=100 174smtLSQPolicy=Partitioned 175smtLSQThreshold=100 176smtNumFetchingThreads=1 177smtROBPolicy=Partitioned 178smtROBThreshold=100 179socket_id=0 180squashWidth=8 181store_set_clear_period=250000 182switched_out=false 183system=system 184tracer=system.cpu0.tracer 185trapLatency=13 186wbWidth=8 187workload= 188dcache_port=system.cpu0.dcache.cpu_side 189icache_port=system.cpu0.icache.cpu_side 190 191[system.cpu0.branchPred]
| 91read_only=true 92 93[system.clk_domain] 94type=SrcClockDomain 95clock=1000 96domain_id=-1 97eventq_index=0 98init_perf_level=0 99voltage_domain=system.voltage_domain 100 101[system.cpu0] 102type=DerivO3CPU 103children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 104LFSTSize=1024 105LQEntries=16 106LSQCheckLoads=true 107LSQDepCheckShift=0 108SQEntries=16 109SSITSize=1024 110activity=0 111backComSize=5 112branchPred=system.cpu0.branchPred 113cachePorts=200 114checker=Null 115clk_domain=system.cpu_clk_domain 116commitToDecodeDelay=1 117commitToFetchDelay=1 118commitToIEWDelay=1 119commitToRenameDelay=1 120commitWidth=8 121cpu_id=0 122decodeToFetchDelay=1 123decodeToRenameDelay=2 124decodeWidth=3 125dispatchWidth=6 126do_checkpoint_insts=true 127do_quiesce=true 128do_statistics_insts=true 129dstage2_mmu=system.cpu0.dstage2_mmu 130dtb=system.cpu0.dtb 131eventq_index=0 132fetchBufferSize=16 133fetchQueueSize=32 134fetchToDecodeDelay=3 135fetchTrapLatency=1 136fetchWidth=3 137forwardComSize=5 138fuPool=system.cpu0.fuPool 139function_trace=false 140function_trace_start=0 141iewToCommitDelay=1 142iewToDecodeDelay=1 143iewToFetchDelay=1 144iewToRenameDelay=1 145interrupts=system.cpu0.interrupts 146isa=system.cpu0.isa 147issueToExecuteDelay=1 148issueWidth=8 149istage2_mmu=system.cpu0.istage2_mmu 150itb=system.cpu0.itb 151max_insts_all_threads=0 152max_insts_any_thread=0 153max_loads_all_threads=0 154max_loads_any_thread=0 155needsTSO=false 156numIQEntries=32 157numPhysCCRegs=640 158numPhysFloatRegs=192 159numPhysIntRegs=128 160numROBEntries=40 161numRobs=1 162numThreads=1 163profile=0 164progress_interval=0 165renameToDecodeDelay=1 166renameToFetchDelay=1 167renameToIEWDelay=1 168renameToROBDelay=1 169renameWidth=3 170simpoint_start_insts= 171smtCommitPolicy=RoundRobin 172smtFetchPolicy=SingleThread 173smtIQPolicy=Partitioned 174smtIQThreshold=100 175smtLSQPolicy=Partitioned 176smtLSQThreshold=100 177smtNumFetchingThreads=1 178smtROBPolicy=Partitioned 179smtROBThreshold=100 180socket_id=0 181squashWidth=8 182store_set_clear_period=250000 183switched_out=false 184system=system 185tracer=system.cpu0.tracer 186trapLatency=13 187wbWidth=8 188workload= 189dcache_port=system.cpu0.dcache.cpu_side 190icache_port=system.cpu0.icache.cpu_side 191 192[system.cpu0.branchPred]
|
192type=BranchPredictor
| 193type=BiModeBP
|
193BTBEntries=2048 194BTBTagSize=18 195RASSize=16 196choiceCtrBits=2 197choicePredictorSize=8192 198eventq_index=0 199globalCtrBits=2 200globalPredictorSize=8192 201instShiftAmt=2
| 194BTBEntries=2048 195BTBTagSize=18 196RASSize=16 197choiceCtrBits=2 198choicePredictorSize=8192 199eventq_index=0 200globalCtrBits=2 201globalPredictorSize=8192 202instShiftAmt=2
|
202localCtrBits=2 203localHistoryTableSize=2048 204localPredictorSize=2048
| |
205numThreads=1
| 203numThreads=1
|
206predType=bi-mode
| |
207 208[system.cpu0.dcache] 209type=BaseCache 210children=tags 211addr_ranges=0:18446744073709551615 212assoc=2 213clk_domain=system.cpu_clk_domain
| 204 205[system.cpu0.dcache] 206type=BaseCache 207children=tags 208addr_ranges=0:18446744073709551615 209assoc=2 210clk_domain=system.cpu_clk_domain
|
| 211demand_mshr_reserve=1
|
214eventq_index=0 215forward_snoops=true 216hit_latency=2 217is_top_level=true 218max_miss_count=0 219mshrs=6 220prefetch_on_access=false 221prefetcher=Null 222response_latency=2 223sequential_access=false 224size=32768 225system=system 226tags=system.cpu0.dcache.tags 227tgts_per_mshr=8 228two_queue=false 229write_buffers=16 230cpu_side=system.cpu0.dcache_port 231mem_side=system.cpu0.toL2Bus.slave[1] 232 233[system.cpu0.dcache.tags] 234type=LRU 235assoc=2 236block_size=64 237clk_domain=system.cpu_clk_domain 238eventq_index=0 239hit_latency=2 240sequential_access=false 241size=32768 242 243[system.cpu0.dstage2_mmu] 244type=ArmStage2MMU 245children=stage2_tlb 246eventq_index=0 247stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
| 212eventq_index=0 213forward_snoops=true 214hit_latency=2 215is_top_level=true 216max_miss_count=0 217mshrs=6 218prefetch_on_access=false 219prefetcher=Null 220response_latency=2 221sequential_access=false 222size=32768 223system=system 224tags=system.cpu0.dcache.tags 225tgts_per_mshr=8 226two_queue=false 227write_buffers=16 228cpu_side=system.cpu0.dcache_port 229mem_side=system.cpu0.toL2Bus.slave[1] 230 231[system.cpu0.dcache.tags] 232type=LRU 233assoc=2 234block_size=64 235clk_domain=system.cpu_clk_domain 236eventq_index=0 237hit_latency=2 238sequential_access=false 239size=32768 240 241[system.cpu0.dstage2_mmu] 242type=ArmStage2MMU 243children=stage2_tlb 244eventq_index=0 245stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
|
| 246sys=system
|
248tlb=system.cpu0.dtb 249 250[system.cpu0.dstage2_mmu.stage2_tlb] 251type=ArmTLB 252children=walker 253eventq_index=0 254is_stage2=true 255size=32 256walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 257 258[system.cpu0.dstage2_mmu.stage2_tlb.walker] 259type=ArmTableWalker 260clk_domain=system.cpu_clk_domain 261eventq_index=0 262is_stage2=true 263num_squash_per_cycle=2 264sys=system
| 247tlb=system.cpu0.dtb 248 249[system.cpu0.dstage2_mmu.stage2_tlb] 250type=ArmTLB 251children=walker 252eventq_index=0 253is_stage2=true 254size=32 255walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 256 257[system.cpu0.dstage2_mmu.stage2_tlb.walker] 258type=ArmTableWalker 259clk_domain=system.cpu_clk_domain 260eventq_index=0 261is_stage2=true 262num_squash_per_cycle=2 263sys=system
|
265port=system.cpu0.toL2Bus.slave[5]
| |
266 267[system.cpu0.dtb] 268type=ArmTLB 269children=walker 270eventq_index=0 271is_stage2=false 272size=64 273walker=system.cpu0.dtb.walker 274 275[system.cpu0.dtb.walker] 276type=ArmTableWalker 277clk_domain=system.cpu_clk_domain 278eventq_index=0 279is_stage2=false 280num_squash_per_cycle=2 281sys=system 282port=system.cpu0.toL2Bus.slave[3] 283 284[system.cpu0.fuPool] 285type=FUPool 286children=FUList0 FUList1 FUList2 FUList3 FUList4 287FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 288eventq_index=0 289 290[system.cpu0.fuPool.FUList0] 291type=FUDesc 292children=opList 293count=2 294eventq_index=0 295opList=system.cpu0.fuPool.FUList0.opList 296 297[system.cpu0.fuPool.FUList0.opList] 298type=OpDesc 299eventq_index=0 300issueLat=1 301opClass=IntAlu 302opLat=1 303 304[system.cpu0.fuPool.FUList1] 305type=FUDesc 306children=opList0 opList1 opList2 307count=1 308eventq_index=0 309opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 310 311[system.cpu0.fuPool.FUList1.opList0] 312type=OpDesc 313eventq_index=0 314issueLat=1 315opClass=IntMult 316opLat=3 317 318[system.cpu0.fuPool.FUList1.opList1] 319type=OpDesc 320eventq_index=0 321issueLat=12 322opClass=IntDiv 323opLat=12 324 325[system.cpu0.fuPool.FUList1.opList2] 326type=OpDesc 327eventq_index=0 328issueLat=1 329opClass=IprAccess 330opLat=3 331 332[system.cpu0.fuPool.FUList2] 333type=FUDesc 334children=opList 335count=1 336eventq_index=0 337opList=system.cpu0.fuPool.FUList2.opList 338 339[system.cpu0.fuPool.FUList2.opList] 340type=OpDesc 341eventq_index=0 342issueLat=1 343opClass=MemRead 344opLat=2 345 346[system.cpu0.fuPool.FUList3] 347type=FUDesc 348children=opList 349count=1 350eventq_index=0 351opList=system.cpu0.fuPool.FUList3.opList 352 353[system.cpu0.fuPool.FUList3.opList] 354type=OpDesc 355eventq_index=0 356issueLat=1 357opClass=MemWrite 358opLat=2 359 360[system.cpu0.fuPool.FUList4] 361type=FUDesc 362children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 363count=2 364eventq_index=0 365opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 366 367[system.cpu0.fuPool.FUList4.opList00] 368type=OpDesc 369eventq_index=0 370issueLat=1 371opClass=SimdAdd 372opLat=4 373 374[system.cpu0.fuPool.FUList4.opList01] 375type=OpDesc 376eventq_index=0 377issueLat=1 378opClass=SimdAddAcc 379opLat=4 380 381[system.cpu0.fuPool.FUList4.opList02] 382type=OpDesc 383eventq_index=0 384issueLat=1 385opClass=SimdAlu 386opLat=4 387 388[system.cpu0.fuPool.FUList4.opList03] 389type=OpDesc 390eventq_index=0 391issueLat=1 392opClass=SimdCmp 393opLat=4 394 395[system.cpu0.fuPool.FUList4.opList04] 396type=OpDesc 397eventq_index=0 398issueLat=1 399opClass=SimdCvt 400opLat=3 401 402[system.cpu0.fuPool.FUList4.opList05] 403type=OpDesc 404eventq_index=0 405issueLat=1 406opClass=SimdMisc 407opLat=3 408 409[system.cpu0.fuPool.FUList4.opList06] 410type=OpDesc 411eventq_index=0 412issueLat=1 413opClass=SimdMult 414opLat=5 415 416[system.cpu0.fuPool.FUList4.opList07] 417type=OpDesc 418eventq_index=0 419issueLat=1 420opClass=SimdMultAcc 421opLat=5 422 423[system.cpu0.fuPool.FUList4.opList08] 424type=OpDesc 425eventq_index=0 426issueLat=1 427opClass=SimdShift 428opLat=3 429 430[system.cpu0.fuPool.FUList4.opList09] 431type=OpDesc 432eventq_index=0 433issueLat=1 434opClass=SimdShiftAcc 435opLat=3 436 437[system.cpu0.fuPool.FUList4.opList10] 438type=OpDesc 439eventq_index=0 440issueLat=1 441opClass=SimdSqrt 442opLat=9 443 444[system.cpu0.fuPool.FUList4.opList11] 445type=OpDesc 446eventq_index=0 447issueLat=1 448opClass=SimdFloatAdd 449opLat=5 450 451[system.cpu0.fuPool.FUList4.opList12] 452type=OpDesc 453eventq_index=0 454issueLat=1 455opClass=SimdFloatAlu 456opLat=5 457 458[system.cpu0.fuPool.FUList4.opList13] 459type=OpDesc 460eventq_index=0 461issueLat=1 462opClass=SimdFloatCmp 463opLat=3 464 465[system.cpu0.fuPool.FUList4.opList14] 466type=OpDesc 467eventq_index=0 468issueLat=1 469opClass=SimdFloatCvt 470opLat=3 471 472[system.cpu0.fuPool.FUList4.opList15] 473type=OpDesc 474eventq_index=0 475issueLat=1 476opClass=SimdFloatDiv 477opLat=3 478 479[system.cpu0.fuPool.FUList4.opList16] 480type=OpDesc 481eventq_index=0 482issueLat=1 483opClass=SimdFloatMisc 484opLat=3 485 486[system.cpu0.fuPool.FUList4.opList17] 487type=OpDesc 488eventq_index=0 489issueLat=1 490opClass=SimdFloatMult 491opLat=3 492 493[system.cpu0.fuPool.FUList4.opList18] 494type=OpDesc 495eventq_index=0 496issueLat=1 497opClass=SimdFloatMultAcc 498opLat=1 499 500[system.cpu0.fuPool.FUList4.opList19] 501type=OpDesc 502eventq_index=0 503issueLat=1 504opClass=SimdFloatSqrt 505opLat=9 506 507[system.cpu0.fuPool.FUList4.opList20] 508type=OpDesc 509eventq_index=0 510issueLat=1 511opClass=FloatAdd 512opLat=5 513 514[system.cpu0.fuPool.FUList4.opList21] 515type=OpDesc 516eventq_index=0 517issueLat=1 518opClass=FloatCmp 519opLat=5 520 521[system.cpu0.fuPool.FUList4.opList22] 522type=OpDesc 523eventq_index=0 524issueLat=1 525opClass=FloatCvt 526opLat=5 527 528[system.cpu0.fuPool.FUList4.opList23] 529type=OpDesc 530eventq_index=0 531issueLat=9 532opClass=FloatDiv 533opLat=9 534 535[system.cpu0.fuPool.FUList4.opList24] 536type=OpDesc 537eventq_index=0 538issueLat=33 539opClass=FloatSqrt 540opLat=33 541 542[system.cpu0.fuPool.FUList4.opList25] 543type=OpDesc 544eventq_index=0 545issueLat=1 546opClass=FloatMult 547opLat=4 548 549[system.cpu0.icache] 550type=BaseCache 551children=tags 552addr_ranges=0:18446744073709551615 553assoc=2 554clk_domain=system.cpu_clk_domain
| 264 265[system.cpu0.dtb] 266type=ArmTLB 267children=walker 268eventq_index=0 269is_stage2=false 270size=64 271walker=system.cpu0.dtb.walker 272 273[system.cpu0.dtb.walker] 274type=ArmTableWalker 275clk_domain=system.cpu_clk_domain 276eventq_index=0 277is_stage2=false 278num_squash_per_cycle=2 279sys=system 280port=system.cpu0.toL2Bus.slave[3] 281 282[system.cpu0.fuPool] 283type=FUPool 284children=FUList0 FUList1 FUList2 FUList3 FUList4 285FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 286eventq_index=0 287 288[system.cpu0.fuPool.FUList0] 289type=FUDesc 290children=opList 291count=2 292eventq_index=0 293opList=system.cpu0.fuPool.FUList0.opList 294 295[system.cpu0.fuPool.FUList0.opList] 296type=OpDesc 297eventq_index=0 298issueLat=1 299opClass=IntAlu 300opLat=1 301 302[system.cpu0.fuPool.FUList1] 303type=FUDesc 304children=opList0 opList1 opList2 305count=1 306eventq_index=0 307opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 308 309[system.cpu0.fuPool.FUList1.opList0] 310type=OpDesc 311eventq_index=0 312issueLat=1 313opClass=IntMult 314opLat=3 315 316[system.cpu0.fuPool.FUList1.opList1] 317type=OpDesc 318eventq_index=0 319issueLat=12 320opClass=IntDiv 321opLat=12 322 323[system.cpu0.fuPool.FUList1.opList2] 324type=OpDesc 325eventq_index=0 326issueLat=1 327opClass=IprAccess 328opLat=3 329 330[system.cpu0.fuPool.FUList2] 331type=FUDesc 332children=opList 333count=1 334eventq_index=0 335opList=system.cpu0.fuPool.FUList2.opList 336 337[system.cpu0.fuPool.FUList2.opList] 338type=OpDesc 339eventq_index=0 340issueLat=1 341opClass=MemRead 342opLat=2 343 344[system.cpu0.fuPool.FUList3] 345type=FUDesc 346children=opList 347count=1 348eventq_index=0 349opList=system.cpu0.fuPool.FUList3.opList 350 351[system.cpu0.fuPool.FUList3.opList] 352type=OpDesc 353eventq_index=0 354issueLat=1 355opClass=MemWrite 356opLat=2 357 358[system.cpu0.fuPool.FUList4] 359type=FUDesc 360children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 361count=2 362eventq_index=0 363opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 364 365[system.cpu0.fuPool.FUList4.opList00] 366type=OpDesc 367eventq_index=0 368issueLat=1 369opClass=SimdAdd 370opLat=4 371 372[system.cpu0.fuPool.FUList4.opList01] 373type=OpDesc 374eventq_index=0 375issueLat=1 376opClass=SimdAddAcc 377opLat=4 378 379[system.cpu0.fuPool.FUList4.opList02] 380type=OpDesc 381eventq_index=0 382issueLat=1 383opClass=SimdAlu 384opLat=4 385 386[system.cpu0.fuPool.FUList4.opList03] 387type=OpDesc 388eventq_index=0 389issueLat=1 390opClass=SimdCmp 391opLat=4 392 393[system.cpu0.fuPool.FUList4.opList04] 394type=OpDesc 395eventq_index=0 396issueLat=1 397opClass=SimdCvt 398opLat=3 399 400[system.cpu0.fuPool.FUList4.opList05] 401type=OpDesc 402eventq_index=0 403issueLat=1 404opClass=SimdMisc 405opLat=3 406 407[system.cpu0.fuPool.FUList4.opList06] 408type=OpDesc 409eventq_index=0 410issueLat=1 411opClass=SimdMult 412opLat=5 413 414[system.cpu0.fuPool.FUList4.opList07] 415type=OpDesc 416eventq_index=0 417issueLat=1 418opClass=SimdMultAcc 419opLat=5 420 421[system.cpu0.fuPool.FUList4.opList08] 422type=OpDesc 423eventq_index=0 424issueLat=1 425opClass=SimdShift 426opLat=3 427 428[system.cpu0.fuPool.FUList4.opList09] 429type=OpDesc 430eventq_index=0 431issueLat=1 432opClass=SimdShiftAcc 433opLat=3 434 435[system.cpu0.fuPool.FUList4.opList10] 436type=OpDesc 437eventq_index=0 438issueLat=1 439opClass=SimdSqrt 440opLat=9 441 442[system.cpu0.fuPool.FUList4.opList11] 443type=OpDesc 444eventq_index=0 445issueLat=1 446opClass=SimdFloatAdd 447opLat=5 448 449[system.cpu0.fuPool.FUList4.opList12] 450type=OpDesc 451eventq_index=0 452issueLat=1 453opClass=SimdFloatAlu 454opLat=5 455 456[system.cpu0.fuPool.FUList4.opList13] 457type=OpDesc 458eventq_index=0 459issueLat=1 460opClass=SimdFloatCmp 461opLat=3 462 463[system.cpu0.fuPool.FUList4.opList14] 464type=OpDesc 465eventq_index=0 466issueLat=1 467opClass=SimdFloatCvt 468opLat=3 469 470[system.cpu0.fuPool.FUList4.opList15] 471type=OpDesc 472eventq_index=0 473issueLat=1 474opClass=SimdFloatDiv 475opLat=3 476 477[system.cpu0.fuPool.FUList4.opList16] 478type=OpDesc 479eventq_index=0 480issueLat=1 481opClass=SimdFloatMisc 482opLat=3 483 484[system.cpu0.fuPool.FUList4.opList17] 485type=OpDesc 486eventq_index=0 487issueLat=1 488opClass=SimdFloatMult 489opLat=3 490 491[system.cpu0.fuPool.FUList4.opList18] 492type=OpDesc 493eventq_index=0 494issueLat=1 495opClass=SimdFloatMultAcc 496opLat=1 497 498[system.cpu0.fuPool.FUList4.opList19] 499type=OpDesc 500eventq_index=0 501issueLat=1 502opClass=SimdFloatSqrt 503opLat=9 504 505[system.cpu0.fuPool.FUList4.opList20] 506type=OpDesc 507eventq_index=0 508issueLat=1 509opClass=FloatAdd 510opLat=5 511 512[system.cpu0.fuPool.FUList4.opList21] 513type=OpDesc 514eventq_index=0 515issueLat=1 516opClass=FloatCmp 517opLat=5 518 519[system.cpu0.fuPool.FUList4.opList22] 520type=OpDesc 521eventq_index=0 522issueLat=1 523opClass=FloatCvt 524opLat=5 525 526[system.cpu0.fuPool.FUList4.opList23] 527type=OpDesc 528eventq_index=0 529issueLat=9 530opClass=FloatDiv 531opLat=9 532 533[system.cpu0.fuPool.FUList4.opList24] 534type=OpDesc 535eventq_index=0 536issueLat=33 537opClass=FloatSqrt 538opLat=33 539 540[system.cpu0.fuPool.FUList4.opList25] 541type=OpDesc 542eventq_index=0 543issueLat=1 544opClass=FloatMult 545opLat=4 546 547[system.cpu0.icache] 548type=BaseCache 549children=tags 550addr_ranges=0:18446744073709551615 551assoc=2 552clk_domain=system.cpu_clk_domain
|
| 553demand_mshr_reserve=1
|
555eventq_index=0
| 554eventq_index=0
|
556forward_snoops=true
| 555forward_snoops=false
|
557hit_latency=1 558is_top_level=true 559max_miss_count=0 560mshrs=2 561prefetch_on_access=false 562prefetcher=Null 563response_latency=1 564sequential_access=false 565size=32768 566system=system 567tags=system.cpu0.icache.tags 568tgts_per_mshr=8 569two_queue=false 570write_buffers=8 571cpu_side=system.cpu0.icache_port 572mem_side=system.cpu0.toL2Bus.slave[0] 573 574[system.cpu0.icache.tags] 575type=LRU 576assoc=2 577block_size=64 578clk_domain=system.cpu_clk_domain 579eventq_index=0 580hit_latency=1 581sequential_access=false 582size=32768 583 584[system.cpu0.interrupts] 585type=ArmInterrupts 586eventq_index=0 587 588[system.cpu0.isa] 589type=ArmISA 590eventq_index=0 591fpsid=1090793632 592id_aa64afr0_el1=0 593id_aa64afr1_el1=0 594id_aa64dfr0_el1=1052678 595id_aa64dfr1_el1=0 596id_aa64isar0_el1=0 597id_aa64isar1_el1=0 598id_aa64mmfr0_el1=15728642 599id_aa64mmfr1_el1=0 600id_aa64pfr0_el1=17 601id_aa64pfr1_el1=0 602id_isar0=34607377 603id_isar1=34677009 604id_isar2=555950401 605id_isar3=17899825 606id_isar4=268501314 607id_isar5=0 608id_mmfr0=270536963 609id_mmfr1=0 610id_mmfr2=19070976 611id_mmfr3=34611729 612id_pfr0=49 613id_pfr1=4113 614midr=1091551472 615pmu=Null 616system=system 617 618[system.cpu0.istage2_mmu] 619type=ArmStage2MMU 620children=stage2_tlb 621eventq_index=0 622stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
| 556hit_latency=1 557is_top_level=true 558max_miss_count=0 559mshrs=2 560prefetch_on_access=false 561prefetcher=Null 562response_latency=1 563sequential_access=false 564size=32768 565system=system 566tags=system.cpu0.icache.tags 567tgts_per_mshr=8 568two_queue=false 569write_buffers=8 570cpu_side=system.cpu0.icache_port 571mem_side=system.cpu0.toL2Bus.slave[0] 572 573[system.cpu0.icache.tags] 574type=LRU 575assoc=2 576block_size=64 577clk_domain=system.cpu_clk_domain 578eventq_index=0 579hit_latency=1 580sequential_access=false 581size=32768 582 583[system.cpu0.interrupts] 584type=ArmInterrupts 585eventq_index=0 586 587[system.cpu0.isa] 588type=ArmISA 589eventq_index=0 590fpsid=1090793632 591id_aa64afr0_el1=0 592id_aa64afr1_el1=0 593id_aa64dfr0_el1=1052678 594id_aa64dfr1_el1=0 595id_aa64isar0_el1=0 596id_aa64isar1_el1=0 597id_aa64mmfr0_el1=15728642 598id_aa64mmfr1_el1=0 599id_aa64pfr0_el1=17 600id_aa64pfr1_el1=0 601id_isar0=34607377 602id_isar1=34677009 603id_isar2=555950401 604id_isar3=17899825 605id_isar4=268501314 606id_isar5=0 607id_mmfr0=270536963 608id_mmfr1=0 609id_mmfr2=19070976 610id_mmfr3=34611729 611id_pfr0=49 612id_pfr1=4113 613midr=1091551472 614pmu=Null 615system=system 616 617[system.cpu0.istage2_mmu] 618type=ArmStage2MMU 619children=stage2_tlb 620eventq_index=0 621stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
|
| 622sys=system
|
623tlb=system.cpu0.itb 624 625[system.cpu0.istage2_mmu.stage2_tlb] 626type=ArmTLB 627children=walker 628eventq_index=0 629is_stage2=true 630size=32 631walker=system.cpu0.istage2_mmu.stage2_tlb.walker 632 633[system.cpu0.istage2_mmu.stage2_tlb.walker] 634type=ArmTableWalker 635clk_domain=system.cpu_clk_domain 636eventq_index=0 637is_stage2=true 638num_squash_per_cycle=2 639sys=system
| 623tlb=system.cpu0.itb 624 625[system.cpu0.istage2_mmu.stage2_tlb] 626type=ArmTLB 627children=walker 628eventq_index=0 629is_stage2=true 630size=32 631walker=system.cpu0.istage2_mmu.stage2_tlb.walker 632 633[system.cpu0.istage2_mmu.stage2_tlb.walker] 634type=ArmTableWalker 635clk_domain=system.cpu_clk_domain 636eventq_index=0 637is_stage2=true 638num_squash_per_cycle=2 639sys=system
|
640port=system.cpu0.toL2Bus.slave[4]
| |
641 642[system.cpu0.itb] 643type=ArmTLB 644children=walker 645eventq_index=0 646is_stage2=false 647size=64 648walker=system.cpu0.itb.walker 649 650[system.cpu0.itb.walker] 651type=ArmTableWalker 652clk_domain=system.cpu_clk_domain 653eventq_index=0 654is_stage2=false 655num_squash_per_cycle=2 656sys=system 657port=system.cpu0.toL2Bus.slave[2] 658 659[system.cpu0.l2cache] 660type=BaseCache 661children=prefetcher tags 662addr_ranges=0:18446744073709551615 663assoc=16 664clk_domain=system.cpu_clk_domain
| 640 641[system.cpu0.itb] 642type=ArmTLB 643children=walker 644eventq_index=0 645is_stage2=false 646size=64 647walker=system.cpu0.itb.walker 648 649[system.cpu0.itb.walker] 650type=ArmTableWalker 651clk_domain=system.cpu_clk_domain 652eventq_index=0 653is_stage2=false 654num_squash_per_cycle=2 655sys=system 656port=system.cpu0.toL2Bus.slave[2] 657 658[system.cpu0.l2cache] 659type=BaseCache 660children=prefetcher tags 661addr_ranges=0:18446744073709551615 662assoc=16 663clk_domain=system.cpu_clk_domain
|
| 664demand_mshr_reserve=1
|
665eventq_index=0 666forward_snoops=true 667hit_latency=12 668is_top_level=false 669max_miss_count=0 670mshrs=16 671prefetch_on_access=true 672prefetcher=system.cpu0.l2cache.prefetcher 673response_latency=12 674sequential_access=false 675size=1048576 676system=system 677tags=system.cpu0.l2cache.tags 678tgts_per_mshr=8 679two_queue=false 680write_buffers=8 681cpu_side=system.cpu0.toL2Bus.master[0] 682mem_side=system.toL2Bus.slave[0] 683 684[system.cpu0.l2cache.prefetcher] 685type=StridePrefetcher
| 665eventq_index=0 666forward_snoops=true 667hit_latency=12 668is_top_level=false 669max_miss_count=0 670mshrs=16 671prefetch_on_access=true 672prefetcher=system.cpu0.l2cache.prefetcher 673response_latency=12 674sequential_access=false 675size=1048576 676system=system 677tags=system.cpu0.l2cache.tags 678tgts_per_mshr=8 679two_queue=false 680write_buffers=8 681cpu_side=system.cpu0.toL2Bus.master[0] 682mem_side=system.toL2Bus.slave[0] 683 684[system.cpu0.l2cache.prefetcher] 685type=StridePrefetcher
|
| 686cache_snoop=false
|
686clk_domain=system.cpu_clk_domain
| 687clk_domain=system.cpu_clk_domain
|
687cross_pages=false 688data_accesses_only=false
| |
689degree=8 690eventq_index=0
| 688degree=8 689eventq_index=0
|
691inst_tagged=true
| |
692latency=1
| 690latency=1
|
693on_miss_only=false 694on_prefetch=true 695on_read_only=false 696serial_squash=false 697size=100
| 691max_conf=7 692min_conf=0 693on_data=true 694on_inst=true 695on_miss=false 696on_read=true 697on_write=true 698queue_filter=true 699queue_size=32 700queue_squash=true 701start_conf=4
|
698sys=system
| 702sys=system
|
| 703table_assoc=4 704table_sets=16 705tag_prefetch=true 706thresh_conf=4
|
699use_master_id=true 700 701[system.cpu0.l2cache.tags] 702type=RandomRepl 703assoc=16 704block_size=64 705clk_domain=system.cpu_clk_domain 706eventq_index=0 707hit_latency=12 708sequential_access=false 709size=1048576 710 711[system.cpu0.toL2Bus] 712type=CoherentXBar 713clk_domain=system.cpu_clk_domain 714eventq_index=0
| 707use_master_id=true 708 709[system.cpu0.l2cache.tags] 710type=RandomRepl 711assoc=16 712block_size=64 713clk_domain=system.cpu_clk_domain 714eventq_index=0 715hit_latency=12 716sequential_access=false 717size=1048576 718 719[system.cpu0.toL2Bus] 720type=CoherentXBar 721clk_domain=system.cpu_clk_domain 722eventq_index=0
|
715header_cycles=1
| 723forward_latency=0 724frontend_latency=1 725response_latency=1
|
716snoop_filter=Null
| 726snoop_filter=Null
|
| 727snoop_response_latency=1
|
717system=system 718use_default_range=false 719width=32 720master=system.cpu0.l2cache.cpu_side
| 728system=system 729use_default_range=false 730width=32 731master=system.cpu0.l2cache.cpu_side
|
721slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port
| 732slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
|
722 723[system.cpu0.tracer] 724type=ExeTracer 725eventq_index=0 726 727[system.cpu1] 728type=DerivO3CPU 729children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 730LFSTSize=1024 731LQEntries=16 732LSQCheckLoads=true 733LSQDepCheckShift=0 734SQEntries=16 735SSITSize=1024 736activity=0 737backComSize=5 738branchPred=system.cpu1.branchPred 739cachePorts=200 740checker=Null 741clk_domain=system.cpu_clk_domain 742commitToDecodeDelay=1 743commitToFetchDelay=1 744commitToIEWDelay=1 745commitToRenameDelay=1 746commitWidth=8 747cpu_id=1 748decodeToFetchDelay=1 749decodeToRenameDelay=2 750decodeWidth=3 751dispatchWidth=6 752do_checkpoint_insts=true 753do_quiesce=true 754do_statistics_insts=true 755dstage2_mmu=system.cpu1.dstage2_mmu 756dtb=system.cpu1.dtb 757eventq_index=0 758fetchBufferSize=16 759fetchQueueSize=32 760fetchToDecodeDelay=3 761fetchTrapLatency=1 762fetchWidth=3 763forwardComSize=5 764fuPool=system.cpu1.fuPool 765function_trace=false 766function_trace_start=0 767iewToCommitDelay=1 768iewToDecodeDelay=1 769iewToFetchDelay=1 770iewToRenameDelay=1 771interrupts=system.cpu1.interrupts 772isa=system.cpu1.isa 773issueToExecuteDelay=1 774issueWidth=8 775istage2_mmu=system.cpu1.istage2_mmu 776itb=system.cpu1.itb 777max_insts_all_threads=0 778max_insts_any_thread=0 779max_loads_all_threads=0 780max_loads_any_thread=0 781needsTSO=false 782numIQEntries=32 783numPhysCCRegs=640 784numPhysFloatRegs=192 785numPhysIntRegs=128 786numROBEntries=40 787numRobs=1 788numThreads=1 789profile=0 790progress_interval=0 791renameToDecodeDelay=1 792renameToFetchDelay=1 793renameToIEWDelay=1 794renameToROBDelay=1 795renameWidth=3 796simpoint_start_insts= 797smtCommitPolicy=RoundRobin 798smtFetchPolicy=SingleThread 799smtIQPolicy=Partitioned 800smtIQThreshold=100 801smtLSQPolicy=Partitioned 802smtLSQThreshold=100 803smtNumFetchingThreads=1 804smtROBPolicy=Partitioned 805smtROBThreshold=100 806socket_id=0 807squashWidth=8 808store_set_clear_period=250000 809switched_out=false 810system=system 811tracer=system.cpu1.tracer 812trapLatency=13 813wbWidth=8 814workload= 815dcache_port=system.cpu1.dcache.cpu_side 816icache_port=system.cpu1.icache.cpu_side 817 818[system.cpu1.branchPred]
| 733 734[system.cpu0.tracer] 735type=ExeTracer 736eventq_index=0 737 738[system.cpu1] 739type=DerivO3CPU 740children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 741LFSTSize=1024 742LQEntries=16 743LSQCheckLoads=true 744LSQDepCheckShift=0 745SQEntries=16 746SSITSize=1024 747activity=0 748backComSize=5 749branchPred=system.cpu1.branchPred 750cachePorts=200 751checker=Null 752clk_domain=system.cpu_clk_domain 753commitToDecodeDelay=1 754commitToFetchDelay=1 755commitToIEWDelay=1 756commitToRenameDelay=1 757commitWidth=8 758cpu_id=1 759decodeToFetchDelay=1 760decodeToRenameDelay=2 761decodeWidth=3 762dispatchWidth=6 763do_checkpoint_insts=true 764do_quiesce=true 765do_statistics_insts=true 766dstage2_mmu=system.cpu1.dstage2_mmu 767dtb=system.cpu1.dtb 768eventq_index=0 769fetchBufferSize=16 770fetchQueueSize=32 771fetchToDecodeDelay=3 772fetchTrapLatency=1 773fetchWidth=3 774forwardComSize=5 775fuPool=system.cpu1.fuPool 776function_trace=false 777function_trace_start=0 778iewToCommitDelay=1 779iewToDecodeDelay=1 780iewToFetchDelay=1 781iewToRenameDelay=1 782interrupts=system.cpu1.interrupts 783isa=system.cpu1.isa 784issueToExecuteDelay=1 785issueWidth=8 786istage2_mmu=system.cpu1.istage2_mmu 787itb=system.cpu1.itb 788max_insts_all_threads=0 789max_insts_any_thread=0 790max_loads_all_threads=0 791max_loads_any_thread=0 792needsTSO=false 793numIQEntries=32 794numPhysCCRegs=640 795numPhysFloatRegs=192 796numPhysIntRegs=128 797numROBEntries=40 798numRobs=1 799numThreads=1 800profile=0 801progress_interval=0 802renameToDecodeDelay=1 803renameToFetchDelay=1 804renameToIEWDelay=1 805renameToROBDelay=1 806renameWidth=3 807simpoint_start_insts= 808smtCommitPolicy=RoundRobin 809smtFetchPolicy=SingleThread 810smtIQPolicy=Partitioned 811smtIQThreshold=100 812smtLSQPolicy=Partitioned 813smtLSQThreshold=100 814smtNumFetchingThreads=1 815smtROBPolicy=Partitioned 816smtROBThreshold=100 817socket_id=0 818squashWidth=8 819store_set_clear_period=250000 820switched_out=false 821system=system 822tracer=system.cpu1.tracer 823trapLatency=13 824wbWidth=8 825workload= 826dcache_port=system.cpu1.dcache.cpu_side 827icache_port=system.cpu1.icache.cpu_side 828 829[system.cpu1.branchPred]
|
819type=BranchPredictor
| 830type=BiModeBP
|
820BTBEntries=2048 821BTBTagSize=18 822RASSize=16 823choiceCtrBits=2 824choicePredictorSize=8192 825eventq_index=0 826globalCtrBits=2 827globalPredictorSize=8192 828instShiftAmt=2
| 831BTBEntries=2048 832BTBTagSize=18 833RASSize=16 834choiceCtrBits=2 835choicePredictorSize=8192 836eventq_index=0 837globalCtrBits=2 838globalPredictorSize=8192 839instShiftAmt=2
|
829localCtrBits=2 830localHistoryTableSize=2048 831localPredictorSize=2048
| |
832numThreads=1
| 840numThreads=1
|
833predType=bi-mode
| |
834 835[system.cpu1.dcache] 836type=BaseCache 837children=tags 838addr_ranges=0:18446744073709551615 839assoc=2 840clk_domain=system.cpu_clk_domain
| 841 842[system.cpu1.dcache] 843type=BaseCache 844children=tags 845addr_ranges=0:18446744073709551615 846assoc=2 847clk_domain=system.cpu_clk_domain
|
| 848demand_mshr_reserve=1
|
841eventq_index=0 842forward_snoops=true 843hit_latency=2 844is_top_level=true 845max_miss_count=0 846mshrs=6 847prefetch_on_access=false 848prefetcher=Null 849response_latency=2 850sequential_access=false 851size=32768 852system=system 853tags=system.cpu1.dcache.tags 854tgts_per_mshr=8 855two_queue=false 856write_buffers=16 857cpu_side=system.cpu1.dcache_port 858mem_side=system.cpu1.toL2Bus.slave[1] 859 860[system.cpu1.dcache.tags] 861type=LRU 862assoc=2 863block_size=64 864clk_domain=system.cpu_clk_domain 865eventq_index=0 866hit_latency=2 867sequential_access=false 868size=32768 869 870[system.cpu1.dstage2_mmu] 871type=ArmStage2MMU 872children=stage2_tlb 873eventq_index=0 874stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
| 849eventq_index=0 850forward_snoops=true 851hit_latency=2 852is_top_level=true 853max_miss_count=0 854mshrs=6 855prefetch_on_access=false 856prefetcher=Null 857response_latency=2 858sequential_access=false 859size=32768 860system=system 861tags=system.cpu1.dcache.tags 862tgts_per_mshr=8 863two_queue=false 864write_buffers=16 865cpu_side=system.cpu1.dcache_port 866mem_side=system.cpu1.toL2Bus.slave[1] 867 868[system.cpu1.dcache.tags] 869type=LRU 870assoc=2 871block_size=64 872clk_domain=system.cpu_clk_domain 873eventq_index=0 874hit_latency=2 875sequential_access=false 876size=32768 877 878[system.cpu1.dstage2_mmu] 879type=ArmStage2MMU 880children=stage2_tlb 881eventq_index=0 882stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
|
| 883sys=system
|
875tlb=system.cpu1.dtb 876 877[system.cpu1.dstage2_mmu.stage2_tlb] 878type=ArmTLB 879children=walker 880eventq_index=0 881is_stage2=true 882size=32 883walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 884 885[system.cpu1.dstage2_mmu.stage2_tlb.walker] 886type=ArmTableWalker 887clk_domain=system.cpu_clk_domain 888eventq_index=0 889is_stage2=true 890num_squash_per_cycle=2 891sys=system
| 884tlb=system.cpu1.dtb 885 886[system.cpu1.dstage2_mmu.stage2_tlb] 887type=ArmTLB 888children=walker 889eventq_index=0 890is_stage2=true 891size=32 892walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 893 894[system.cpu1.dstage2_mmu.stage2_tlb.walker] 895type=ArmTableWalker 896clk_domain=system.cpu_clk_domain 897eventq_index=0 898is_stage2=true 899num_squash_per_cycle=2 900sys=system
|
892port=system.cpu1.toL2Bus.slave[5]
| |
893 894[system.cpu1.dtb] 895type=ArmTLB 896children=walker 897eventq_index=0 898is_stage2=false 899size=64 900walker=system.cpu1.dtb.walker 901 902[system.cpu1.dtb.walker] 903type=ArmTableWalker 904clk_domain=system.cpu_clk_domain 905eventq_index=0 906is_stage2=false 907num_squash_per_cycle=2 908sys=system 909port=system.cpu1.toL2Bus.slave[3] 910 911[system.cpu1.fuPool] 912type=FUPool 913children=FUList0 FUList1 FUList2 FUList3 FUList4 914FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 915eventq_index=0 916 917[system.cpu1.fuPool.FUList0] 918type=FUDesc 919children=opList 920count=2 921eventq_index=0 922opList=system.cpu1.fuPool.FUList0.opList 923 924[system.cpu1.fuPool.FUList0.opList] 925type=OpDesc 926eventq_index=0 927issueLat=1 928opClass=IntAlu 929opLat=1 930 931[system.cpu1.fuPool.FUList1] 932type=FUDesc 933children=opList0 opList1 opList2 934count=1 935eventq_index=0 936opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 937 938[system.cpu1.fuPool.FUList1.opList0] 939type=OpDesc 940eventq_index=0 941issueLat=1 942opClass=IntMult 943opLat=3 944 945[system.cpu1.fuPool.FUList1.opList1] 946type=OpDesc 947eventq_index=0 948issueLat=12 949opClass=IntDiv 950opLat=12 951 952[system.cpu1.fuPool.FUList1.opList2] 953type=OpDesc 954eventq_index=0 955issueLat=1 956opClass=IprAccess 957opLat=3 958 959[system.cpu1.fuPool.FUList2] 960type=FUDesc 961children=opList 962count=1 963eventq_index=0 964opList=system.cpu1.fuPool.FUList2.opList 965 966[system.cpu1.fuPool.FUList2.opList] 967type=OpDesc 968eventq_index=0 969issueLat=1 970opClass=MemRead 971opLat=2 972 973[system.cpu1.fuPool.FUList3] 974type=FUDesc 975children=opList 976count=1 977eventq_index=0 978opList=system.cpu1.fuPool.FUList3.opList 979 980[system.cpu1.fuPool.FUList3.opList] 981type=OpDesc 982eventq_index=0 983issueLat=1 984opClass=MemWrite 985opLat=2 986 987[system.cpu1.fuPool.FUList4] 988type=FUDesc 989children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 990count=2 991eventq_index=0 992opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 993 994[system.cpu1.fuPool.FUList4.opList00] 995type=OpDesc 996eventq_index=0 997issueLat=1 998opClass=SimdAdd 999opLat=4 1000 1001[system.cpu1.fuPool.FUList4.opList01] 1002type=OpDesc 1003eventq_index=0 1004issueLat=1 1005opClass=SimdAddAcc 1006opLat=4 1007 1008[system.cpu1.fuPool.FUList4.opList02] 1009type=OpDesc 1010eventq_index=0 1011issueLat=1 1012opClass=SimdAlu 1013opLat=4 1014 1015[system.cpu1.fuPool.FUList4.opList03] 1016type=OpDesc 1017eventq_index=0 1018issueLat=1 1019opClass=SimdCmp 1020opLat=4 1021 1022[system.cpu1.fuPool.FUList4.opList04] 1023type=OpDesc 1024eventq_index=0 1025issueLat=1 1026opClass=SimdCvt 1027opLat=3 1028 1029[system.cpu1.fuPool.FUList4.opList05] 1030type=OpDesc 1031eventq_index=0 1032issueLat=1 1033opClass=SimdMisc 1034opLat=3 1035 1036[system.cpu1.fuPool.FUList4.opList06] 1037type=OpDesc 1038eventq_index=0 1039issueLat=1 1040opClass=SimdMult 1041opLat=5 1042 1043[system.cpu1.fuPool.FUList4.opList07] 1044type=OpDesc 1045eventq_index=0 1046issueLat=1 1047opClass=SimdMultAcc 1048opLat=5 1049 1050[system.cpu1.fuPool.FUList4.opList08] 1051type=OpDesc 1052eventq_index=0 1053issueLat=1 1054opClass=SimdShift 1055opLat=3 1056 1057[system.cpu1.fuPool.FUList4.opList09] 1058type=OpDesc 1059eventq_index=0 1060issueLat=1 1061opClass=SimdShiftAcc 1062opLat=3 1063 1064[system.cpu1.fuPool.FUList4.opList10] 1065type=OpDesc 1066eventq_index=0 1067issueLat=1 1068opClass=SimdSqrt 1069opLat=9 1070 1071[system.cpu1.fuPool.FUList4.opList11] 1072type=OpDesc 1073eventq_index=0 1074issueLat=1 1075opClass=SimdFloatAdd 1076opLat=5 1077 1078[system.cpu1.fuPool.FUList4.opList12] 1079type=OpDesc 1080eventq_index=0 1081issueLat=1 1082opClass=SimdFloatAlu 1083opLat=5 1084 1085[system.cpu1.fuPool.FUList4.opList13] 1086type=OpDesc 1087eventq_index=0 1088issueLat=1 1089opClass=SimdFloatCmp 1090opLat=3 1091 1092[system.cpu1.fuPool.FUList4.opList14] 1093type=OpDesc 1094eventq_index=0 1095issueLat=1 1096opClass=SimdFloatCvt 1097opLat=3 1098 1099[system.cpu1.fuPool.FUList4.opList15] 1100type=OpDesc 1101eventq_index=0 1102issueLat=1 1103opClass=SimdFloatDiv 1104opLat=3 1105 1106[system.cpu1.fuPool.FUList4.opList16] 1107type=OpDesc 1108eventq_index=0 1109issueLat=1 1110opClass=SimdFloatMisc 1111opLat=3 1112 1113[system.cpu1.fuPool.FUList4.opList17] 1114type=OpDesc 1115eventq_index=0 1116issueLat=1 1117opClass=SimdFloatMult 1118opLat=3 1119 1120[system.cpu1.fuPool.FUList4.opList18] 1121type=OpDesc 1122eventq_index=0 1123issueLat=1 1124opClass=SimdFloatMultAcc 1125opLat=1 1126 1127[system.cpu1.fuPool.FUList4.opList19] 1128type=OpDesc 1129eventq_index=0 1130issueLat=1 1131opClass=SimdFloatSqrt 1132opLat=9 1133 1134[system.cpu1.fuPool.FUList4.opList20] 1135type=OpDesc 1136eventq_index=0 1137issueLat=1 1138opClass=FloatAdd 1139opLat=5 1140 1141[system.cpu1.fuPool.FUList4.opList21] 1142type=OpDesc 1143eventq_index=0 1144issueLat=1 1145opClass=FloatCmp 1146opLat=5 1147 1148[system.cpu1.fuPool.FUList4.opList22] 1149type=OpDesc 1150eventq_index=0 1151issueLat=1 1152opClass=FloatCvt 1153opLat=5 1154 1155[system.cpu1.fuPool.FUList4.opList23] 1156type=OpDesc 1157eventq_index=0 1158issueLat=9 1159opClass=FloatDiv 1160opLat=9 1161 1162[system.cpu1.fuPool.FUList4.opList24] 1163type=OpDesc 1164eventq_index=0 1165issueLat=33 1166opClass=FloatSqrt 1167opLat=33 1168 1169[system.cpu1.fuPool.FUList4.opList25] 1170type=OpDesc 1171eventq_index=0 1172issueLat=1 1173opClass=FloatMult 1174opLat=4 1175 1176[system.cpu1.icache] 1177type=BaseCache 1178children=tags 1179addr_ranges=0:18446744073709551615 1180assoc=2 1181clk_domain=system.cpu_clk_domain
| 901 902[system.cpu1.dtb] 903type=ArmTLB 904children=walker 905eventq_index=0 906is_stage2=false 907size=64 908walker=system.cpu1.dtb.walker 909 910[system.cpu1.dtb.walker] 911type=ArmTableWalker 912clk_domain=system.cpu_clk_domain 913eventq_index=0 914is_stage2=false 915num_squash_per_cycle=2 916sys=system 917port=system.cpu1.toL2Bus.slave[3] 918 919[system.cpu1.fuPool] 920type=FUPool 921children=FUList0 FUList1 FUList2 FUList3 FUList4 922FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 923eventq_index=0 924 925[system.cpu1.fuPool.FUList0] 926type=FUDesc 927children=opList 928count=2 929eventq_index=0 930opList=system.cpu1.fuPool.FUList0.opList 931 932[system.cpu1.fuPool.FUList0.opList] 933type=OpDesc 934eventq_index=0 935issueLat=1 936opClass=IntAlu 937opLat=1 938 939[system.cpu1.fuPool.FUList1] 940type=FUDesc 941children=opList0 opList1 opList2 942count=1 943eventq_index=0 944opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 945 946[system.cpu1.fuPool.FUList1.opList0] 947type=OpDesc 948eventq_index=0 949issueLat=1 950opClass=IntMult 951opLat=3 952 953[system.cpu1.fuPool.FUList1.opList1] 954type=OpDesc 955eventq_index=0 956issueLat=12 957opClass=IntDiv 958opLat=12 959 960[system.cpu1.fuPool.FUList1.opList2] 961type=OpDesc 962eventq_index=0 963issueLat=1 964opClass=IprAccess 965opLat=3 966 967[system.cpu1.fuPool.FUList2] 968type=FUDesc 969children=opList 970count=1 971eventq_index=0 972opList=system.cpu1.fuPool.FUList2.opList 973 974[system.cpu1.fuPool.FUList2.opList] 975type=OpDesc 976eventq_index=0 977issueLat=1 978opClass=MemRead 979opLat=2 980 981[system.cpu1.fuPool.FUList3] 982type=FUDesc 983children=opList 984count=1 985eventq_index=0 986opList=system.cpu1.fuPool.FUList3.opList 987 988[system.cpu1.fuPool.FUList3.opList] 989type=OpDesc 990eventq_index=0 991issueLat=1 992opClass=MemWrite 993opLat=2 994 995[system.cpu1.fuPool.FUList4] 996type=FUDesc 997children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 998count=2 999eventq_index=0 1000opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 1001 1002[system.cpu1.fuPool.FUList4.opList00] 1003type=OpDesc 1004eventq_index=0 1005issueLat=1 1006opClass=SimdAdd 1007opLat=4 1008 1009[system.cpu1.fuPool.FUList4.opList01] 1010type=OpDesc 1011eventq_index=0 1012issueLat=1 1013opClass=SimdAddAcc 1014opLat=4 1015 1016[system.cpu1.fuPool.FUList4.opList02] 1017type=OpDesc 1018eventq_index=0 1019issueLat=1 1020opClass=SimdAlu 1021opLat=4 1022 1023[system.cpu1.fuPool.FUList4.opList03] 1024type=OpDesc 1025eventq_index=0 1026issueLat=1 1027opClass=SimdCmp 1028opLat=4 1029 1030[system.cpu1.fuPool.FUList4.opList04] 1031type=OpDesc 1032eventq_index=0 1033issueLat=1 1034opClass=SimdCvt 1035opLat=3 1036 1037[system.cpu1.fuPool.FUList4.opList05] 1038type=OpDesc 1039eventq_index=0 1040issueLat=1 1041opClass=SimdMisc 1042opLat=3 1043 1044[system.cpu1.fuPool.FUList4.opList06] 1045type=OpDesc 1046eventq_index=0 1047issueLat=1 1048opClass=SimdMult 1049opLat=5 1050 1051[system.cpu1.fuPool.FUList4.opList07] 1052type=OpDesc 1053eventq_index=0 1054issueLat=1 1055opClass=SimdMultAcc 1056opLat=5 1057 1058[system.cpu1.fuPool.FUList4.opList08] 1059type=OpDesc 1060eventq_index=0 1061issueLat=1 1062opClass=SimdShift 1063opLat=3 1064 1065[system.cpu1.fuPool.FUList4.opList09] 1066type=OpDesc 1067eventq_index=0 1068issueLat=1 1069opClass=SimdShiftAcc 1070opLat=3 1071 1072[system.cpu1.fuPool.FUList4.opList10] 1073type=OpDesc 1074eventq_index=0 1075issueLat=1 1076opClass=SimdSqrt 1077opLat=9 1078 1079[system.cpu1.fuPool.FUList4.opList11] 1080type=OpDesc 1081eventq_index=0 1082issueLat=1 1083opClass=SimdFloatAdd 1084opLat=5 1085 1086[system.cpu1.fuPool.FUList4.opList12] 1087type=OpDesc 1088eventq_index=0 1089issueLat=1 1090opClass=SimdFloatAlu 1091opLat=5 1092 1093[system.cpu1.fuPool.FUList4.opList13] 1094type=OpDesc 1095eventq_index=0 1096issueLat=1 1097opClass=SimdFloatCmp 1098opLat=3 1099 1100[system.cpu1.fuPool.FUList4.opList14] 1101type=OpDesc 1102eventq_index=0 1103issueLat=1 1104opClass=SimdFloatCvt 1105opLat=3 1106 1107[system.cpu1.fuPool.FUList4.opList15] 1108type=OpDesc 1109eventq_index=0 1110issueLat=1 1111opClass=SimdFloatDiv 1112opLat=3 1113 1114[system.cpu1.fuPool.FUList4.opList16] 1115type=OpDesc 1116eventq_index=0 1117issueLat=1 1118opClass=SimdFloatMisc 1119opLat=3 1120 1121[system.cpu1.fuPool.FUList4.opList17] 1122type=OpDesc 1123eventq_index=0 1124issueLat=1 1125opClass=SimdFloatMult 1126opLat=3 1127 1128[system.cpu1.fuPool.FUList4.opList18] 1129type=OpDesc 1130eventq_index=0 1131issueLat=1 1132opClass=SimdFloatMultAcc 1133opLat=1 1134 1135[system.cpu1.fuPool.FUList4.opList19] 1136type=OpDesc 1137eventq_index=0 1138issueLat=1 1139opClass=SimdFloatSqrt 1140opLat=9 1141 1142[system.cpu1.fuPool.FUList4.opList20] 1143type=OpDesc 1144eventq_index=0 1145issueLat=1 1146opClass=FloatAdd 1147opLat=5 1148 1149[system.cpu1.fuPool.FUList4.opList21] 1150type=OpDesc 1151eventq_index=0 1152issueLat=1 1153opClass=FloatCmp 1154opLat=5 1155 1156[system.cpu1.fuPool.FUList4.opList22] 1157type=OpDesc 1158eventq_index=0 1159issueLat=1 1160opClass=FloatCvt 1161opLat=5 1162 1163[system.cpu1.fuPool.FUList4.opList23] 1164type=OpDesc 1165eventq_index=0 1166issueLat=9 1167opClass=FloatDiv 1168opLat=9 1169 1170[system.cpu1.fuPool.FUList4.opList24] 1171type=OpDesc 1172eventq_index=0 1173issueLat=33 1174opClass=FloatSqrt 1175opLat=33 1176 1177[system.cpu1.fuPool.FUList4.opList25] 1178type=OpDesc 1179eventq_index=0 1180issueLat=1 1181opClass=FloatMult 1182opLat=4 1183 1184[system.cpu1.icache] 1185type=BaseCache 1186children=tags 1187addr_ranges=0:18446744073709551615 1188assoc=2 1189clk_domain=system.cpu_clk_domain
|
| 1190demand_mshr_reserve=1
|
1182eventq_index=0
| 1191eventq_index=0
|
1183forward_snoops=true
| 1192forward_snoops=false
|
1184hit_latency=1 1185is_top_level=true 1186max_miss_count=0 1187mshrs=2 1188prefetch_on_access=false 1189prefetcher=Null 1190response_latency=1 1191sequential_access=false 1192size=32768 1193system=system 1194tags=system.cpu1.icache.tags 1195tgts_per_mshr=8 1196two_queue=false 1197write_buffers=8 1198cpu_side=system.cpu1.icache_port 1199mem_side=system.cpu1.toL2Bus.slave[0] 1200 1201[system.cpu1.icache.tags] 1202type=LRU 1203assoc=2 1204block_size=64 1205clk_domain=system.cpu_clk_domain 1206eventq_index=0 1207hit_latency=1 1208sequential_access=false 1209size=32768 1210 1211[system.cpu1.interrupts] 1212type=ArmInterrupts 1213eventq_index=0 1214 1215[system.cpu1.isa] 1216type=ArmISA 1217eventq_index=0 1218fpsid=1090793632 1219id_aa64afr0_el1=0 1220id_aa64afr1_el1=0 1221id_aa64dfr0_el1=1052678 1222id_aa64dfr1_el1=0 1223id_aa64isar0_el1=0 1224id_aa64isar1_el1=0 1225id_aa64mmfr0_el1=15728642 1226id_aa64mmfr1_el1=0 1227id_aa64pfr0_el1=17 1228id_aa64pfr1_el1=0 1229id_isar0=34607377 1230id_isar1=34677009 1231id_isar2=555950401 1232id_isar3=17899825 1233id_isar4=268501314 1234id_isar5=0 1235id_mmfr0=270536963 1236id_mmfr1=0 1237id_mmfr2=19070976 1238id_mmfr3=34611729 1239id_pfr0=49 1240id_pfr1=4113 1241midr=1091551472 1242pmu=Null 1243system=system 1244 1245[system.cpu1.istage2_mmu] 1246type=ArmStage2MMU 1247children=stage2_tlb 1248eventq_index=0 1249stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
| 1193hit_latency=1 1194is_top_level=true 1195max_miss_count=0 1196mshrs=2 1197prefetch_on_access=false 1198prefetcher=Null 1199response_latency=1 1200sequential_access=false 1201size=32768 1202system=system 1203tags=system.cpu1.icache.tags 1204tgts_per_mshr=8 1205two_queue=false 1206write_buffers=8 1207cpu_side=system.cpu1.icache_port 1208mem_side=system.cpu1.toL2Bus.slave[0] 1209 1210[system.cpu1.icache.tags] 1211type=LRU 1212assoc=2 1213block_size=64 1214clk_domain=system.cpu_clk_domain 1215eventq_index=0 1216hit_latency=1 1217sequential_access=false 1218size=32768 1219 1220[system.cpu1.interrupts] 1221type=ArmInterrupts 1222eventq_index=0 1223 1224[system.cpu1.isa] 1225type=ArmISA 1226eventq_index=0 1227fpsid=1090793632 1228id_aa64afr0_el1=0 1229id_aa64afr1_el1=0 1230id_aa64dfr0_el1=1052678 1231id_aa64dfr1_el1=0 1232id_aa64isar0_el1=0 1233id_aa64isar1_el1=0 1234id_aa64mmfr0_el1=15728642 1235id_aa64mmfr1_el1=0 1236id_aa64pfr0_el1=17 1237id_aa64pfr1_el1=0 1238id_isar0=34607377 1239id_isar1=34677009 1240id_isar2=555950401 1241id_isar3=17899825 1242id_isar4=268501314 1243id_isar5=0 1244id_mmfr0=270536963 1245id_mmfr1=0 1246id_mmfr2=19070976 1247id_mmfr3=34611729 1248id_pfr0=49 1249id_pfr1=4113 1250midr=1091551472 1251pmu=Null 1252system=system 1253 1254[system.cpu1.istage2_mmu] 1255type=ArmStage2MMU 1256children=stage2_tlb 1257eventq_index=0 1258stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
|
| 1259sys=system
|
1250tlb=system.cpu1.itb 1251 1252[system.cpu1.istage2_mmu.stage2_tlb] 1253type=ArmTLB 1254children=walker 1255eventq_index=0 1256is_stage2=true 1257size=32 1258walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1259 1260[system.cpu1.istage2_mmu.stage2_tlb.walker] 1261type=ArmTableWalker 1262clk_domain=system.cpu_clk_domain 1263eventq_index=0 1264is_stage2=true 1265num_squash_per_cycle=2 1266sys=system
| 1260tlb=system.cpu1.itb 1261 1262[system.cpu1.istage2_mmu.stage2_tlb] 1263type=ArmTLB 1264children=walker 1265eventq_index=0 1266is_stage2=true 1267size=32 1268walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1269 1270[system.cpu1.istage2_mmu.stage2_tlb.walker] 1271type=ArmTableWalker 1272clk_domain=system.cpu_clk_domain 1273eventq_index=0 1274is_stage2=true 1275num_squash_per_cycle=2 1276sys=system
|
1267port=system.cpu1.toL2Bus.slave[4]
| |
1268 1269[system.cpu1.itb] 1270type=ArmTLB 1271children=walker 1272eventq_index=0 1273is_stage2=false 1274size=64 1275walker=system.cpu1.itb.walker 1276 1277[system.cpu1.itb.walker] 1278type=ArmTableWalker 1279clk_domain=system.cpu_clk_domain 1280eventq_index=0 1281is_stage2=false 1282num_squash_per_cycle=2 1283sys=system 1284port=system.cpu1.toL2Bus.slave[2] 1285 1286[system.cpu1.l2cache] 1287type=BaseCache 1288children=prefetcher tags 1289addr_ranges=0:18446744073709551615 1290assoc=16 1291clk_domain=system.cpu_clk_domain
| 1277 1278[system.cpu1.itb] 1279type=ArmTLB 1280children=walker 1281eventq_index=0 1282is_stage2=false 1283size=64 1284walker=system.cpu1.itb.walker 1285 1286[system.cpu1.itb.walker] 1287type=ArmTableWalker 1288clk_domain=system.cpu_clk_domain 1289eventq_index=0 1290is_stage2=false 1291num_squash_per_cycle=2 1292sys=system 1293port=system.cpu1.toL2Bus.slave[2] 1294 1295[system.cpu1.l2cache] 1296type=BaseCache 1297children=prefetcher tags 1298addr_ranges=0:18446744073709551615 1299assoc=16 1300clk_domain=system.cpu_clk_domain
|
| 1301demand_mshr_reserve=1
|
1292eventq_index=0 1293forward_snoops=true 1294hit_latency=12 1295is_top_level=false 1296max_miss_count=0 1297mshrs=16 1298prefetch_on_access=true 1299prefetcher=system.cpu1.l2cache.prefetcher 1300response_latency=12 1301sequential_access=false 1302size=1048576 1303system=system 1304tags=system.cpu1.l2cache.tags 1305tgts_per_mshr=8 1306two_queue=false 1307write_buffers=8 1308cpu_side=system.cpu1.toL2Bus.master[0] 1309mem_side=system.toL2Bus.slave[1] 1310 1311[system.cpu1.l2cache.prefetcher] 1312type=StridePrefetcher
| 1302eventq_index=0 1303forward_snoops=true 1304hit_latency=12 1305is_top_level=false 1306max_miss_count=0 1307mshrs=16 1308prefetch_on_access=true 1309prefetcher=system.cpu1.l2cache.prefetcher 1310response_latency=12 1311sequential_access=false 1312size=1048576 1313system=system 1314tags=system.cpu1.l2cache.tags 1315tgts_per_mshr=8 1316two_queue=false 1317write_buffers=8 1318cpu_side=system.cpu1.toL2Bus.master[0] 1319mem_side=system.toL2Bus.slave[1] 1320 1321[system.cpu1.l2cache.prefetcher] 1322type=StridePrefetcher
|
| 1323cache_snoop=false
|
1313clk_domain=system.cpu_clk_domain
| 1324clk_domain=system.cpu_clk_domain
|
1314cross_pages=false 1315data_accesses_only=false
| |
1316degree=8 1317eventq_index=0
| 1325degree=8 1326eventq_index=0
|
1318inst_tagged=true
| |
1319latency=1
| 1327latency=1
|
1320on_miss_only=false 1321on_prefetch=true 1322on_read_only=false 1323serial_squash=false 1324size=100
| 1328max_conf=7 1329min_conf=0 1330on_data=true 1331on_inst=true 1332on_miss=false 1333on_read=true 1334on_write=true 1335queue_filter=true 1336queue_size=32 1337queue_squash=true 1338start_conf=4
|
1325sys=system
| 1339sys=system
|
| 1340table_assoc=4 1341table_sets=16 1342tag_prefetch=true 1343thresh_conf=4
|
1326use_master_id=true 1327 1328[system.cpu1.l2cache.tags] 1329type=RandomRepl 1330assoc=16 1331block_size=64 1332clk_domain=system.cpu_clk_domain 1333eventq_index=0 1334hit_latency=12 1335sequential_access=false 1336size=1048576 1337 1338[system.cpu1.toL2Bus] 1339type=CoherentXBar 1340clk_domain=system.cpu_clk_domain 1341eventq_index=0
| 1344use_master_id=true 1345 1346[system.cpu1.l2cache.tags] 1347type=RandomRepl 1348assoc=16 1349block_size=64 1350clk_domain=system.cpu_clk_domain 1351eventq_index=0 1352hit_latency=12 1353sequential_access=false 1354size=1048576 1355 1356[system.cpu1.toL2Bus] 1357type=CoherentXBar 1358clk_domain=system.cpu_clk_domain 1359eventq_index=0
|
1342header_cycles=1
| 1360forward_latency=0 1361frontend_latency=1 1362response_latency=1
|
1343snoop_filter=Null
| 1363snoop_filter=Null
|
| 1364snoop_response_latency=1
|
1344system=system 1345use_default_range=false 1346width=32 1347master=system.cpu1.l2cache.cpu_side
| 1365system=system 1366use_default_range=false 1367width=32 1368master=system.cpu1.l2cache.cpu_side
|
1348slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.istage2_mmu.stage2_tlb.walker.port system.cpu1.dstage2_mmu.stage2_tlb.walker.port
| 1369slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
|
1349 1350[system.cpu1.tracer] 1351type=ExeTracer 1352eventq_index=0 1353 1354[system.cpu_clk_domain] 1355type=SrcClockDomain 1356clock=500 1357domain_id=-1 1358eventq_index=0 1359init_perf_level=0 1360voltage_domain=system.voltage_domain 1361 1362[system.dvfs_handler] 1363type=DVFSHandler 1364domains= 1365enable=false 1366eventq_index=0 1367sys_clk_domain=system.clk_domain 1368transition_latency=100000000 1369 1370[system.intrctrl] 1371type=IntrControl 1372eventq_index=0 1373sys=system 1374 1375[system.iobus] 1376type=NoncoherentXBar 1377clk_domain=system.clk_domain 1378eventq_index=0
| 1370 1371[system.cpu1.tracer] 1372type=ExeTracer 1373eventq_index=0 1374 1375[system.cpu_clk_domain] 1376type=SrcClockDomain 1377clock=500 1378domain_id=-1 1379eventq_index=0 1380init_perf_level=0 1381voltage_domain=system.voltage_domain 1382 1383[system.dvfs_handler] 1384type=DVFSHandler 1385domains= 1386enable=false 1387eventq_index=0 1388sys_clk_domain=system.clk_domain 1389transition_latency=100000000 1390 1391[system.intrctrl] 1392type=IntrControl 1393eventq_index=0 1394sys=system 1395 1396[system.iobus] 1397type=NoncoherentXBar 1398clk_domain=system.clk_domain 1399eventq_index=0
|
1379header_cycles=1
| 1400forward_latency=1 1401frontend_latency=2 1402response_latency=2
|
1380use_default_range=true
| 1403use_default_range=true
|
1381width=8
| 1404width=16
|
1382default=system.realview.pciconfig.pio 1383master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side 1384slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1385 1386[system.iocache] 1387type=BaseCache 1388children=tags 1389addr_ranges=2147483648:2415919103 1390assoc=8 1391clk_domain=system.clk_domain
| 1405default=system.realview.pciconfig.pio 1406master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side 1407slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1408 1409[system.iocache] 1410type=BaseCache 1411children=tags 1412addr_ranges=2147483648:2415919103 1413assoc=8 1414clk_domain=system.clk_domain
|
| 1415demand_mshr_reserve=1
|
1392eventq_index=0 1393forward_snoops=false 1394hit_latency=50 1395is_top_level=true 1396max_miss_count=0 1397mshrs=20 1398prefetch_on_access=false 1399prefetcher=Null 1400response_latency=50 1401sequential_access=false 1402size=1024 1403system=system 1404tags=system.iocache.tags 1405tgts_per_mshr=12 1406two_queue=false 1407write_buffers=8 1408cpu_side=system.iobus.master[27] 1409mem_side=system.membus.slave[3] 1410 1411[system.iocache.tags] 1412type=LRU 1413assoc=8 1414block_size=64 1415clk_domain=system.clk_domain 1416eventq_index=0 1417hit_latency=50 1418sequential_access=false 1419size=1024 1420 1421[system.l2c] 1422type=BaseCache 1423children=tags 1424addr_ranges=0:18446744073709551615 1425assoc=8 1426clk_domain=system.cpu_clk_domain
| 1416eventq_index=0 1417forward_snoops=false 1418hit_latency=50 1419is_top_level=true 1420max_miss_count=0 1421mshrs=20 1422prefetch_on_access=false 1423prefetcher=Null 1424response_latency=50 1425sequential_access=false 1426size=1024 1427system=system 1428tags=system.iocache.tags 1429tgts_per_mshr=12 1430two_queue=false 1431write_buffers=8 1432cpu_side=system.iobus.master[27] 1433mem_side=system.membus.slave[3] 1434 1435[system.iocache.tags] 1436type=LRU 1437assoc=8 1438block_size=64 1439clk_domain=system.clk_domain 1440eventq_index=0 1441hit_latency=50 1442sequential_access=false 1443size=1024 1444 1445[system.l2c] 1446type=BaseCache 1447children=tags 1448addr_ranges=0:18446744073709551615 1449assoc=8 1450clk_domain=system.cpu_clk_domain
|
| 1451demand_mshr_reserve=1
|
1427eventq_index=0 1428forward_snoops=true 1429hit_latency=20 1430is_top_level=false 1431max_miss_count=0 1432mshrs=20 1433prefetch_on_access=false 1434prefetcher=Null 1435response_latency=20 1436sequential_access=false 1437size=4194304 1438system=system 1439tags=system.l2c.tags 1440tgts_per_mshr=12 1441two_queue=false 1442write_buffers=8 1443cpu_side=system.toL2Bus.master[0] 1444mem_side=system.membus.slave[2] 1445 1446[system.l2c.tags] 1447type=LRU 1448assoc=8 1449block_size=64 1450clk_domain=system.cpu_clk_domain 1451eventq_index=0 1452hit_latency=20 1453sequential_access=false 1454size=4194304 1455 1456[system.membus] 1457type=CoherentXBar 1458children=badaddr_responder 1459clk_domain=system.clk_domain 1460eventq_index=0
| 1452eventq_index=0 1453forward_snoops=true 1454hit_latency=20 1455is_top_level=false 1456max_miss_count=0 1457mshrs=20 1458prefetch_on_access=false 1459prefetcher=Null 1460response_latency=20 1461sequential_access=false 1462size=4194304 1463system=system 1464tags=system.l2c.tags 1465tgts_per_mshr=12 1466two_queue=false 1467write_buffers=8 1468cpu_side=system.toL2Bus.master[0] 1469mem_side=system.membus.slave[2] 1470 1471[system.l2c.tags] 1472type=LRU 1473assoc=8 1474block_size=64 1475clk_domain=system.cpu_clk_domain 1476eventq_index=0 1477hit_latency=20 1478sequential_access=false 1479size=4194304 1480 1481[system.membus] 1482type=CoherentXBar 1483children=badaddr_responder 1484clk_domain=system.clk_domain 1485eventq_index=0
|
1461header_cycles=1
| 1486forward_latency=4 1487frontend_latency=3 1488response_latency=2
|
1462snoop_filter=Null
| 1489snoop_filter=Null
|
| 1490snoop_response_latency=4
|
1463system=system 1464use_default_range=false
| 1491system=system 1492use_default_range=false
|
1465width=8
| 1493width=16
|
1466default=system.membus.badaddr_responder.pio
| 1494default=system.membus.badaddr_responder.pio
|
1467master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
| 1495master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
|
1468slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1469 1470[system.membus.badaddr_responder] 1471type=IsaFake 1472clk_domain=system.clk_domain 1473eventq_index=0 1474fake_mem=false 1475pio_addr=0 1476pio_latency=100000 1477pio_size=8 1478ret_bad_addr=true 1479ret_data16=65535 1480ret_data32=4294967295 1481ret_data64=18446744073709551615 1482ret_data8=255 1483system=system 1484update_data=false 1485warn_access=warn 1486pio=system.membus.default 1487 1488[system.physmem] 1489type=DRAMCtrl 1490IDD0=0.075000 1491IDD02=0.000000 1492IDD2N=0.050000 1493IDD2N2=0.000000 1494IDD2P0=0.000000 1495IDD2P02=0.000000 1496IDD2P1=0.000000 1497IDD2P12=0.000000 1498IDD3N=0.057000 1499IDD3N2=0.000000 1500IDD3P0=0.000000 1501IDD3P02=0.000000 1502IDD3P1=0.000000 1503IDD3P12=0.000000 1504IDD4R=0.187000 1505IDD4R2=0.000000 1506IDD4W=0.165000 1507IDD4W2=0.000000 1508IDD5=0.220000 1509IDD52=0.000000 1510IDD6=0.000000 1511IDD62=0.000000 1512VDD=1.500000 1513VDD2=0.000000 1514activation_limit=4
| 1496slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1497 1498[system.membus.badaddr_responder] 1499type=IsaFake 1500clk_domain=system.clk_domain 1501eventq_index=0 1502fake_mem=false 1503pio_addr=0 1504pio_latency=100000 1505pio_size=8 1506ret_bad_addr=true 1507ret_data16=65535 1508ret_data32=4294967295 1509ret_data64=18446744073709551615 1510ret_data8=255 1511system=system 1512update_data=false 1513warn_access=warn 1514pio=system.membus.default 1515 1516[system.physmem] 1517type=DRAMCtrl 1518IDD0=0.075000 1519IDD02=0.000000 1520IDD2N=0.050000 1521IDD2N2=0.000000 1522IDD2P0=0.000000 1523IDD2P02=0.000000 1524IDD2P1=0.000000 1525IDD2P12=0.000000 1526IDD3N=0.057000 1527IDD3N2=0.000000 1528IDD3P0=0.000000 1529IDD3P02=0.000000 1530IDD3P1=0.000000 1531IDD3P12=0.000000 1532IDD4R=0.187000 1533IDD4R2=0.000000 1534IDD4W=0.165000 1535IDD4W2=0.000000 1536IDD5=0.220000 1537IDD52=0.000000 1538IDD6=0.000000 1539IDD62=0.000000 1540VDD=1.500000 1541VDD2=0.000000 1542activation_limit=4
|
1515addr_mapping=RoRaBaChCo
| 1543addr_mapping=RoRaBaCoCh
|
1516bank_groups_per_rank=0 1517banks_per_rank=8 1518burst_length=8 1519channels=1 1520clk_domain=system.clk_domain 1521conf_table_reported=true 1522device_bus_width=8 1523device_rowbuffer_size=1024 1524device_size=536870912 1525devices_per_rank=8 1526dll=true 1527eventq_index=0 1528in_addr_map=true 1529max_accesses_per_row=16 1530mem_sched_policy=frfcfs 1531min_writes_per_switch=16 1532null=false 1533page_policy=open_adaptive 1534range=2147483648:2415919103 1535ranks_per_channel=2 1536read_buffer_size=32 1537static_backend_latency=10000 1538static_frontend_latency=10000 1539tBURST=5000 1540tCCD_L=0 1541tCK=1250 1542tCL=13750 1543tCS=2500 1544tRAS=35000 1545tRCD=13750 1546tREFI=7800000 1547tRFC=260000 1548tRP=13750 1549tRRD=6000 1550tRRD_L=0 1551tRTP=7500 1552tRTW=2500 1553tWR=15000 1554tWTR=7500 1555tXAW=30000 1556tXP=0 1557tXPDLL=0 1558tXS=0 1559tXSDLL=0 1560write_buffer_size=64 1561write_high_thresh_perc=85 1562write_low_thresh_perc=50 1563port=system.membus.master[5] 1564 1565[system.realview] 1566type=RealView 1567children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1568eventq_index=0 1569intrctrl=system.intrctrl 1570pci_cfg_base=805306368 1571pci_cfg_gen_offsets=false 1572pci_io_base=0 1573system=system 1574 1575[system.realview.aaci_fake] 1576type=AmbaFake 1577amba_id=0 1578clk_domain=system.clk_domain 1579eventq_index=0 1580ignore_access=false 1581pio_addr=470024192 1582pio_latency=100000 1583system=system 1584pio=system.iobus.master[18] 1585 1586[system.realview.cf_ctrl] 1587type=IdeController 1588BAR0=471465984 1589BAR0LegacyIO=true 1590BAR0Size=256 1591BAR1=471466240 1592BAR1LegacyIO=true 1593BAR1Size=4096 1594BAR2=1 1595BAR2LegacyIO=false 1596BAR2Size=8 1597BAR3=1 1598BAR3LegacyIO=false 1599BAR3Size=4 1600BAR4=1 1601BAR4LegacyIO=false 1602BAR4Size=16 1603BAR5=1 1604BAR5LegacyIO=false 1605BAR5Size=0 1606BIST=0 1607CacheLineSize=0 1608CapabilityPtr=0 1609CardbusCIS=0 1610ClassCode=1 1611Command=1 1612DeviceID=28945 1613ExpansionROM=0 1614HeaderType=0 1615InterruptLine=31 1616InterruptPin=1 1617LatencyTimer=0 1618LegacyIOBase=0 1619MSICAPBaseOffset=0 1620MSICAPCapId=0 1621MSICAPMaskBits=0 1622MSICAPMsgAddr=0 1623MSICAPMsgCtrl=0 1624MSICAPMsgData=0 1625MSICAPMsgUpperAddr=0 1626MSICAPNextCapability=0 1627MSICAPPendingBits=0 1628MSIXCAPBaseOffset=0 1629MSIXCAPCapId=0 1630MSIXCAPNextCapability=0 1631MSIXMsgCtrl=0 1632MSIXPbaOffset=0 1633MSIXTableOffset=0 1634MaximumLatency=0 1635MinimumGrant=0 1636PMCAPBaseOffset=0 1637PMCAPCapId=0 1638PMCAPCapabilities=0 1639PMCAPCtrlStatus=0 1640PMCAPNextCapability=0 1641PXCAPBaseOffset=0 1642PXCAPCapId=0 1643PXCAPCapabilities=0 1644PXCAPDevCap2=0 1645PXCAPDevCapabilities=0 1646PXCAPDevCtrl=0 1647PXCAPDevCtrl2=0 1648PXCAPDevStatus=0 1649PXCAPLinkCap=0 1650PXCAPLinkCtrl=0 1651PXCAPLinkStatus=0 1652PXCAPNextCapability=0 1653ProgIF=133 1654Revision=0 1655Status=640 1656SubClassCode=1 1657SubsystemID=0 1658SubsystemVendorID=0 1659VendorID=32902 1660clk_domain=system.clk_domain 1661config_latency=20000 1662ctrl_offset=2 1663disks= 1664eventq_index=0 1665io_shift=2 1666pci_bus=2 1667pci_dev=0 1668pci_func=0 1669pio_latency=30000 1670platform=system.realview 1671system=system 1672config=system.iobus.master[9] 1673dma=system.iobus.slave[2] 1674pio=system.iobus.master[8] 1675 1676[system.realview.clcd] 1677type=Pl111 1678amba_id=1315089 1679clk_domain=system.clk_domain 1680enable_capture=true 1681eventq_index=0 1682gic=system.realview.gic 1683int_num=46 1684pio_addr=471793664 1685pio_latency=10000 1686pixel_clock=41667 1687system=system 1688vnc=system.vncserver 1689dma=system.iobus.slave[1] 1690pio=system.iobus.master[4] 1691 1692[system.realview.energy_ctrl] 1693type=EnergyCtrl 1694clk_domain=system.clk_domain 1695dvfs_handler=system.dvfs_handler 1696eventq_index=0 1697pio_addr=470286336 1698pio_latency=100000 1699system=system 1700pio=system.iobus.master[22] 1701 1702[system.realview.ethernet] 1703type=IGbE 1704BAR0=0 1705BAR0LegacyIO=false 1706BAR0Size=131072 1707BAR1=0 1708BAR1LegacyIO=false 1709BAR1Size=0 1710BAR2=0 1711BAR2LegacyIO=false 1712BAR2Size=0 1713BAR3=0 1714BAR3LegacyIO=false 1715BAR3Size=0 1716BAR4=0 1717BAR4LegacyIO=false 1718BAR4Size=0 1719BAR5=0 1720BAR5LegacyIO=false 1721BAR5Size=0 1722BIST=0 1723CacheLineSize=0 1724CapabilityPtr=0 1725CardbusCIS=0 1726ClassCode=2 1727Command=0 1728DeviceID=4213 1729ExpansionROM=0 1730HeaderType=0 1731InterruptLine=1 1732InterruptPin=1 1733LatencyTimer=0 1734LegacyIOBase=0 1735MSICAPBaseOffset=0 1736MSICAPCapId=0 1737MSICAPMaskBits=0 1738MSICAPMsgAddr=0 1739MSICAPMsgCtrl=0 1740MSICAPMsgData=0 1741MSICAPMsgUpperAddr=0 1742MSICAPNextCapability=0 1743MSICAPPendingBits=0 1744MSIXCAPBaseOffset=0 1745MSIXCAPCapId=0 1746MSIXCAPNextCapability=0 1747MSIXMsgCtrl=0 1748MSIXPbaOffset=0 1749MSIXTableOffset=0 1750MaximumLatency=0 1751MinimumGrant=255 1752PMCAPBaseOffset=0 1753PMCAPCapId=0 1754PMCAPCapabilities=0 1755PMCAPCtrlStatus=0 1756PMCAPNextCapability=0 1757PXCAPBaseOffset=0 1758PXCAPCapId=0 1759PXCAPCapabilities=0 1760PXCAPDevCap2=0 1761PXCAPDevCapabilities=0 1762PXCAPDevCtrl=0 1763PXCAPDevCtrl2=0 1764PXCAPDevStatus=0 1765PXCAPLinkCap=0 1766PXCAPLinkCtrl=0 1767PXCAPLinkStatus=0 1768PXCAPNextCapability=0 1769ProgIF=0 1770Revision=0 1771Status=0 1772SubClassCode=0 1773SubsystemID=4104 1774SubsystemVendorID=32902 1775VendorID=32902 1776clk_domain=system.clk_domain 1777config_latency=20000 1778eventq_index=0 1779fetch_comp_delay=10000 1780fetch_delay=10000 1781hardware_address=00:90:00:00:00:01 1782pci_bus=0 1783pci_dev=0 1784pci_func=0 1785phy_epid=896 1786phy_pid=680 1787pio_latency=30000 1788platform=system.realview 1789rx_desc_cache_size=64 1790rx_fifo_size=393216 1791rx_write_delay=0 1792system=system 1793tx_desc_cache_size=64 1794tx_fifo_size=393216 1795tx_read_delay=0 1796wb_comp_delay=10000 1797wb_delay=10000 1798config=system.iobus.master[26] 1799dma=system.iobus.slave[4] 1800pio=system.iobus.master[25] 1801 1802[system.realview.generic_timer] 1803type=GenericTimer 1804eventq_index=0 1805gic=system.realview.gic 1806int_num=29 1807system=system 1808 1809[system.realview.gic] 1810type=Pl390 1811clk_domain=system.clk_domain 1812cpu_addr=738205696 1813cpu_pio_delay=10000 1814dist_addr=738201600 1815dist_pio_delay=10000 1816eventq_index=0 1817int_latency=10000 1818it_lines=128
| 1544bank_groups_per_rank=0 1545banks_per_rank=8 1546burst_length=8 1547channels=1 1548clk_domain=system.clk_domain 1549conf_table_reported=true 1550device_bus_width=8 1551device_rowbuffer_size=1024 1552device_size=536870912 1553devices_per_rank=8 1554dll=true 1555eventq_index=0 1556in_addr_map=true 1557max_accesses_per_row=16 1558mem_sched_policy=frfcfs 1559min_writes_per_switch=16 1560null=false 1561page_policy=open_adaptive 1562range=2147483648:2415919103 1563ranks_per_channel=2 1564read_buffer_size=32 1565static_backend_latency=10000 1566static_frontend_latency=10000 1567tBURST=5000 1568tCCD_L=0 1569tCK=1250 1570tCL=13750 1571tCS=2500 1572tRAS=35000 1573tRCD=13750 1574tREFI=7800000 1575tRFC=260000 1576tRP=13750 1577tRRD=6000 1578tRRD_L=0 1579tRTP=7500 1580tRTW=2500 1581tWR=15000 1582tWTR=7500 1583tXAW=30000 1584tXP=0 1585tXPDLL=0 1586tXS=0 1587tXSDLL=0 1588write_buffer_size=64 1589write_high_thresh_perc=85 1590write_low_thresh_perc=50 1591port=system.membus.master[5] 1592 1593[system.realview] 1594type=RealView 1595children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1596eventq_index=0 1597intrctrl=system.intrctrl 1598pci_cfg_base=805306368 1599pci_cfg_gen_offsets=false 1600pci_io_base=0 1601system=system 1602 1603[system.realview.aaci_fake] 1604type=AmbaFake 1605amba_id=0 1606clk_domain=system.clk_domain 1607eventq_index=0 1608ignore_access=false 1609pio_addr=470024192 1610pio_latency=100000 1611system=system 1612pio=system.iobus.master[18] 1613 1614[system.realview.cf_ctrl] 1615type=IdeController 1616BAR0=471465984 1617BAR0LegacyIO=true 1618BAR0Size=256 1619BAR1=471466240 1620BAR1LegacyIO=true 1621BAR1Size=4096 1622BAR2=1 1623BAR2LegacyIO=false 1624BAR2Size=8 1625BAR3=1 1626BAR3LegacyIO=false 1627BAR3Size=4 1628BAR4=1 1629BAR4LegacyIO=false 1630BAR4Size=16 1631BAR5=1 1632BAR5LegacyIO=false 1633BAR5Size=0 1634BIST=0 1635CacheLineSize=0 1636CapabilityPtr=0 1637CardbusCIS=0 1638ClassCode=1 1639Command=1 1640DeviceID=28945 1641ExpansionROM=0 1642HeaderType=0 1643InterruptLine=31 1644InterruptPin=1 1645LatencyTimer=0 1646LegacyIOBase=0 1647MSICAPBaseOffset=0 1648MSICAPCapId=0 1649MSICAPMaskBits=0 1650MSICAPMsgAddr=0 1651MSICAPMsgCtrl=0 1652MSICAPMsgData=0 1653MSICAPMsgUpperAddr=0 1654MSICAPNextCapability=0 1655MSICAPPendingBits=0 1656MSIXCAPBaseOffset=0 1657MSIXCAPCapId=0 1658MSIXCAPNextCapability=0 1659MSIXMsgCtrl=0 1660MSIXPbaOffset=0 1661MSIXTableOffset=0 1662MaximumLatency=0 1663MinimumGrant=0 1664PMCAPBaseOffset=0 1665PMCAPCapId=0 1666PMCAPCapabilities=0 1667PMCAPCtrlStatus=0 1668PMCAPNextCapability=0 1669PXCAPBaseOffset=0 1670PXCAPCapId=0 1671PXCAPCapabilities=0 1672PXCAPDevCap2=0 1673PXCAPDevCapabilities=0 1674PXCAPDevCtrl=0 1675PXCAPDevCtrl2=0 1676PXCAPDevStatus=0 1677PXCAPLinkCap=0 1678PXCAPLinkCtrl=0 1679PXCAPLinkStatus=0 1680PXCAPNextCapability=0 1681ProgIF=133 1682Revision=0 1683Status=640 1684SubClassCode=1 1685SubsystemID=0 1686SubsystemVendorID=0 1687VendorID=32902 1688clk_domain=system.clk_domain 1689config_latency=20000 1690ctrl_offset=2 1691disks= 1692eventq_index=0 1693io_shift=2 1694pci_bus=2 1695pci_dev=0 1696pci_func=0 1697pio_latency=30000 1698platform=system.realview 1699system=system 1700config=system.iobus.master[9] 1701dma=system.iobus.slave[2] 1702pio=system.iobus.master[8] 1703 1704[system.realview.clcd] 1705type=Pl111 1706amba_id=1315089 1707clk_domain=system.clk_domain 1708enable_capture=true 1709eventq_index=0 1710gic=system.realview.gic 1711int_num=46 1712pio_addr=471793664 1713pio_latency=10000 1714pixel_clock=41667 1715system=system 1716vnc=system.vncserver 1717dma=system.iobus.slave[1] 1718pio=system.iobus.master[4] 1719 1720[system.realview.energy_ctrl] 1721type=EnergyCtrl 1722clk_domain=system.clk_domain 1723dvfs_handler=system.dvfs_handler 1724eventq_index=0 1725pio_addr=470286336 1726pio_latency=100000 1727system=system 1728pio=system.iobus.master[22] 1729 1730[system.realview.ethernet] 1731type=IGbE 1732BAR0=0 1733BAR0LegacyIO=false 1734BAR0Size=131072 1735BAR1=0 1736BAR1LegacyIO=false 1737BAR1Size=0 1738BAR2=0 1739BAR2LegacyIO=false 1740BAR2Size=0 1741BAR3=0 1742BAR3LegacyIO=false 1743BAR3Size=0 1744BAR4=0 1745BAR4LegacyIO=false 1746BAR4Size=0 1747BAR5=0 1748BAR5LegacyIO=false 1749BAR5Size=0 1750BIST=0 1751CacheLineSize=0 1752CapabilityPtr=0 1753CardbusCIS=0 1754ClassCode=2 1755Command=0 1756DeviceID=4213 1757ExpansionROM=0 1758HeaderType=0 1759InterruptLine=1 1760InterruptPin=1 1761LatencyTimer=0 1762LegacyIOBase=0 1763MSICAPBaseOffset=0 1764MSICAPCapId=0 1765MSICAPMaskBits=0 1766MSICAPMsgAddr=0 1767MSICAPMsgCtrl=0 1768MSICAPMsgData=0 1769MSICAPMsgUpperAddr=0 1770MSICAPNextCapability=0 1771MSICAPPendingBits=0 1772MSIXCAPBaseOffset=0 1773MSIXCAPCapId=0 1774MSIXCAPNextCapability=0 1775MSIXMsgCtrl=0 1776MSIXPbaOffset=0 1777MSIXTableOffset=0 1778MaximumLatency=0 1779MinimumGrant=255 1780PMCAPBaseOffset=0 1781PMCAPCapId=0 1782PMCAPCapabilities=0 1783PMCAPCtrlStatus=0 1784PMCAPNextCapability=0 1785PXCAPBaseOffset=0 1786PXCAPCapId=0 1787PXCAPCapabilities=0 1788PXCAPDevCap2=0 1789PXCAPDevCapabilities=0 1790PXCAPDevCtrl=0 1791PXCAPDevCtrl2=0 1792PXCAPDevStatus=0 1793PXCAPLinkCap=0 1794PXCAPLinkCtrl=0 1795PXCAPLinkStatus=0 1796PXCAPNextCapability=0 1797ProgIF=0 1798Revision=0 1799Status=0 1800SubClassCode=0 1801SubsystemID=4104 1802SubsystemVendorID=32902 1803VendorID=32902 1804clk_domain=system.clk_domain 1805config_latency=20000 1806eventq_index=0 1807fetch_comp_delay=10000 1808fetch_delay=10000 1809hardware_address=00:90:00:00:00:01 1810pci_bus=0 1811pci_dev=0 1812pci_func=0 1813phy_epid=896 1814phy_pid=680 1815pio_latency=30000 1816platform=system.realview 1817rx_desc_cache_size=64 1818rx_fifo_size=393216 1819rx_write_delay=0 1820system=system 1821tx_desc_cache_size=64 1822tx_fifo_size=393216 1823tx_read_delay=0 1824wb_comp_delay=10000 1825wb_delay=10000 1826config=system.iobus.master[26] 1827dma=system.iobus.slave[4] 1828pio=system.iobus.master[25] 1829 1830[system.realview.generic_timer] 1831type=GenericTimer 1832eventq_index=0 1833gic=system.realview.gic 1834int_num=29 1835system=system 1836 1837[system.realview.gic] 1838type=Pl390 1839clk_domain=system.clk_domain 1840cpu_addr=738205696 1841cpu_pio_delay=10000 1842dist_addr=738201600 1843dist_pio_delay=10000 1844eventq_index=0 1845int_latency=10000 1846it_lines=128
|
1819msix_addr=0
| |
1820platform=system.realview 1821system=system 1822pio=system.membus.master[2] 1823 1824[system.realview.hdlcd] 1825type=HDLcd 1826amba_id=1314816 1827clk_domain=system.clk_domain 1828enable_capture=true 1829eventq_index=0 1830gic=system.realview.gic 1831int_num=117 1832pio_addr=721420288 1833pio_latency=10000 1834pixel_clock=7299 1835system=system 1836vnc=system.vncserver 1837dma=system.membus.slave[0] 1838pio=system.iobus.master[5] 1839 1840[system.realview.ide] 1841type=IdeController 1842BAR0=1 1843BAR0LegacyIO=false 1844BAR0Size=8 1845BAR1=1 1846BAR1LegacyIO=false 1847BAR1Size=4 1848BAR2=1 1849BAR2LegacyIO=false 1850BAR2Size=8 1851BAR3=1 1852BAR3LegacyIO=false 1853BAR3Size=4 1854BAR4=1 1855BAR4LegacyIO=false 1856BAR4Size=16 1857BAR5=1 1858BAR5LegacyIO=false 1859BAR5Size=0 1860BIST=0 1861CacheLineSize=0 1862CapabilityPtr=0 1863CardbusCIS=0 1864ClassCode=1 1865Command=0 1866DeviceID=28945 1867ExpansionROM=0 1868HeaderType=0 1869InterruptLine=2 1870InterruptPin=2 1871LatencyTimer=0 1872LegacyIOBase=0 1873MSICAPBaseOffset=0 1874MSICAPCapId=0 1875MSICAPMaskBits=0 1876MSICAPMsgAddr=0 1877MSICAPMsgCtrl=0 1878MSICAPMsgData=0 1879MSICAPMsgUpperAddr=0 1880MSICAPNextCapability=0 1881MSICAPPendingBits=0 1882MSIXCAPBaseOffset=0 1883MSIXCAPCapId=0 1884MSIXCAPNextCapability=0 1885MSIXMsgCtrl=0 1886MSIXPbaOffset=0 1887MSIXTableOffset=0 1888MaximumLatency=0 1889MinimumGrant=0 1890PMCAPBaseOffset=0 1891PMCAPCapId=0 1892PMCAPCapabilities=0 1893PMCAPCtrlStatus=0 1894PMCAPNextCapability=0 1895PXCAPBaseOffset=0 1896PXCAPCapId=0 1897PXCAPCapabilities=0 1898PXCAPDevCap2=0 1899PXCAPDevCapabilities=0 1900PXCAPDevCtrl=0 1901PXCAPDevCtrl2=0 1902PXCAPDevStatus=0 1903PXCAPLinkCap=0 1904PXCAPLinkCtrl=0 1905PXCAPLinkStatus=0 1906PXCAPNextCapability=0 1907ProgIF=133 1908Revision=0 1909Status=640 1910SubClassCode=1 1911SubsystemID=0 1912SubsystemVendorID=0 1913VendorID=32902 1914clk_domain=system.clk_domain 1915config_latency=20000 1916ctrl_offset=0 1917disks=system.cf0 1918eventq_index=0 1919io_shift=0 1920pci_bus=0 1921pci_dev=1 1922pci_func=0 1923pio_latency=30000 1924platform=system.realview 1925system=system 1926config=system.iobus.master[24] 1927dma=system.iobus.slave[3] 1928pio=system.iobus.master[23] 1929 1930[system.realview.kmi0] 1931type=Pl050 1932amba_id=1314896 1933clk_domain=system.clk_domain 1934eventq_index=0 1935gic=system.realview.gic 1936int_delay=1000000 1937int_num=44 1938is_mouse=false 1939pio_addr=470155264 1940pio_latency=100000 1941system=system 1942vnc=system.vncserver 1943pio=system.iobus.master[6] 1944 1945[system.realview.kmi1] 1946type=Pl050 1947amba_id=1314896 1948clk_domain=system.clk_domain 1949eventq_index=0 1950gic=system.realview.gic 1951int_delay=1000000 1952int_num=45 1953is_mouse=true 1954pio_addr=470220800 1955pio_latency=100000 1956system=system 1957vnc=system.vncserver 1958pio=system.iobus.master[7] 1959 1960[system.realview.l2x0_fake] 1961type=IsaFake 1962clk_domain=system.clk_domain 1963eventq_index=0 1964fake_mem=false 1965pio_addr=739246080 1966pio_latency=100000 1967pio_size=4095 1968ret_bad_addr=false 1969ret_data16=65535 1970ret_data32=4294967295 1971ret_data64=18446744073709551615 1972ret_data8=255 1973system=system 1974update_data=false 1975warn_access= 1976pio=system.iobus.master[12] 1977 1978[system.realview.lan_fake] 1979type=IsaFake 1980clk_domain=system.clk_domain 1981eventq_index=0 1982fake_mem=false 1983pio_addr=436207616 1984pio_latency=100000 1985pio_size=65535 1986ret_bad_addr=false 1987ret_data16=65535 1988ret_data32=4294967295 1989ret_data64=18446744073709551615 1990ret_data8=255 1991system=system 1992update_data=false 1993warn_access= 1994pio=system.iobus.master[19] 1995 1996[system.realview.local_cpu_timer] 1997type=CpuLocalTimer 1998clk_domain=system.clk_domain 1999eventq_index=0 2000gic=system.realview.gic 2001int_num_timer=29 2002int_num_watchdog=30 2003pio_addr=738721792 2004pio_latency=100000 2005system=system
| 1847platform=system.realview 1848system=system 1849pio=system.membus.master[2] 1850 1851[system.realview.hdlcd] 1852type=HDLcd 1853amba_id=1314816 1854clk_domain=system.clk_domain 1855enable_capture=true 1856eventq_index=0 1857gic=system.realview.gic 1858int_num=117 1859pio_addr=721420288 1860pio_latency=10000 1861pixel_clock=7299 1862system=system 1863vnc=system.vncserver 1864dma=system.membus.slave[0] 1865pio=system.iobus.master[5] 1866 1867[system.realview.ide] 1868type=IdeController 1869BAR0=1 1870BAR0LegacyIO=false 1871BAR0Size=8 1872BAR1=1 1873BAR1LegacyIO=false 1874BAR1Size=4 1875BAR2=1 1876BAR2LegacyIO=false 1877BAR2Size=8 1878BAR3=1 1879BAR3LegacyIO=false 1880BAR3Size=4 1881BAR4=1 1882BAR4LegacyIO=false 1883BAR4Size=16 1884BAR5=1 1885BAR5LegacyIO=false 1886BAR5Size=0 1887BIST=0 1888CacheLineSize=0 1889CapabilityPtr=0 1890CardbusCIS=0 1891ClassCode=1 1892Command=0 1893DeviceID=28945 1894ExpansionROM=0 1895HeaderType=0 1896InterruptLine=2 1897InterruptPin=2 1898LatencyTimer=0 1899LegacyIOBase=0 1900MSICAPBaseOffset=0 1901MSICAPCapId=0 1902MSICAPMaskBits=0 1903MSICAPMsgAddr=0 1904MSICAPMsgCtrl=0 1905MSICAPMsgData=0 1906MSICAPMsgUpperAddr=0 1907MSICAPNextCapability=0 1908MSICAPPendingBits=0 1909MSIXCAPBaseOffset=0 1910MSIXCAPCapId=0 1911MSIXCAPNextCapability=0 1912MSIXMsgCtrl=0 1913MSIXPbaOffset=0 1914MSIXTableOffset=0 1915MaximumLatency=0 1916MinimumGrant=0 1917PMCAPBaseOffset=0 1918PMCAPCapId=0 1919PMCAPCapabilities=0 1920PMCAPCtrlStatus=0 1921PMCAPNextCapability=0 1922PXCAPBaseOffset=0 1923PXCAPCapId=0 1924PXCAPCapabilities=0 1925PXCAPDevCap2=0 1926PXCAPDevCapabilities=0 1927PXCAPDevCtrl=0 1928PXCAPDevCtrl2=0 1929PXCAPDevStatus=0 1930PXCAPLinkCap=0 1931PXCAPLinkCtrl=0 1932PXCAPLinkStatus=0 1933PXCAPNextCapability=0 1934ProgIF=133 1935Revision=0 1936Status=640 1937SubClassCode=1 1938SubsystemID=0 1939SubsystemVendorID=0 1940VendorID=32902 1941clk_domain=system.clk_domain 1942config_latency=20000 1943ctrl_offset=0 1944disks=system.cf0 1945eventq_index=0 1946io_shift=0 1947pci_bus=0 1948pci_dev=1 1949pci_func=0 1950pio_latency=30000 1951platform=system.realview 1952system=system 1953config=system.iobus.master[24] 1954dma=system.iobus.slave[3] 1955pio=system.iobus.master[23] 1956 1957[system.realview.kmi0] 1958type=Pl050 1959amba_id=1314896 1960clk_domain=system.clk_domain 1961eventq_index=0 1962gic=system.realview.gic 1963int_delay=1000000 1964int_num=44 1965is_mouse=false 1966pio_addr=470155264 1967pio_latency=100000 1968system=system 1969vnc=system.vncserver 1970pio=system.iobus.master[6] 1971 1972[system.realview.kmi1] 1973type=Pl050 1974amba_id=1314896 1975clk_domain=system.clk_domain 1976eventq_index=0 1977gic=system.realview.gic 1978int_delay=1000000 1979int_num=45 1980is_mouse=true 1981pio_addr=470220800 1982pio_latency=100000 1983system=system 1984vnc=system.vncserver 1985pio=system.iobus.master[7] 1986 1987[system.realview.l2x0_fake] 1988type=IsaFake 1989clk_domain=system.clk_domain 1990eventq_index=0 1991fake_mem=false 1992pio_addr=739246080 1993pio_latency=100000 1994pio_size=4095 1995ret_bad_addr=false 1996ret_data16=65535 1997ret_data32=4294967295 1998ret_data64=18446744073709551615 1999ret_data8=255 2000system=system 2001update_data=false 2002warn_access= 2003pio=system.iobus.master[12] 2004 2005[system.realview.lan_fake] 2006type=IsaFake 2007clk_domain=system.clk_domain 2008eventq_index=0 2009fake_mem=false 2010pio_addr=436207616 2011pio_latency=100000 2012pio_size=65535 2013ret_bad_addr=false 2014ret_data16=65535 2015ret_data32=4294967295 2016ret_data64=18446744073709551615 2017ret_data8=255 2018system=system 2019update_data=false 2020warn_access= 2021pio=system.iobus.master[19] 2022 2023[system.realview.local_cpu_timer] 2024type=CpuLocalTimer 2025clk_domain=system.clk_domain 2026eventq_index=0 2027gic=system.realview.gic 2028int_num_timer=29 2029int_num_watchdog=30 2030pio_addr=738721792 2031pio_latency=100000 2032system=system
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2006pio=system.membus.master[3]
| 2033pio=system.membus.master[4]
|
2007 2008[system.realview.mmc_fake] 2009type=AmbaFake 2010amba_id=0 2011clk_domain=system.clk_domain 2012eventq_index=0 2013ignore_access=false 2014pio_addr=470089728 2015pio_latency=100000 2016system=system 2017pio=system.iobus.master[21] 2018 2019[system.realview.nvmem] 2020type=SimpleMemory 2021bandwidth=73.000000 2022clk_domain=system.clk_domain 2023conf_table_reported=false 2024eventq_index=0 2025in_addr_map=true 2026latency=30000 2027latency_var=0 2028null=false 2029range=0:67108863 2030port=system.membus.master[1] 2031 2032[system.realview.pciconfig] 2033type=PciConfigAll 2034bus=0 2035clk_domain=system.clk_domain 2036eventq_index=0 2037pio_addr=0 2038pio_latency=30000 2039platform=system.realview 2040size=268435456 2041system=system 2042pio=system.iobus.default 2043 2044[system.realview.realview_io] 2045type=RealViewCtrl 2046clk_domain=system.clk_domain 2047eventq_index=0 2048idreg=35979264 2049pio_addr=469827584 2050pio_latency=100000 2051proc_id0=335544320 2052proc_id1=335544320 2053system=system 2054pio=system.iobus.master[1] 2055 2056[system.realview.rtc] 2057type=PL031 2058amba_id=3412017 2059clk_domain=system.clk_domain 2060eventq_index=0 2061gic=system.realview.gic 2062int_delay=100000 2063int_num=36 2064pio_addr=471269376 2065pio_latency=100000 2066system=system 2067time=Thu Jan 1 00:00:00 2009 2068pio=system.iobus.master[10] 2069 2070[system.realview.sp810_fake] 2071type=AmbaFake 2072amba_id=0 2073clk_domain=system.clk_domain 2074eventq_index=0 2075ignore_access=true 2076pio_addr=469893120 2077pio_latency=100000 2078system=system 2079pio=system.iobus.master[16] 2080 2081[system.realview.timer0] 2082type=Sp804 2083amba_id=1316868 2084clk_domain=system.clk_domain 2085clock0=1000000 2086clock1=1000000 2087eventq_index=0 2088gic=system.realview.gic 2089int_num0=34 2090int_num1=34 2091pio_addr=470876160 2092pio_latency=100000 2093system=system 2094pio=system.iobus.master[2] 2095 2096[system.realview.timer1] 2097type=Sp804 2098amba_id=1316868 2099clk_domain=system.clk_domain 2100clock0=1000000 2101clock1=1000000 2102eventq_index=0 2103gic=system.realview.gic 2104int_num0=35 2105int_num1=35 2106pio_addr=470941696 2107pio_latency=100000 2108system=system 2109pio=system.iobus.master[3] 2110 2111[system.realview.uart] 2112type=Pl011 2113clk_domain=system.clk_domain 2114end_on_eot=false 2115eventq_index=0 2116gic=system.realview.gic 2117int_delay=100000 2118int_num=37 2119pio_addr=470351872 2120pio_latency=100000 2121platform=system.realview 2122system=system 2123terminal=system.terminal 2124pio=system.iobus.master[0] 2125 2126[system.realview.uart1_fake] 2127type=AmbaFake 2128amba_id=0 2129clk_domain=system.clk_domain 2130eventq_index=0 2131ignore_access=false 2132pio_addr=470417408 2133pio_latency=100000 2134system=system 2135pio=system.iobus.master[13] 2136 2137[system.realview.uart2_fake] 2138type=AmbaFake 2139amba_id=0 2140clk_domain=system.clk_domain 2141eventq_index=0 2142ignore_access=false 2143pio_addr=470482944 2144pio_latency=100000 2145system=system 2146pio=system.iobus.master[14] 2147 2148[system.realview.uart3_fake] 2149type=AmbaFake 2150amba_id=0 2151clk_domain=system.clk_domain 2152eventq_index=0 2153ignore_access=false 2154pio_addr=470548480 2155pio_latency=100000 2156system=system 2157pio=system.iobus.master[15] 2158 2159[system.realview.usb_fake] 2160type=IsaFake 2161clk_domain=system.clk_domain 2162eventq_index=0 2163fake_mem=false 2164pio_addr=452984832 2165pio_latency=100000 2166pio_size=131071 2167ret_bad_addr=false 2168ret_data16=65535 2169ret_data32=4294967295 2170ret_data64=18446744073709551615 2171ret_data8=255 2172system=system 2173update_data=false 2174warn_access= 2175pio=system.iobus.master[20] 2176 2177[system.realview.vgic] 2178type=VGic 2179clk_domain=system.clk_domain 2180eventq_index=0 2181gic=system.realview.gic 2182hv_addr=738213888 2183pio_delay=10000 2184platform=system.realview 2185ppint=25 2186system=system 2187vcpu_addr=738222080
| 2034 2035[system.realview.mmc_fake] 2036type=AmbaFake 2037amba_id=0 2038clk_domain=system.clk_domain 2039eventq_index=0 2040ignore_access=false 2041pio_addr=470089728 2042pio_latency=100000 2043system=system 2044pio=system.iobus.master[21] 2045 2046[system.realview.nvmem] 2047type=SimpleMemory 2048bandwidth=73.000000 2049clk_domain=system.clk_domain 2050conf_table_reported=false 2051eventq_index=0 2052in_addr_map=true 2053latency=30000 2054latency_var=0 2055null=false 2056range=0:67108863 2057port=system.membus.master[1] 2058 2059[system.realview.pciconfig] 2060type=PciConfigAll 2061bus=0 2062clk_domain=system.clk_domain 2063eventq_index=0 2064pio_addr=0 2065pio_latency=30000 2066platform=system.realview 2067size=268435456 2068system=system 2069pio=system.iobus.default 2070 2071[system.realview.realview_io] 2072type=RealViewCtrl 2073clk_domain=system.clk_domain 2074eventq_index=0 2075idreg=35979264 2076pio_addr=469827584 2077pio_latency=100000 2078proc_id0=335544320 2079proc_id1=335544320 2080system=system 2081pio=system.iobus.master[1] 2082 2083[system.realview.rtc] 2084type=PL031 2085amba_id=3412017 2086clk_domain=system.clk_domain 2087eventq_index=0 2088gic=system.realview.gic 2089int_delay=100000 2090int_num=36 2091pio_addr=471269376 2092pio_latency=100000 2093system=system 2094time=Thu Jan 1 00:00:00 2009 2095pio=system.iobus.master[10] 2096 2097[system.realview.sp810_fake] 2098type=AmbaFake 2099amba_id=0 2100clk_domain=system.clk_domain 2101eventq_index=0 2102ignore_access=true 2103pio_addr=469893120 2104pio_latency=100000 2105system=system 2106pio=system.iobus.master[16] 2107 2108[system.realview.timer0] 2109type=Sp804 2110amba_id=1316868 2111clk_domain=system.clk_domain 2112clock0=1000000 2113clock1=1000000 2114eventq_index=0 2115gic=system.realview.gic 2116int_num0=34 2117int_num1=34 2118pio_addr=470876160 2119pio_latency=100000 2120system=system 2121pio=system.iobus.master[2] 2122 2123[system.realview.timer1] 2124type=Sp804 2125amba_id=1316868 2126clk_domain=system.clk_domain 2127clock0=1000000 2128clock1=1000000 2129eventq_index=0 2130gic=system.realview.gic 2131int_num0=35 2132int_num1=35 2133pio_addr=470941696 2134pio_latency=100000 2135system=system 2136pio=system.iobus.master[3] 2137 2138[system.realview.uart] 2139type=Pl011 2140clk_domain=system.clk_domain 2141end_on_eot=false 2142eventq_index=0 2143gic=system.realview.gic 2144int_delay=100000 2145int_num=37 2146pio_addr=470351872 2147pio_latency=100000 2148platform=system.realview 2149system=system 2150terminal=system.terminal 2151pio=system.iobus.master[0] 2152 2153[system.realview.uart1_fake] 2154type=AmbaFake 2155amba_id=0 2156clk_domain=system.clk_domain 2157eventq_index=0 2158ignore_access=false 2159pio_addr=470417408 2160pio_latency=100000 2161system=system 2162pio=system.iobus.master[13] 2163 2164[system.realview.uart2_fake] 2165type=AmbaFake 2166amba_id=0 2167clk_domain=system.clk_domain 2168eventq_index=0 2169ignore_access=false 2170pio_addr=470482944 2171pio_latency=100000 2172system=system 2173pio=system.iobus.master[14] 2174 2175[system.realview.uart3_fake] 2176type=AmbaFake 2177amba_id=0 2178clk_domain=system.clk_domain 2179eventq_index=0 2180ignore_access=false 2181pio_addr=470548480 2182pio_latency=100000 2183system=system 2184pio=system.iobus.master[15] 2185 2186[system.realview.usb_fake] 2187type=IsaFake 2188clk_domain=system.clk_domain 2189eventq_index=0 2190fake_mem=false 2191pio_addr=452984832 2192pio_latency=100000 2193pio_size=131071 2194ret_bad_addr=false 2195ret_data16=65535 2196ret_data32=4294967295 2197ret_data64=18446744073709551615 2198ret_data8=255 2199system=system 2200update_data=false 2201warn_access= 2202pio=system.iobus.master[20] 2203 2204[system.realview.vgic] 2205type=VGic 2206clk_domain=system.clk_domain 2207eventq_index=0 2208gic=system.realview.gic 2209hv_addr=738213888 2210pio_delay=10000 2211platform=system.realview 2212ppint=25 2213system=system 2214vcpu_addr=738222080
|
2188pio=system.membus.master[4]
| 2215pio=system.membus.master[3]
|
2189 2190[system.realview.vram] 2191type=SimpleMemory 2192bandwidth=73.000000 2193clk_domain=system.clk_domain 2194conf_table_reported=false 2195eventq_index=0 2196in_addr_map=true 2197latency=30000 2198latency_var=0 2199null=false 2200range=402653184:436207615 2201port=system.iobus.master[11] 2202 2203[system.realview.watchdog_fake] 2204type=AmbaFake 2205amba_id=0 2206clk_domain=system.clk_domain 2207eventq_index=0 2208ignore_access=false 2209pio_addr=470745088 2210pio_latency=100000 2211system=system 2212pio=system.iobus.master[17] 2213 2214[system.terminal] 2215type=Terminal 2216eventq_index=0 2217intr_control=system.intrctrl 2218number=0 2219output=true 2220port=3456 2221 2222[system.toL2Bus] 2223type=CoherentXBar 2224clk_domain=system.cpu_clk_domain 2225eventq_index=0
| 2216 2217[system.realview.vram] 2218type=SimpleMemory 2219bandwidth=73.000000 2220clk_domain=system.clk_domain 2221conf_table_reported=false 2222eventq_index=0 2223in_addr_map=true 2224latency=30000 2225latency_var=0 2226null=false 2227range=402653184:436207615 2228port=system.iobus.master[11] 2229 2230[system.realview.watchdog_fake] 2231type=AmbaFake 2232amba_id=0 2233clk_domain=system.clk_domain 2234eventq_index=0 2235ignore_access=false 2236pio_addr=470745088 2237pio_latency=100000 2238system=system 2239pio=system.iobus.master[17] 2240 2241[system.terminal] 2242type=Terminal 2243eventq_index=0 2244intr_control=system.intrctrl 2245number=0 2246output=true 2247port=3456 2248 2249[system.toL2Bus] 2250type=CoherentXBar 2251clk_domain=system.cpu_clk_domain 2252eventq_index=0
|
2226header_cycles=1
| 2253forward_latency=0 2254frontend_latency=1 2255response_latency=1
|
2227snoop_filter=Null
| 2256snoop_filter=Null
|
| 2257snoop_response_latency=1
|
2228system=system 2229use_default_range=false
| 2258system=system 2259use_default_range=false
|
2230width=8
| 2260width=32
|
2231master=system.l2c.cpu_side 2232slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2233 2234[system.vncserver] 2235type=VncServer 2236eventq_index=0 2237frame_capture=false 2238number=0 2239port=5900 2240 2241[system.voltage_domain] 2242type=VoltageDomain 2243eventq_index=0 2244voltage=1.000000 2245
| 2261master=system.l2c.cpu_side 2262slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2263 2264[system.vncserver] 2265type=VncServer 2266eventq_index=0 2267frame_capture=false 2268number=0 2269port=5900 2270 2271[system.voltage_domain] 2272type=VoltageDomain 2273eventq_index=0 2274voltage=1.000000 2275
|