1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxArmSystem
13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
14atags_addr=134217728
15boot_loader=/dist/binaries/boot_emm.arm
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
17boot_release_addr=65528
18cache_line_size=64
19clk_domain=system.clk_domain
20dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
21early_kernel_symbols=false
22enable_context_switch_stats_dump=false
23eventq_index=0
24flags_addr=469827632
25gic_cpu_addr=738205696
26have_generic_timer=false
27have_large_asid_64=false
28have_lpae=false
29have_security=false
30have_virtualization=false
31highest_el_is_64=false
32init_param=0
33kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
34kernel_addr_check=true
35load_addr_mask=268435455
36load_offset=2147483648
37machine_type=VExpress_EMM
38mem_mode=timing
39mem_ranges=2147483648:2415919103
40memories=system.physmem system.realview.vram system.realview.nvmem
41multi_proc=true
42num_work_ids=16
43panic_on_oops=true
44panic_on_panic=true
45phys_addr_range_64=40
46readfile=/work/gem5.ext/tests/halt.sh
47reset_addr_64=0
48symbolfile=
49work_begin_ckpt_count=0
50work_begin_cpu_id_exit=-1
51work_begin_exit_count=0
52work_cpus_ckpt_count=0
53work_end_ckpt_count=0
54work_end_exit_count=0
--- 26 unchanged lines hidden (view full) ---
81eventq_index=0
82image_file=
83read_only=false
84table_size=65536
85
86[system.cf0.image.child]
87type=RawDiskImage
88eventq_index=0
89image_file=/dist/disks/linux-aarch32-ael.img
90read_only=true
91
92[system.clk_domain]
93type=SrcClockDomain
94clock=1000
95domain_id=-1
96eventq_index=0
97init_perf_level=0
--- 86 unchanged lines hidden (view full) ---
184tracer=system.cpu0.tracer
185trapLatency=13
186wbWidth=8
187workload=
188dcache_port=system.cpu0.dcache.cpu_side
189icache_port=system.cpu0.icache.cpu_side
190
191[system.cpu0.branchPred]
192type=BranchPredictor
193BTBEntries=2048
194BTBTagSize=18
195RASSize=16
196choiceCtrBits=2
197choicePredictorSize=8192
198eventq_index=0
199globalCtrBits=2
200globalPredictorSize=8192
201instShiftAmt=2
202localCtrBits=2
203localHistoryTableSize=2048
204localPredictorSize=2048
205numThreads=1
206predType=bi-mode
207
208[system.cpu0.dcache]
209type=BaseCache
210children=tags
211addr_ranges=0:18446744073709551615
212assoc=2
213clk_domain=system.cpu_clk_domain
214eventq_index=0
215forward_snoops=true
216hit_latency=2
217is_top_level=true
218max_miss_count=0
219mshrs=6
220prefetch_on_access=false
221prefetcher=Null
--- 18 unchanged lines hidden (view full) ---
240sequential_access=false
241size=32768
242
243[system.cpu0.dstage2_mmu]
244type=ArmStage2MMU
245children=stage2_tlb
246eventq_index=0
247stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
248tlb=system.cpu0.dtb
249
250[system.cpu0.dstage2_mmu.stage2_tlb]
251type=ArmTLB
252children=walker
253eventq_index=0
254is_stage2=true
255size=32
256walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
257
258[system.cpu0.dstage2_mmu.stage2_tlb.walker]
259type=ArmTableWalker
260clk_domain=system.cpu_clk_domain
261eventq_index=0
262is_stage2=true
263num_squash_per_cycle=2
264sys=system
265port=system.cpu0.toL2Bus.slave[5]
266
267[system.cpu0.dtb]
268type=ArmTLB
269children=walker
270eventq_index=0
271is_stage2=false
272size=64
273walker=system.cpu0.dtb.walker
--- 273 unchanged lines hidden (view full) ---
547opLat=4
548
549[system.cpu0.icache]
550type=BaseCache
551children=tags
552addr_ranges=0:18446744073709551615
553assoc=2
554clk_domain=system.cpu_clk_domain
555eventq_index=0
556forward_snoops=true
557hit_latency=1
558is_top_level=true
559max_miss_count=0
560mshrs=2
561prefetch_on_access=false
562prefetcher=Null
563response_latency=1
564sequential_access=false
--- 50 unchanged lines hidden (view full) ---
615pmu=Null
616system=system
617
618[system.cpu0.istage2_mmu]
619type=ArmStage2MMU
620children=stage2_tlb
621eventq_index=0
622stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
623tlb=system.cpu0.itb
624
625[system.cpu0.istage2_mmu.stage2_tlb]
626type=ArmTLB
627children=walker
628eventq_index=0
629is_stage2=true
630size=32
631walker=system.cpu0.istage2_mmu.stage2_tlb.walker
632
633[system.cpu0.istage2_mmu.stage2_tlb.walker]
634type=ArmTableWalker
635clk_domain=system.cpu_clk_domain
636eventq_index=0
637is_stage2=true
638num_squash_per_cycle=2
639sys=system
640port=system.cpu0.toL2Bus.slave[4]
641
642[system.cpu0.itb]
643type=ArmTLB
644children=walker
645eventq_index=0
646is_stage2=false
647size=64
648walker=system.cpu0.itb.walker
--- 8 unchanged lines hidden (view full) ---
657port=system.cpu0.toL2Bus.slave[2]
658
659[system.cpu0.l2cache]
660type=BaseCache
661children=prefetcher tags
662addr_ranges=0:18446744073709551615
663assoc=16
664clk_domain=system.cpu_clk_domain
665eventq_index=0
666forward_snoops=true
667hit_latency=12
668is_top_level=false
669max_miss_count=0
670mshrs=16
671prefetch_on_access=true
672prefetcher=system.cpu0.l2cache.prefetcher
--- 5 unchanged lines hidden (view full) ---
678tgts_per_mshr=8
679two_queue=false
680write_buffers=8
681cpu_side=system.cpu0.toL2Bus.master[0]
682mem_side=system.toL2Bus.slave[0]
683
684[system.cpu0.l2cache.prefetcher]
685type=StridePrefetcher
686clk_domain=system.cpu_clk_domain
687cross_pages=false
688data_accesses_only=false
689degree=8
690eventq_index=0
691inst_tagged=true
692latency=1
693on_miss_only=false
694on_prefetch=true
695on_read_only=false
696serial_squash=false
697size=100
698sys=system
699use_master_id=true
700
701[system.cpu0.l2cache.tags]
702type=RandomRepl
703assoc=16
704block_size=64
705clk_domain=system.cpu_clk_domain
706eventq_index=0
707hit_latency=12
708sequential_access=false
709size=1048576
710
711[system.cpu0.toL2Bus]
712type=CoherentXBar
713clk_domain=system.cpu_clk_domain
714eventq_index=0
715header_cycles=1
716snoop_filter=Null
717system=system
718use_default_range=false
719width=32
720master=system.cpu0.l2cache.cpu_side
721slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port
722
723[system.cpu0.tracer]
724type=ExeTracer
725eventq_index=0
726
727[system.cpu1]
728type=DerivO3CPU
729children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
--- 81 unchanged lines hidden (view full) ---
811tracer=system.cpu1.tracer
812trapLatency=13
813wbWidth=8
814workload=
815dcache_port=system.cpu1.dcache.cpu_side
816icache_port=system.cpu1.icache.cpu_side
817
818[system.cpu1.branchPred]
819type=BranchPredictor
820BTBEntries=2048
821BTBTagSize=18
822RASSize=16
823choiceCtrBits=2
824choicePredictorSize=8192
825eventq_index=0
826globalCtrBits=2
827globalPredictorSize=8192
828instShiftAmt=2
829localCtrBits=2
830localHistoryTableSize=2048
831localPredictorSize=2048
832numThreads=1
833predType=bi-mode
834
835[system.cpu1.dcache]
836type=BaseCache
837children=tags
838addr_ranges=0:18446744073709551615
839assoc=2
840clk_domain=system.cpu_clk_domain
841eventq_index=0
842forward_snoops=true
843hit_latency=2
844is_top_level=true
845max_miss_count=0
846mshrs=6
847prefetch_on_access=false
848prefetcher=Null
--- 18 unchanged lines hidden (view full) ---
867sequential_access=false
868size=32768
869
870[system.cpu1.dstage2_mmu]
871type=ArmStage2MMU
872children=stage2_tlb
873eventq_index=0
874stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
875tlb=system.cpu1.dtb
876
877[system.cpu1.dstage2_mmu.stage2_tlb]
878type=ArmTLB
879children=walker
880eventq_index=0
881is_stage2=true
882size=32
883walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
884
885[system.cpu1.dstage2_mmu.stage2_tlb.walker]
886type=ArmTableWalker
887clk_domain=system.cpu_clk_domain
888eventq_index=0
889is_stage2=true
890num_squash_per_cycle=2
891sys=system
892port=system.cpu1.toL2Bus.slave[5]
893
894[system.cpu1.dtb]
895type=ArmTLB
896children=walker
897eventq_index=0
898is_stage2=false
899size=64
900walker=system.cpu1.dtb.walker
--- 273 unchanged lines hidden (view full) ---
1174opLat=4
1175
1176[system.cpu1.icache]
1177type=BaseCache
1178children=tags
1179addr_ranges=0:18446744073709551615
1180assoc=2
1181clk_domain=system.cpu_clk_domain
1182eventq_index=0
1183forward_snoops=true
1184hit_latency=1
1185is_top_level=true
1186max_miss_count=0
1187mshrs=2
1188prefetch_on_access=false
1189prefetcher=Null
1190response_latency=1
1191sequential_access=false
--- 50 unchanged lines hidden (view full) ---
1242pmu=Null
1243system=system
1244
1245[system.cpu1.istage2_mmu]
1246type=ArmStage2MMU
1247children=stage2_tlb
1248eventq_index=0
1249stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
1250tlb=system.cpu1.itb
1251
1252[system.cpu1.istage2_mmu.stage2_tlb]
1253type=ArmTLB
1254children=walker
1255eventq_index=0
1256is_stage2=true
1257size=32
1258walker=system.cpu1.istage2_mmu.stage2_tlb.walker
1259
1260[system.cpu1.istage2_mmu.stage2_tlb.walker]
1261type=ArmTableWalker
1262clk_domain=system.cpu_clk_domain
1263eventq_index=0
1264is_stage2=true
1265num_squash_per_cycle=2
1266sys=system
1267port=system.cpu1.toL2Bus.slave[4]
1268
1269[system.cpu1.itb]
1270type=ArmTLB
1271children=walker
1272eventq_index=0
1273is_stage2=false
1274size=64
1275walker=system.cpu1.itb.walker
--- 8 unchanged lines hidden (view full) ---
1284port=system.cpu1.toL2Bus.slave[2]
1285
1286[system.cpu1.l2cache]
1287type=BaseCache
1288children=prefetcher tags
1289addr_ranges=0:18446744073709551615
1290assoc=16
1291clk_domain=system.cpu_clk_domain
1292eventq_index=0
1293forward_snoops=true
1294hit_latency=12
1295is_top_level=false
1296max_miss_count=0
1297mshrs=16
1298prefetch_on_access=true
1299prefetcher=system.cpu1.l2cache.prefetcher
--- 5 unchanged lines hidden (view full) ---
1305tgts_per_mshr=8
1306two_queue=false
1307write_buffers=8
1308cpu_side=system.cpu1.toL2Bus.master[0]
1309mem_side=system.toL2Bus.slave[1]
1310
1311[system.cpu1.l2cache.prefetcher]
1312type=StridePrefetcher
1313clk_domain=system.cpu_clk_domain
1314cross_pages=false
1315data_accesses_only=false
1316degree=8
1317eventq_index=0
1318inst_tagged=true
1319latency=1
1320on_miss_only=false
1321on_prefetch=true
1322on_read_only=false
1323serial_squash=false
1324size=100
1325sys=system
1326use_master_id=true
1327
1328[system.cpu1.l2cache.tags]
1329type=RandomRepl
1330assoc=16
1331block_size=64
1332clk_domain=system.cpu_clk_domain
1333eventq_index=0
1334hit_latency=12
1335sequential_access=false
1336size=1048576
1337
1338[system.cpu1.toL2Bus]
1339type=CoherentXBar
1340clk_domain=system.cpu_clk_domain
1341eventq_index=0
1342header_cycles=1
1343snoop_filter=Null
1344system=system
1345use_default_range=false
1346width=32
1347master=system.cpu1.l2cache.cpu_side
1348slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.istage2_mmu.stage2_tlb.walker.port system.cpu1.dstage2_mmu.stage2_tlb.walker.port
1349
1350[system.cpu1.tracer]
1351type=ExeTracer
1352eventq_index=0
1353
1354[system.cpu_clk_domain]
1355type=SrcClockDomain
1356clock=500
--- 14 unchanged lines hidden (view full) ---
1371type=IntrControl
1372eventq_index=0
1373sys=system
1374
1375[system.iobus]
1376type=NoncoherentXBar
1377clk_domain=system.clk_domain
1378eventq_index=0
1379header_cycles=1
1380use_default_range=true
1381width=8
1382default=system.realview.pciconfig.pio
1383master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
1384slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
1385
1386[system.iocache]
1387type=BaseCache
1388children=tags
1389addr_ranges=2147483648:2415919103
1390assoc=8
1391clk_domain=system.clk_domain
1392eventq_index=0
1393forward_snoops=false
1394hit_latency=50
1395is_top_level=true
1396max_miss_count=0
1397mshrs=20
1398prefetch_on_access=false
1399prefetcher=Null
--- 19 unchanged lines hidden (view full) ---
1419size=1024
1420
1421[system.l2c]
1422type=BaseCache
1423children=tags
1424addr_ranges=0:18446744073709551615
1425assoc=8
1426clk_domain=system.cpu_clk_domain
1427eventq_index=0
1428forward_snoops=true
1429hit_latency=20
1430is_top_level=false
1431max_miss_count=0
1432mshrs=20
1433prefetch_on_access=false
1434prefetcher=Null
--- 18 unchanged lines hidden (view full) ---
1453sequential_access=false
1454size=4194304
1455
1456[system.membus]
1457type=CoherentXBar
1458children=badaddr_responder
1459clk_domain=system.clk_domain
1460eventq_index=0
1461header_cycles=1
1462snoop_filter=Null
1463system=system
1464use_default_range=false
1465width=8
1466default=system.membus.badaddr_responder.pio
1467master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
1468slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
1469
1470[system.membus.badaddr_responder]
1471type=IsaFake
1472clk_domain=system.clk_domain
1473eventq_index=0
1474fake_mem=false
1475pio_addr=0
--- 31 unchanged lines hidden (view full) ---
1507IDD4W2=0.000000
1508IDD5=0.220000
1509IDD52=0.000000
1510IDD6=0.000000
1511IDD62=0.000000
1512VDD=1.500000
1513VDD2=0.000000
1514activation_limit=4
1515addr_mapping=RoRaBaChCo
1516bank_groups_per_rank=0
1517banks_per_rank=8
1518burst_length=8
1519channels=1
1520clk_domain=system.clk_domain
1521conf_table_reported=true
1522device_bus_width=8
1523device_rowbuffer_size=1024
--- 287 unchanged lines hidden (view full) ---
1811clk_domain=system.clk_domain
1812cpu_addr=738205696
1813cpu_pio_delay=10000
1814dist_addr=738201600
1815dist_pio_delay=10000
1816eventq_index=0
1817int_latency=10000
1818it_lines=128
1819msix_addr=0
1820platform=system.realview
1821system=system
1822pio=system.membus.master[2]
1823
1824[system.realview.hdlcd]
1825type=HDLcd
1826amba_id=1314816
1827clk_domain=system.clk_domain
--- 170 unchanged lines hidden (view full) ---
1998clk_domain=system.clk_domain
1999eventq_index=0
2000gic=system.realview.gic
2001int_num_timer=29
2002int_num_watchdog=30
2003pio_addr=738721792
2004pio_latency=100000
2005system=system
2006pio=system.membus.master[3]
2007
2008[system.realview.mmc_fake]
2009type=AmbaFake
2010amba_id=0
2011clk_domain=system.clk_domain
2012eventq_index=0
2013ignore_access=false
2014pio_addr=470089728
--- 165 unchanged lines hidden (view full) ---
2180eventq_index=0
2181gic=system.realview.gic
2182hv_addr=738213888
2183pio_delay=10000
2184platform=system.realview
2185ppint=25
2186system=system
2187vcpu_addr=738222080
2188pio=system.membus.master[4]
2189
2190[system.realview.vram]
2191type=SimpleMemory
2192bandwidth=73.000000
2193clk_domain=system.clk_domain
2194conf_table_reported=false
2195eventq_index=0
2196in_addr_map=true
--- 21 unchanged lines hidden (view full) ---
2218number=0
2219output=true
2220port=3456
2221
2222[system.toL2Bus]
2223type=CoherentXBar
2224clk_domain=system.cpu_clk_domain
2225eventq_index=0
2226header_cycles=1
2227snoop_filter=Null
2228system=system
2229use_default_range=false
2230width=8
2231master=system.l2c.cpu_side
2232slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
2233
2234[system.vncserver]
2235type=VncServer
2236eventq_index=0
2237frame_capture=false
2238number=0
2239port=5900
2240
2241[system.voltage_domain]
2242type=VoltageDomain
2243eventq_index=0
2244voltage=1.000000
2245
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxArmSystem
13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
14atags_addr=134217728
15boot_loader=/dist/binaries/boot_emm.arm
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
17boot_release_addr=65528
18cache_line_size=64
19clk_domain=system.clk_domain
20dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
21early_kernel_symbols=false
22enable_context_switch_stats_dump=false
23eventq_index=0
24flags_addr=469827632
25gic_cpu_addr=738205696
26have_generic_timer=false
27have_large_asid_64=false
28have_lpae=false
29have_security=false
30have_virtualization=false
31highest_el_is_64=false
32init_param=0
33kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
34kernel_addr_check=true
35load_addr_mask=268435455
36load_offset=2147483648
37machine_type=VExpress_EMM
38mem_mode=timing
39mem_ranges=2147483648:2415919103
40memories=system.physmem system.realview.vram system.realview.nvmem
41multi_proc=true
42num_work_ids=16
43panic_on_oops=true
44panic_on_panic=true
45phys_addr_range_64=40
46readfile=/work/gem5.ext/tests/halt.sh
47reset_addr_64=0
48symbolfile=
49work_begin_ckpt_count=0
50work_begin_cpu_id_exit=-1
51work_begin_exit_count=0
52work_cpus_ckpt_count=0
53work_end_ckpt_count=0
54work_end_exit_count=0
--- 26 unchanged lines hidden (view full) ---
81eventq_index=0
82image_file=
83read_only=false
84table_size=65536
85
86[system.cf0.image.child]
87type=RawDiskImage
88eventq_index=0
89image_file=/dist/disks/linux-aarch32-ael.img
90read_only=true
91
92[system.clk_domain]
93type=SrcClockDomain
94clock=1000
95domain_id=-1
96eventq_index=0
97init_perf_level=0
--- 86 unchanged lines hidden (view full) ---
184tracer=system.cpu0.tracer
185trapLatency=13
186wbWidth=8
187workload=
188dcache_port=system.cpu0.dcache.cpu_side
189icache_port=system.cpu0.icache.cpu_side
190
191[system.cpu0.branchPred]
192type=BranchPredictor
193BTBEntries=2048
194BTBTagSize=18
195RASSize=16
196choiceCtrBits=2
197choicePredictorSize=8192
198eventq_index=0
199globalCtrBits=2
200globalPredictorSize=8192
201instShiftAmt=2
202localCtrBits=2
203localHistoryTableSize=2048
204localPredictorSize=2048
205numThreads=1
206predType=bi-mode
207
208[system.cpu0.dcache]
209type=BaseCache
210children=tags
211addr_ranges=0:18446744073709551615
212assoc=2
213clk_domain=system.cpu_clk_domain
214eventq_index=0
215forward_snoops=true
216hit_latency=2
217is_top_level=true
218max_miss_count=0
219mshrs=6
220prefetch_on_access=false
221prefetcher=Null
--- 18 unchanged lines hidden (view full) ---
240sequential_access=false
241size=32768
242
243[system.cpu0.dstage2_mmu]
244type=ArmStage2MMU
245children=stage2_tlb
246eventq_index=0
247stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
248tlb=system.cpu0.dtb
249
250[system.cpu0.dstage2_mmu.stage2_tlb]
251type=ArmTLB
252children=walker
253eventq_index=0
254is_stage2=true
255size=32
256walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
257
258[system.cpu0.dstage2_mmu.stage2_tlb.walker]
259type=ArmTableWalker
260clk_domain=system.cpu_clk_domain
261eventq_index=0
262is_stage2=true
263num_squash_per_cycle=2
264sys=system
265port=system.cpu0.toL2Bus.slave[5]
266
267[system.cpu0.dtb]
268type=ArmTLB
269children=walker
270eventq_index=0
271is_stage2=false
272size=64
273walker=system.cpu0.dtb.walker
--- 273 unchanged lines hidden (view full) ---
547opLat=4
548
549[system.cpu0.icache]
550type=BaseCache
551children=tags
552addr_ranges=0:18446744073709551615
553assoc=2
554clk_domain=system.cpu_clk_domain
555eventq_index=0
556forward_snoops=true
557hit_latency=1
558is_top_level=true
559max_miss_count=0
560mshrs=2
561prefetch_on_access=false
562prefetcher=Null
563response_latency=1
564sequential_access=false
--- 50 unchanged lines hidden (view full) ---
615pmu=Null
616system=system
617
618[system.cpu0.istage2_mmu]
619type=ArmStage2MMU
620children=stage2_tlb
621eventq_index=0
622stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
623tlb=system.cpu0.itb
624
625[system.cpu0.istage2_mmu.stage2_tlb]
626type=ArmTLB
627children=walker
628eventq_index=0
629is_stage2=true
630size=32
631walker=system.cpu0.istage2_mmu.stage2_tlb.walker
632
633[system.cpu0.istage2_mmu.stage2_tlb.walker]
634type=ArmTableWalker
635clk_domain=system.cpu_clk_domain
636eventq_index=0
637is_stage2=true
638num_squash_per_cycle=2
639sys=system
640port=system.cpu0.toL2Bus.slave[4]
641
642[system.cpu0.itb]
643type=ArmTLB
644children=walker
645eventq_index=0
646is_stage2=false
647size=64
648walker=system.cpu0.itb.walker
--- 8 unchanged lines hidden (view full) ---
657port=system.cpu0.toL2Bus.slave[2]
658
659[system.cpu0.l2cache]
660type=BaseCache
661children=prefetcher tags
662addr_ranges=0:18446744073709551615
663assoc=16
664clk_domain=system.cpu_clk_domain
665eventq_index=0
666forward_snoops=true
667hit_latency=12
668is_top_level=false
669max_miss_count=0
670mshrs=16
671prefetch_on_access=true
672prefetcher=system.cpu0.l2cache.prefetcher
--- 5 unchanged lines hidden (view full) ---
678tgts_per_mshr=8
679two_queue=false
680write_buffers=8
681cpu_side=system.cpu0.toL2Bus.master[0]
682mem_side=system.toL2Bus.slave[0]
683
684[system.cpu0.l2cache.prefetcher]
685type=StridePrefetcher
686clk_domain=system.cpu_clk_domain
687cross_pages=false
688data_accesses_only=false
689degree=8
690eventq_index=0
691inst_tagged=true
692latency=1
693on_miss_only=false
694on_prefetch=true
695on_read_only=false
696serial_squash=false
697size=100
698sys=system
699use_master_id=true
700
701[system.cpu0.l2cache.tags]
702type=RandomRepl
703assoc=16
704block_size=64
705clk_domain=system.cpu_clk_domain
706eventq_index=0
707hit_latency=12
708sequential_access=false
709size=1048576
710
711[system.cpu0.toL2Bus]
712type=CoherentXBar
713clk_domain=system.cpu_clk_domain
714eventq_index=0
715header_cycles=1
716snoop_filter=Null
717system=system
718use_default_range=false
719width=32
720master=system.cpu0.l2cache.cpu_side
721slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port
722
723[system.cpu0.tracer]
724type=ExeTracer
725eventq_index=0
726
727[system.cpu1]
728type=DerivO3CPU
729children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
--- 81 unchanged lines hidden (view full) ---
811tracer=system.cpu1.tracer
812trapLatency=13
813wbWidth=8
814workload=
815dcache_port=system.cpu1.dcache.cpu_side
816icache_port=system.cpu1.icache.cpu_side
817
818[system.cpu1.branchPred]
819type=BranchPredictor
820BTBEntries=2048
821BTBTagSize=18
822RASSize=16
823choiceCtrBits=2
824choicePredictorSize=8192
825eventq_index=0
826globalCtrBits=2
827globalPredictorSize=8192
828instShiftAmt=2
829localCtrBits=2
830localHistoryTableSize=2048
831localPredictorSize=2048
832numThreads=1
833predType=bi-mode
834
835[system.cpu1.dcache]
836type=BaseCache
837children=tags
838addr_ranges=0:18446744073709551615
839assoc=2
840clk_domain=system.cpu_clk_domain
841eventq_index=0
842forward_snoops=true
843hit_latency=2
844is_top_level=true
845max_miss_count=0
846mshrs=6
847prefetch_on_access=false
848prefetcher=Null
--- 18 unchanged lines hidden (view full) ---
867sequential_access=false
868size=32768
869
870[system.cpu1.dstage2_mmu]
871type=ArmStage2MMU
872children=stage2_tlb
873eventq_index=0
874stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
875tlb=system.cpu1.dtb
876
877[system.cpu1.dstage2_mmu.stage2_tlb]
878type=ArmTLB
879children=walker
880eventq_index=0
881is_stage2=true
882size=32
883walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
884
885[system.cpu1.dstage2_mmu.stage2_tlb.walker]
886type=ArmTableWalker
887clk_domain=system.cpu_clk_domain
888eventq_index=0
889is_stage2=true
890num_squash_per_cycle=2
891sys=system
892port=system.cpu1.toL2Bus.slave[5]
893
894[system.cpu1.dtb]
895type=ArmTLB
896children=walker
897eventq_index=0
898is_stage2=false
899size=64
900walker=system.cpu1.dtb.walker
--- 273 unchanged lines hidden (view full) ---
1174opLat=4
1175
1176[system.cpu1.icache]
1177type=BaseCache
1178children=tags
1179addr_ranges=0:18446744073709551615
1180assoc=2
1181clk_domain=system.cpu_clk_domain
1182eventq_index=0
1183forward_snoops=true
1184hit_latency=1
1185is_top_level=true
1186max_miss_count=0
1187mshrs=2
1188prefetch_on_access=false
1189prefetcher=Null
1190response_latency=1
1191sequential_access=false
--- 50 unchanged lines hidden (view full) ---
1242pmu=Null
1243system=system
1244
1245[system.cpu1.istage2_mmu]
1246type=ArmStage2MMU
1247children=stage2_tlb
1248eventq_index=0
1249stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
1250tlb=system.cpu1.itb
1251
1252[system.cpu1.istage2_mmu.stage2_tlb]
1253type=ArmTLB
1254children=walker
1255eventq_index=0
1256is_stage2=true
1257size=32
1258walker=system.cpu1.istage2_mmu.stage2_tlb.walker
1259
1260[system.cpu1.istage2_mmu.stage2_tlb.walker]
1261type=ArmTableWalker
1262clk_domain=system.cpu_clk_domain
1263eventq_index=0
1264is_stage2=true
1265num_squash_per_cycle=2
1266sys=system
1267port=system.cpu1.toL2Bus.slave[4]
1268
1269[system.cpu1.itb]
1270type=ArmTLB
1271children=walker
1272eventq_index=0
1273is_stage2=false
1274size=64
1275walker=system.cpu1.itb.walker
--- 8 unchanged lines hidden (view full) ---
1284port=system.cpu1.toL2Bus.slave[2]
1285
1286[system.cpu1.l2cache]
1287type=BaseCache
1288children=prefetcher tags
1289addr_ranges=0:18446744073709551615
1290assoc=16
1291clk_domain=system.cpu_clk_domain
1292eventq_index=0
1293forward_snoops=true
1294hit_latency=12
1295is_top_level=false
1296max_miss_count=0
1297mshrs=16
1298prefetch_on_access=true
1299prefetcher=system.cpu1.l2cache.prefetcher
--- 5 unchanged lines hidden (view full) ---
1305tgts_per_mshr=8
1306two_queue=false
1307write_buffers=8
1308cpu_side=system.cpu1.toL2Bus.master[0]
1309mem_side=system.toL2Bus.slave[1]
1310
1311[system.cpu1.l2cache.prefetcher]
1312type=StridePrefetcher
1313clk_domain=system.cpu_clk_domain
1314cross_pages=false
1315data_accesses_only=false
1316degree=8
1317eventq_index=0
1318inst_tagged=true
1319latency=1
1320on_miss_only=false
1321on_prefetch=true
1322on_read_only=false
1323serial_squash=false
1324size=100
1325sys=system
1326use_master_id=true
1327
1328[system.cpu1.l2cache.tags]
1329type=RandomRepl
1330assoc=16
1331block_size=64
1332clk_domain=system.cpu_clk_domain
1333eventq_index=0
1334hit_latency=12
1335sequential_access=false
1336size=1048576
1337
1338[system.cpu1.toL2Bus]
1339type=CoherentXBar
1340clk_domain=system.cpu_clk_domain
1341eventq_index=0
1342header_cycles=1
1343snoop_filter=Null
1344system=system
1345use_default_range=false
1346width=32
1347master=system.cpu1.l2cache.cpu_side
1348slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.istage2_mmu.stage2_tlb.walker.port system.cpu1.dstage2_mmu.stage2_tlb.walker.port
1349
1350[system.cpu1.tracer]
1351type=ExeTracer
1352eventq_index=0
1353
1354[system.cpu_clk_domain]
1355type=SrcClockDomain
1356clock=500
--- 14 unchanged lines hidden (view full) ---
1371type=IntrControl
1372eventq_index=0
1373sys=system
1374
1375[system.iobus]
1376type=NoncoherentXBar
1377clk_domain=system.clk_domain
1378eventq_index=0
1379header_cycles=1
1380use_default_range=true
1381width=8
1382default=system.realview.pciconfig.pio
1383master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
1384slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
1385
1386[system.iocache]
1387type=BaseCache
1388children=tags
1389addr_ranges=2147483648:2415919103
1390assoc=8
1391clk_domain=system.clk_domain
1392eventq_index=0
1393forward_snoops=false
1394hit_latency=50
1395is_top_level=true
1396max_miss_count=0
1397mshrs=20
1398prefetch_on_access=false
1399prefetcher=Null
--- 19 unchanged lines hidden (view full) ---
1419size=1024
1420
1421[system.l2c]
1422type=BaseCache
1423children=tags
1424addr_ranges=0:18446744073709551615
1425assoc=8
1426clk_domain=system.cpu_clk_domain
1427eventq_index=0
1428forward_snoops=true
1429hit_latency=20
1430is_top_level=false
1431max_miss_count=0
1432mshrs=20
1433prefetch_on_access=false
1434prefetcher=Null
--- 18 unchanged lines hidden (view full) ---
1453sequential_access=false
1454size=4194304
1455
1456[system.membus]
1457type=CoherentXBar
1458children=badaddr_responder
1459clk_domain=system.clk_domain
1460eventq_index=0
1461header_cycles=1
1462snoop_filter=Null
1463system=system
1464use_default_range=false
1465width=8
1466default=system.membus.badaddr_responder.pio
1467master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
1468slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
1469
1470[system.membus.badaddr_responder]
1471type=IsaFake
1472clk_domain=system.clk_domain
1473eventq_index=0
1474fake_mem=false
1475pio_addr=0
--- 31 unchanged lines hidden (view full) ---
1507IDD4W2=0.000000
1508IDD5=0.220000
1509IDD52=0.000000
1510IDD6=0.000000
1511IDD62=0.000000
1512VDD=1.500000
1513VDD2=0.000000
1514activation_limit=4
1515addr_mapping=RoRaBaChCo
1516bank_groups_per_rank=0
1517banks_per_rank=8
1518burst_length=8
1519channels=1
1520clk_domain=system.clk_domain
1521conf_table_reported=true
1522device_bus_width=8
1523device_rowbuffer_size=1024
--- 287 unchanged lines hidden (view full) ---
1811clk_domain=system.clk_domain
1812cpu_addr=738205696
1813cpu_pio_delay=10000
1814dist_addr=738201600
1815dist_pio_delay=10000
1816eventq_index=0
1817int_latency=10000
1818it_lines=128
1819msix_addr=0
1820platform=system.realview
1821system=system
1822pio=system.membus.master[2]
1823
1824[system.realview.hdlcd]
1825type=HDLcd
1826amba_id=1314816
1827clk_domain=system.clk_domain
--- 170 unchanged lines hidden (view full) ---
1998clk_domain=system.clk_domain
1999eventq_index=0
2000gic=system.realview.gic
2001int_num_timer=29
2002int_num_watchdog=30
2003pio_addr=738721792
2004pio_latency=100000
2005system=system
2006pio=system.membus.master[3]
2007
2008[system.realview.mmc_fake]
2009type=AmbaFake
2010amba_id=0
2011clk_domain=system.clk_domain
2012eventq_index=0
2013ignore_access=false
2014pio_addr=470089728
--- 165 unchanged lines hidden (view full) ---
2180eventq_index=0
2181gic=system.realview.gic
2182hv_addr=738213888
2183pio_delay=10000
2184platform=system.realview
2185ppint=25
2186system=system
2187vcpu_addr=738222080
2188pio=system.membus.master[4]
2189
2190[system.realview.vram]
2191type=SimpleMemory
2192bandwidth=73.000000
2193clk_domain=system.clk_domain
2194conf_table_reported=false
2195eventq_index=0
2196in_addr_map=true
--- 21 unchanged lines hidden (view full) ---
2218number=0
2219output=true
2220port=3456
2221
2222[system.toL2Bus]
2223type=CoherentXBar
2224clk_domain=system.cpu_clk_domain
2225eventq_index=0
2226header_cycles=1
2227snoop_filter=Null
2228system=system
2229use_default_range=false
2230width=8
2231master=system.l2c.cpu_side
2232slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
2233
2234[system.vncserver]
2235type=VncServer
2236eventq_index=0
2237frame_capture=false
2238number=0
2239port=5900
2240
2241[system.voltage_domain]
2242type=VoltageDomain
2243eventq_index=0
2244voltage=1.000000
2245