config.ini (8983:8800b05e1cb3) config.ini (9055:38f1926fb599)
1[root]
2type=Root
3children=system
4full_system=true
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8

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507image_file=/dist/m5/system/disks/linux-bigswap2.img
508read_only=true
509
510[system.intrctrl]
511type=IntrControl
512sys=system
513
514[system.iobus]
1[root]
2type=Root
3children=system
4full_system=true
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8

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507image_file=/dist/m5/system/disks/linux-bigswap2.img
508read_only=true
509
510[system.intrctrl]
511type=IntrControl
512sys=system
513
514[system.iobus]
515type=Bus
515type=NoncoherentBus
516block_size=64
516block_size=64
517bus_id=0
518clock=1000
519header_cycles=1
520use_default_range=true
521width=64
522default=system.tsunami.pciconfig.pio
523master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
524slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
525

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569tgts_per_mshr=16
570trace_addr=0
571two_queue=false
572write_buffers=8
573cpu_side=system.toL2Bus.master[0]
574mem_side=system.membus.slave[2]
575
576[system.membus]
517clock=1000
518header_cycles=1
519use_default_range=true
520width=64
521default=system.tsunami.pciconfig.pio
522master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
523slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
524

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568tgts_per_mshr=16
569trace_addr=0
570two_queue=false
571write_buffers=8
572cpu_side=system.toL2Bus.master[0]
573mem_side=system.membus.slave[2]
574
575[system.membus]
577type=Bus
576type=CoherentBus
578children=badaddr_responder
579block_size=64
577children=badaddr_responder
578block_size=64
580bus_id=1
581clock=1000
582header_cycles=1
583use_default_range=false
584width=64
585default=system.membus.badaddr_responder.pio
586master=system.bridge.slave system.physmem.port[0]
587slave=system.system_port system.iocache.mem_side system.l2c.mem_side
588

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628[system.terminal]
629type=Terminal
630intr_control=system.intrctrl
631number=0
632output=true
633port=3456
634
635[system.toL2Bus]
579clock=1000
580header_cycles=1
581use_default_range=false
582width=64
583default=system.membus.badaddr_responder.pio
584master=system.bridge.slave system.physmem.port[0]
585slave=system.system_port system.iocache.mem_side system.l2c.mem_side
586

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626[system.terminal]
627type=Terminal
628intr_control=system.intrctrl
629number=0
630output=true
631port=3456
632
633[system.toL2Bus]
636type=Bus
634type=CoherentBus
637block_size=64
635block_size=64
638bus_id=0
639clock=1000
640header_cycles=1
641use_default_range=false
642width=64
643master=system.l2c.cpu_side
644slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
645
646[system.tsunami]

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636clock=1000
637header_cycles=1
638use_default_range=false
639width=64
640master=system.l2c.cpu_side
641slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
642
643[system.tsunami]

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