config.ini (9885:afd9ea6101d9) config.ini (9924:31ef410b6843)
1[root]
2type=Root
3children=system
4full_system=true
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=LinuxAlphaSystem
11children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
12boot_cpu_frequency=500
13boot_osflags=root=/dev/hda1 console=ttyS0
14cache_line_size=64
15clk_domain=system.clk_domain
16console=/dist/m5/system/binaries/console
17init_param=0
18kernel=/dist/m5/system/binaries/vmlinux
19load_addr_mask=1099511627775
20mem_mode=timing
21mem_ranges=0:134217727
22memories=system.physmem
23num_work_ids=16
24pal=/dist/m5/system/binaries/ts_osfpal
25readfile=tests/halt.sh
26symbolfile=
27system_rev=1024
28system_type=34
29work_begin_ckpt_count=0
30work_begin_cpu_id_exit=-1
31work_begin_exit_count=0
32work_cpus_ckpt_count=0
33work_end_ckpt_count=0
34work_end_exit_count=0
35work_item_id=-1
36system_port=system.membus.slave[0]
37
38[system.bridge]
39type=Bridge
40clk_domain=system.clk_domain
41delay=50000
42ranges=8796093022208:18446744073709551615
43req_size=16
44resp_size=16
45master=system.iobus.slave[0]
46slave=system.membus.master[0]
47
48[system.clk_domain]
49type=SrcClockDomain
50clock=1000
51voltage_domain=system.voltage_domain
52
53[system.cpu]
54type=DerivO3CPU
55children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
56LFSTSize=1024
57LQEntries=32
58LSQCheckLoads=true
59LSQDepCheckShift=4
60SQEntries=32
61SSITSize=1024
62activity=0
63backComSize=5
64branchPred=system.cpu.branchPred
65cachePorts=200
66checker=Null
67clk_domain=system.cpu_clk_domain
68commitToDecodeDelay=1
69commitToFetchDelay=1
70commitToIEWDelay=1
71commitToRenameDelay=1
72commitWidth=8
73cpu_id=0
74decodeToFetchDelay=1
75decodeToRenameDelay=1
76decodeWidth=8
77dispatchWidth=8
78do_checkpoint_insts=true
79do_quiesce=true
80do_statistics_insts=true
81dtb=system.cpu.dtb
82fetchToDecodeDelay=1
83fetchTrapLatency=1
84fetchWidth=8
85forwardComSize=5
86fuPool=system.cpu.fuPool
87function_trace=false
88function_trace_start=0
89iewToCommitDelay=1
90iewToDecodeDelay=1
91iewToFetchDelay=1
92iewToRenameDelay=1
93interrupts=system.cpu.interrupts
94isa=system.cpu.isa
95issueToExecuteDelay=1
96issueWidth=8
97itb=system.cpu.itb
98max_insts_all_threads=0
99max_insts_any_thread=0
100max_loads_all_threads=0
101max_loads_any_thread=0
102needsTSO=false
103numIQEntries=64
1[root]
2type=Root
3children=system
4full_system=true
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=LinuxAlphaSystem
11children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
12boot_cpu_frequency=500
13boot_osflags=root=/dev/hda1 console=ttyS0
14cache_line_size=64
15clk_domain=system.clk_domain
16console=/dist/m5/system/binaries/console
17init_param=0
18kernel=/dist/m5/system/binaries/vmlinux
19load_addr_mask=1099511627775
20mem_mode=timing
21mem_ranges=0:134217727
22memories=system.physmem
23num_work_ids=16
24pal=/dist/m5/system/binaries/ts_osfpal
25readfile=tests/halt.sh
26symbolfile=
27system_rev=1024
28system_type=34
29work_begin_ckpt_count=0
30work_begin_cpu_id_exit=-1
31work_begin_exit_count=0
32work_cpus_ckpt_count=0
33work_end_ckpt_count=0
34work_end_exit_count=0
35work_item_id=-1
36system_port=system.membus.slave[0]
37
38[system.bridge]
39type=Bridge
40clk_domain=system.clk_domain
41delay=50000
42ranges=8796093022208:18446744073709551615
43req_size=16
44resp_size=16
45master=system.iobus.slave[0]
46slave=system.membus.master[0]
47
48[system.clk_domain]
49type=SrcClockDomain
50clock=1000
51voltage_domain=system.voltage_domain
52
53[system.cpu]
54type=DerivO3CPU
55children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
56LFSTSize=1024
57LQEntries=32
58LSQCheckLoads=true
59LSQDepCheckShift=4
60SQEntries=32
61SSITSize=1024
62activity=0
63backComSize=5
64branchPred=system.cpu.branchPred
65cachePorts=200
66checker=Null
67clk_domain=system.cpu_clk_domain
68commitToDecodeDelay=1
69commitToFetchDelay=1
70commitToIEWDelay=1
71commitToRenameDelay=1
72commitWidth=8
73cpu_id=0
74decodeToFetchDelay=1
75decodeToRenameDelay=1
76decodeWidth=8
77dispatchWidth=8
78do_checkpoint_insts=true
79do_quiesce=true
80do_statistics_insts=true
81dtb=system.cpu.dtb
82fetchToDecodeDelay=1
83fetchTrapLatency=1
84fetchWidth=8
85forwardComSize=5
86fuPool=system.cpu.fuPool
87function_trace=false
88function_trace_start=0
89iewToCommitDelay=1
90iewToDecodeDelay=1
91iewToFetchDelay=1
92iewToRenameDelay=1
93interrupts=system.cpu.interrupts
94isa=system.cpu.isa
95issueToExecuteDelay=1
96issueWidth=8
97itb=system.cpu.itb
98max_insts_all_threads=0
99max_insts_any_thread=0
100max_loads_all_threads=0
101max_loads_any_thread=0
102needsTSO=false
103numIQEntries=64
104numPhysCCRegs=0
104numPhysFloatRegs=256
105numPhysIntRegs=256
106numROBEntries=192
107numRobs=1
108numThreads=1
109profile=0
110progress_interval=0
111renameToDecodeDelay=1
112renameToFetchDelay=1
113renameToIEWDelay=2
114renameToROBDelay=1
115renameWidth=8
116simpoint_start_insts=
117smtCommitPolicy=RoundRobin
118smtFetchPolicy=SingleThread
119smtIQPolicy=Partitioned
120smtIQThreshold=100
121smtLSQPolicy=Partitioned
122smtLSQThreshold=100
123smtNumFetchingThreads=1
124smtROBPolicy=Partitioned
125smtROBThreshold=100
126squashWidth=8
127store_set_clear_period=250000
128switched_out=false
129system=system
130tracer=system.cpu.tracer
131trapLatency=13
132wbDepth=1
133wbWidth=8
134workload=
135dcache_port=system.cpu.dcache.cpu_side
136icache_port=system.cpu.icache.cpu_side
137
138[system.cpu.branchPred]
139type=BranchPredictor
140BTBEntries=4096
141BTBTagSize=16
142RASSize=16
143choiceCtrBits=2
144choicePredictorSize=8192
145globalCtrBits=2
146globalPredictorSize=8192
147instShiftAmt=2
148localCtrBits=2
149localHistoryTableSize=2048
150localPredictorSize=2048
151numThreads=1
152predType=tournament
153
154[system.cpu.dcache]
155type=BaseCache
156children=tags
157addr_ranges=0:18446744073709551615
158assoc=4
159clk_domain=system.cpu_clk_domain
160forward_snoops=true
161hit_latency=2
162is_top_level=true
163max_miss_count=0
164mshrs=4
165prefetch_on_access=false
166prefetcher=Null
167response_latency=2
168size=32768
169system=system
170tags=system.cpu.dcache.tags
171tgts_per_mshr=20
172two_queue=false
173write_buffers=8
174cpu_side=system.cpu.dcache_port
175mem_side=system.cpu.toL2Bus.slave[1]
176
177[system.cpu.dcache.tags]
178type=LRU
179assoc=4
180block_size=64
181clk_domain=system.cpu_clk_domain
182hit_latency=2
183size=32768
184
185[system.cpu.dtb]
186type=AlphaTLB
187size=64
188
189[system.cpu.fuPool]
190type=FUPool
191children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
192FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
193
194[system.cpu.fuPool.FUList0]
195type=FUDesc
196children=opList
197count=6
198opList=system.cpu.fuPool.FUList0.opList
199
200[system.cpu.fuPool.FUList0.opList]
201type=OpDesc
202issueLat=1
203opClass=IntAlu
204opLat=1
205
206[system.cpu.fuPool.FUList1]
207type=FUDesc
208children=opList0 opList1
209count=2
210opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
211
212[system.cpu.fuPool.FUList1.opList0]
213type=OpDesc
214issueLat=1
215opClass=IntMult
216opLat=3
217
218[system.cpu.fuPool.FUList1.opList1]
219type=OpDesc
220issueLat=19
221opClass=IntDiv
222opLat=20
223
224[system.cpu.fuPool.FUList2]
225type=FUDesc
226children=opList0 opList1 opList2
227count=4
228opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
229
230[system.cpu.fuPool.FUList2.opList0]
231type=OpDesc
232issueLat=1
233opClass=FloatAdd
234opLat=2
235
236[system.cpu.fuPool.FUList2.opList1]
237type=OpDesc
238issueLat=1
239opClass=FloatCmp
240opLat=2
241
242[system.cpu.fuPool.FUList2.opList2]
243type=OpDesc
244issueLat=1
245opClass=FloatCvt
246opLat=2
247
248[system.cpu.fuPool.FUList3]
249type=FUDesc
250children=opList0 opList1 opList2
251count=2
252opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
253
254[system.cpu.fuPool.FUList3.opList0]
255type=OpDesc
256issueLat=1
257opClass=FloatMult
258opLat=4
259
260[system.cpu.fuPool.FUList3.opList1]
261type=OpDesc
262issueLat=12
263opClass=FloatDiv
264opLat=12
265
266[system.cpu.fuPool.FUList3.opList2]
267type=OpDesc
268issueLat=24
269opClass=FloatSqrt
270opLat=24
271
272[system.cpu.fuPool.FUList4]
273type=FUDesc
274children=opList
275count=0
276opList=system.cpu.fuPool.FUList4.opList
277
278[system.cpu.fuPool.FUList4.opList]
279type=OpDesc
280issueLat=1
281opClass=MemRead
282opLat=1
283
284[system.cpu.fuPool.FUList5]
285type=FUDesc
286children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
287count=4
288opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
289
290[system.cpu.fuPool.FUList5.opList00]
291type=OpDesc
292issueLat=1
293opClass=SimdAdd
294opLat=1
295
296[system.cpu.fuPool.FUList5.opList01]
297type=OpDesc
298issueLat=1
299opClass=SimdAddAcc
300opLat=1
301
302[system.cpu.fuPool.FUList5.opList02]
303type=OpDesc
304issueLat=1
305opClass=SimdAlu
306opLat=1
307
308[system.cpu.fuPool.FUList5.opList03]
309type=OpDesc
310issueLat=1
311opClass=SimdCmp
312opLat=1
313
314[system.cpu.fuPool.FUList5.opList04]
315type=OpDesc
316issueLat=1
317opClass=SimdCvt
318opLat=1
319
320[system.cpu.fuPool.FUList5.opList05]
321type=OpDesc
322issueLat=1
323opClass=SimdMisc
324opLat=1
325
326[system.cpu.fuPool.FUList5.opList06]
327type=OpDesc
328issueLat=1
329opClass=SimdMult
330opLat=1
331
332[system.cpu.fuPool.FUList5.opList07]
333type=OpDesc
334issueLat=1
335opClass=SimdMultAcc
336opLat=1
337
338[system.cpu.fuPool.FUList5.opList08]
339type=OpDesc
340issueLat=1
341opClass=SimdShift
342opLat=1
343
344[system.cpu.fuPool.FUList5.opList09]
345type=OpDesc
346issueLat=1
347opClass=SimdShiftAcc
348opLat=1
349
350[system.cpu.fuPool.FUList5.opList10]
351type=OpDesc
352issueLat=1
353opClass=SimdSqrt
354opLat=1
355
356[system.cpu.fuPool.FUList5.opList11]
357type=OpDesc
358issueLat=1
359opClass=SimdFloatAdd
360opLat=1
361
362[system.cpu.fuPool.FUList5.opList12]
363type=OpDesc
364issueLat=1
365opClass=SimdFloatAlu
366opLat=1
367
368[system.cpu.fuPool.FUList5.opList13]
369type=OpDesc
370issueLat=1
371opClass=SimdFloatCmp
372opLat=1
373
374[system.cpu.fuPool.FUList5.opList14]
375type=OpDesc
376issueLat=1
377opClass=SimdFloatCvt
378opLat=1
379
380[system.cpu.fuPool.FUList5.opList15]
381type=OpDesc
382issueLat=1
383opClass=SimdFloatDiv
384opLat=1
385
386[system.cpu.fuPool.FUList5.opList16]
387type=OpDesc
388issueLat=1
389opClass=SimdFloatMisc
390opLat=1
391
392[system.cpu.fuPool.FUList5.opList17]
393type=OpDesc
394issueLat=1
395opClass=SimdFloatMult
396opLat=1
397
398[system.cpu.fuPool.FUList5.opList18]
399type=OpDesc
400issueLat=1
401opClass=SimdFloatMultAcc
402opLat=1
403
404[system.cpu.fuPool.FUList5.opList19]
405type=OpDesc
406issueLat=1
407opClass=SimdFloatSqrt
408opLat=1
409
410[system.cpu.fuPool.FUList6]
411type=FUDesc
412children=opList
413count=0
414opList=system.cpu.fuPool.FUList6.opList
415
416[system.cpu.fuPool.FUList6.opList]
417type=OpDesc
418issueLat=1
419opClass=MemWrite
420opLat=1
421
422[system.cpu.fuPool.FUList7]
423type=FUDesc
424children=opList0 opList1
425count=4
426opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
427
428[system.cpu.fuPool.FUList7.opList0]
429type=OpDesc
430issueLat=1
431opClass=MemRead
432opLat=1
433
434[system.cpu.fuPool.FUList7.opList1]
435type=OpDesc
436issueLat=1
437opClass=MemWrite
438opLat=1
439
440[system.cpu.fuPool.FUList8]
441type=FUDesc
442children=opList
443count=1
444opList=system.cpu.fuPool.FUList8.opList
445
446[system.cpu.fuPool.FUList8.opList]
447type=OpDesc
448issueLat=3
449opClass=IprAccess
450opLat=3
451
452[system.cpu.icache]
453type=BaseCache
454children=tags
455addr_ranges=0:18446744073709551615
456assoc=1
457clk_domain=system.cpu_clk_domain
458forward_snoops=true
459hit_latency=2
460is_top_level=true
461max_miss_count=0
462mshrs=4
463prefetch_on_access=false
464prefetcher=Null
465response_latency=2
466size=32768
467system=system
468tags=system.cpu.icache.tags
469tgts_per_mshr=20
470two_queue=false
471write_buffers=8
472cpu_side=system.cpu.icache_port
473mem_side=system.cpu.toL2Bus.slave[0]
474
475[system.cpu.icache.tags]
476type=LRU
477assoc=1
478block_size=64
479clk_domain=system.cpu_clk_domain
480hit_latency=2
481size=32768
482
483[system.cpu.interrupts]
484type=AlphaInterrupts
485
486[system.cpu.isa]
487type=AlphaISA
488
489[system.cpu.itb]
490type=AlphaTLB
491size=48
492
493[system.cpu.l2cache]
494type=BaseCache
495children=tags
496addr_ranges=0:18446744073709551615
497assoc=8
498clk_domain=system.cpu_clk_domain
499forward_snoops=true
500hit_latency=20
501is_top_level=false
502max_miss_count=0
503mshrs=20
504prefetch_on_access=false
505prefetcher=Null
506response_latency=20
507size=4194304
508system=system
509tags=system.cpu.l2cache.tags
510tgts_per_mshr=12
511two_queue=false
512write_buffers=8
513cpu_side=system.cpu.toL2Bus.master[0]
514mem_side=system.membus.slave[1]
515
516[system.cpu.l2cache.tags]
517type=LRU
518assoc=8
519block_size=64
520clk_domain=system.cpu_clk_domain
521hit_latency=20
522size=4194304
523
524[system.cpu.toL2Bus]
525type=CoherentBus
526clk_domain=system.cpu_clk_domain
527header_cycles=1
528system=system
529use_default_range=false
530width=32
531master=system.cpu.l2cache.cpu_side
532slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
533
534[system.cpu.tracer]
535type=ExeTracer
536
537[system.cpu_clk_domain]
538type=SrcClockDomain
539clock=500
540voltage_domain=system.voltage_domain
541
542[system.disk0]
543type=IdeDisk
544children=image
545delay=1000000
546driveID=master
547image=system.disk0.image
548
549[system.disk0.image]
550type=CowDiskImage
551children=child
552child=system.disk0.image.child
553image_file=
554read_only=false
555table_size=65536
556
557[system.disk0.image.child]
558type=RawDiskImage
559image_file=/dist/m5/system/disks/linux-latest.img
560read_only=true
561
562[system.disk2]
563type=IdeDisk
564children=image
565delay=1000000
566driveID=master
567image=system.disk2.image
568
569[system.disk2.image]
570type=CowDiskImage
571children=child
572child=system.disk2.image.child
573image_file=
574read_only=false
575table_size=65536
576
577[system.disk2.image.child]
578type=RawDiskImage
579image_file=/dist/m5/system/disks/linux-bigswap2.img
580read_only=true
581
582[system.intrctrl]
583type=IntrControl
584sys=system
585
586[system.iobus]
587type=NoncoherentBus
588clk_domain=system.clk_domain
589header_cycles=1
590use_default_range=true
591width=8
592default=system.tsunami.pciconfig.pio
593master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
594slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
595
596[system.iocache]
597type=BaseCache
598children=tags
599addr_ranges=0:134217727
600assoc=8
601clk_domain=system.clk_domain
602forward_snoops=false
603hit_latency=50
604is_top_level=true
605max_miss_count=0
606mshrs=20
607prefetch_on_access=false
608prefetcher=Null
609response_latency=50
610size=1024
611system=system
612tags=system.iocache.tags
613tgts_per_mshr=12
614two_queue=false
615write_buffers=8
616cpu_side=system.iobus.master[29]
617mem_side=system.membus.slave[2]
618
619[system.iocache.tags]
620type=LRU
621assoc=8
622block_size=64
623clk_domain=system.clk_domain
624hit_latency=50
625size=1024
626
627[system.membus]
628type=CoherentBus
629children=badaddr_responder
630clk_domain=system.clk_domain
631header_cycles=1
632system=system
633use_default_range=false
634width=8
635default=system.membus.badaddr_responder.pio
636master=system.bridge.slave system.physmem.port
637slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
638
639[system.membus.badaddr_responder]
640type=IsaFake
641clk_domain=system.clk_domain
642fake_mem=false
643pio_addr=0
644pio_latency=100000
645pio_size=8
646ret_bad_addr=true
647ret_data16=65535
648ret_data32=4294967295
649ret_data64=18446744073709551615
650ret_data8=255
651system=system
652update_data=false
653warn_access=
654pio=system.membus.default
655
656[system.physmem]
657type=SimpleDRAM
658activation_limit=4
659addr_mapping=RaBaChCo
660banks_per_rank=8
661burst_length=8
662channels=1
663clk_domain=system.clk_domain
664conf_table_reported=true
665device_bus_width=8
666device_rowbuffer_size=1024
667devices_per_rank=8
668in_addr_map=true
669mem_sched_policy=frfcfs
670null=false
671page_policy=open
672range=0:134217727
673ranks_per_channel=2
674read_buffer_size=32
675static_backend_latency=10000
676static_frontend_latency=10000
677tBURST=5000
678tCL=13750
679tRCD=13750
680tREFI=7800000
681tRFC=300000
682tRP=13750
683tWTR=7500
684tXAW=40000
685write_buffer_size=32
686write_thresh_perc=70
687port=system.membus.master[1]
688
689[system.simple_disk]
690type=SimpleDisk
691children=disk
692disk=system.simple_disk.disk
693system=system
694
695[system.simple_disk.disk]
696type=RawDiskImage
697image_file=/dist/m5/system/disks/linux-latest.img
698read_only=true
699
700[system.terminal]
701type=Terminal
702intr_control=system.intrctrl
703number=0
704output=true
705port=3456
706
707[system.tsunami]
708type=Tsunami
709children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
710intrctrl=system.intrctrl
711system=system
712
713[system.tsunami.backdoor]
714type=AlphaBackdoor
715clk_domain=system.clk_domain
716cpu=system.cpu
717disk=system.simple_disk
718pio_addr=8804682956800
719pio_latency=100000
720platform=system.tsunami
721system=system
722terminal=system.terminal
723pio=system.iobus.master[24]
724
725[system.tsunami.cchip]
726type=TsunamiCChip
727clk_domain=system.clk_domain
728pio_addr=8803072344064
729pio_latency=100000
730system=system
731tsunami=system.tsunami
732pio=system.iobus.master[0]
733
734[system.tsunami.ethernet]
735type=NSGigE
736BAR0=1
737BAR0LegacyIO=false
738BAR0Size=256
739BAR1=0
740BAR1LegacyIO=false
741BAR1Size=4096
742BAR2=0
743BAR2LegacyIO=false
744BAR2Size=0
745BAR3=0
746BAR3LegacyIO=false
747BAR3Size=0
748BAR4=0
749BAR4LegacyIO=false
750BAR4Size=0
751BAR5=0
752BAR5LegacyIO=false
753BAR5Size=0
754BIST=0
755CacheLineSize=0
756CardbusCIS=0
757ClassCode=2
758Command=0
759DeviceID=34
760ExpansionROM=0
761HeaderType=0
762InterruptLine=30
763InterruptPin=1
764LatencyTimer=0
765MaximumLatency=52
766MinimumGrant=176
767ProgIF=0
768Revision=0
769Status=656
770SubClassCode=0
771SubsystemID=0
772SubsystemVendorID=0
773VendorID=4107
774clk_domain=system.clk_domain
775config_latency=20000
776dma_data_free=false
777dma_desc_free=false
778dma_no_allocate=true
779dma_read_delay=0
780dma_read_factor=0
781dma_write_delay=0
782dma_write_factor=0
783hardware_address=00:90:00:00:00:01
784intr_delay=10000000
785pci_bus=0
786pci_dev=1
787pci_func=0
788pio_latency=30000
789platform=system.tsunami
790rss=false
791rx_delay=1000000
792rx_fifo_size=524288
793rx_filter=true
794rx_thread=false
795system=system
796tx_delay=1000000
797tx_fifo_size=524288
798tx_thread=false
799config=system.iobus.master[28]
800dma=system.iobus.slave[2]
801pio=system.iobus.master[27]
802
803[system.tsunami.fake_OROM]
804type=IsaFake
805clk_domain=system.clk_domain
806fake_mem=false
807pio_addr=8796093677568
808pio_latency=100000
809pio_size=393216
810ret_bad_addr=false
811ret_data16=65535
812ret_data32=4294967295
813ret_data64=18446744073709551615
814ret_data8=255
815system=system
816update_data=false
817warn_access=
818pio=system.iobus.master[8]
819
820[system.tsunami.fake_ata0]
821type=IsaFake
822clk_domain=system.clk_domain
823fake_mem=false
824pio_addr=8804615848432
825pio_latency=100000
826pio_size=8
827ret_bad_addr=false
828ret_data16=65535
829ret_data32=4294967295
830ret_data64=18446744073709551615
831ret_data8=255
832system=system
833update_data=false
834warn_access=
835pio=system.iobus.master[19]
836
837[system.tsunami.fake_ata1]
838type=IsaFake
839clk_domain=system.clk_domain
840fake_mem=false
841pio_addr=8804615848304
842pio_latency=100000
843pio_size=8
844ret_bad_addr=false
845ret_data16=65535
846ret_data32=4294967295
847ret_data64=18446744073709551615
848ret_data8=255
849system=system
850update_data=false
851warn_access=
852pio=system.iobus.master[20]
853
854[system.tsunami.fake_pnp_addr]
855type=IsaFake
856clk_domain=system.clk_domain
857fake_mem=false
858pio_addr=8804615848569
859pio_latency=100000
860pio_size=8
861ret_bad_addr=false
862ret_data16=65535
863ret_data32=4294967295
864ret_data64=18446744073709551615
865ret_data8=255
866system=system
867update_data=false
868warn_access=
869pio=system.iobus.master[9]
870
871[system.tsunami.fake_pnp_read0]
872type=IsaFake
873clk_domain=system.clk_domain
874fake_mem=false
875pio_addr=8804615848451
876pio_latency=100000
877pio_size=8
878ret_bad_addr=false
879ret_data16=65535
880ret_data32=4294967295
881ret_data64=18446744073709551615
882ret_data8=255
883system=system
884update_data=false
885warn_access=
886pio=system.iobus.master[11]
887
888[system.tsunami.fake_pnp_read1]
889type=IsaFake
890clk_domain=system.clk_domain
891fake_mem=false
892pio_addr=8804615848515
893pio_latency=100000
894pio_size=8
895ret_bad_addr=false
896ret_data16=65535
897ret_data32=4294967295
898ret_data64=18446744073709551615
899ret_data8=255
900system=system
901update_data=false
902warn_access=
903pio=system.iobus.master[12]
904
905[system.tsunami.fake_pnp_read2]
906type=IsaFake
907clk_domain=system.clk_domain
908fake_mem=false
909pio_addr=8804615848579
910pio_latency=100000
911pio_size=8
912ret_bad_addr=false
913ret_data16=65535
914ret_data32=4294967295
915ret_data64=18446744073709551615
916ret_data8=255
917system=system
918update_data=false
919warn_access=
920pio=system.iobus.master[13]
921
922[system.tsunami.fake_pnp_read3]
923type=IsaFake
924clk_domain=system.clk_domain
925fake_mem=false
926pio_addr=8804615848643
927pio_latency=100000
928pio_size=8
929ret_bad_addr=false
930ret_data16=65535
931ret_data32=4294967295
932ret_data64=18446744073709551615
933ret_data8=255
934system=system
935update_data=false
936warn_access=
937pio=system.iobus.master[14]
938
939[system.tsunami.fake_pnp_read4]
940type=IsaFake
941clk_domain=system.clk_domain
942fake_mem=false
943pio_addr=8804615848707
944pio_latency=100000
945pio_size=8
946ret_bad_addr=false
947ret_data16=65535
948ret_data32=4294967295
949ret_data64=18446744073709551615
950ret_data8=255
951system=system
952update_data=false
953warn_access=
954pio=system.iobus.master[15]
955
956[system.tsunami.fake_pnp_read5]
957type=IsaFake
958clk_domain=system.clk_domain
959fake_mem=false
960pio_addr=8804615848771
961pio_latency=100000
962pio_size=8
963ret_bad_addr=false
964ret_data16=65535
965ret_data32=4294967295
966ret_data64=18446744073709551615
967ret_data8=255
968system=system
969update_data=false
970warn_access=
971pio=system.iobus.master[16]
972
973[system.tsunami.fake_pnp_read6]
974type=IsaFake
975clk_domain=system.clk_domain
976fake_mem=false
977pio_addr=8804615848835
978pio_latency=100000
979pio_size=8
980ret_bad_addr=false
981ret_data16=65535
982ret_data32=4294967295
983ret_data64=18446744073709551615
984ret_data8=255
985system=system
986update_data=false
987warn_access=
988pio=system.iobus.master[17]
989
990[system.tsunami.fake_pnp_read7]
991type=IsaFake
992clk_domain=system.clk_domain
993fake_mem=false
994pio_addr=8804615848899
995pio_latency=100000
996pio_size=8
997ret_bad_addr=false
998ret_data16=65535
999ret_data32=4294967295
1000ret_data64=18446744073709551615
1001ret_data8=255
1002system=system
1003update_data=false
1004warn_access=
1005pio=system.iobus.master[18]
1006
1007[system.tsunami.fake_pnp_write]
1008type=IsaFake
1009clk_domain=system.clk_domain
1010fake_mem=false
1011pio_addr=8804615850617
1012pio_latency=100000
1013pio_size=8
1014ret_bad_addr=false
1015ret_data16=65535
1016ret_data32=4294967295
1017ret_data64=18446744073709551615
1018ret_data8=255
1019system=system
1020update_data=false
1021warn_access=
1022pio=system.iobus.master[10]
1023
1024[system.tsunami.fake_ppc]
1025type=IsaFake
1026clk_domain=system.clk_domain
1027fake_mem=false
1028pio_addr=8804615848891
1029pio_latency=100000
1030pio_size=8
1031ret_bad_addr=false
1032ret_data16=65535
1033ret_data32=4294967295
1034ret_data64=18446744073709551615
1035ret_data8=255
1036system=system
1037update_data=false
1038warn_access=
1039pio=system.iobus.master[7]
1040
1041[system.tsunami.fake_sm_chip]
1042type=IsaFake
1043clk_domain=system.clk_domain
1044fake_mem=false
1045pio_addr=8804615848816
1046pio_latency=100000
1047pio_size=8
1048ret_bad_addr=false
1049ret_data16=65535
1050ret_data32=4294967295
1051ret_data64=18446744073709551615
1052ret_data8=255
1053system=system
1054update_data=false
1055warn_access=
1056pio=system.iobus.master[2]
1057
1058[system.tsunami.fake_uart1]
1059type=IsaFake
1060clk_domain=system.clk_domain
1061fake_mem=false
1062pio_addr=8804615848696
1063pio_latency=100000
1064pio_size=8
1065ret_bad_addr=false
1066ret_data16=65535
1067ret_data32=4294967295
1068ret_data64=18446744073709551615
1069ret_data8=255
1070system=system
1071update_data=false
1072warn_access=
1073pio=system.iobus.master[3]
1074
1075[system.tsunami.fake_uart2]
1076type=IsaFake
1077clk_domain=system.clk_domain
1078fake_mem=false
1079pio_addr=8804615848936
1080pio_latency=100000
1081pio_size=8
1082ret_bad_addr=false
1083ret_data16=65535
1084ret_data32=4294967295
1085ret_data64=18446744073709551615
1086ret_data8=255
1087system=system
1088update_data=false
1089warn_access=
1090pio=system.iobus.master[4]
1091
1092[system.tsunami.fake_uart3]
1093type=IsaFake
1094clk_domain=system.clk_domain
1095fake_mem=false
1096pio_addr=8804615848680
1097pio_latency=100000
1098pio_size=8
1099ret_bad_addr=false
1100ret_data16=65535
1101ret_data32=4294967295
1102ret_data64=18446744073709551615
1103ret_data8=255
1104system=system
1105update_data=false
1106warn_access=
1107pio=system.iobus.master[5]
1108
1109[system.tsunami.fake_uart4]
1110type=IsaFake
1111clk_domain=system.clk_domain
1112fake_mem=false
1113pio_addr=8804615848944
1114pio_latency=100000
1115pio_size=8
1116ret_bad_addr=false
1117ret_data16=65535
1118ret_data32=4294967295
1119ret_data64=18446744073709551615
1120ret_data8=255
1121system=system
1122update_data=false
1123warn_access=
1124pio=system.iobus.master[6]
1125
1126[system.tsunami.fb]
1127type=BadDevice
1128clk_domain=system.clk_domain
1129devicename=FrameBuffer
1130pio_addr=8804615848912
1131pio_latency=100000
1132system=system
1133pio=system.iobus.master[21]
1134
1135[system.tsunami.ide]
1136type=IdeController
1137BAR0=1
1138BAR0LegacyIO=false
1139BAR0Size=8
1140BAR1=1
1141BAR1LegacyIO=false
1142BAR1Size=4
1143BAR2=1
1144BAR2LegacyIO=false
1145BAR2Size=8
1146BAR3=1
1147BAR3LegacyIO=false
1148BAR3Size=4
1149BAR4=1
1150BAR4LegacyIO=false
1151BAR4Size=16
1152BAR5=1
1153BAR5LegacyIO=false
1154BAR5Size=0
1155BIST=0
1156CacheLineSize=0
1157CardbusCIS=0
1158ClassCode=1
1159Command=0
1160DeviceID=28945
1161ExpansionROM=0
1162HeaderType=0
1163InterruptLine=31
1164InterruptPin=1
1165LatencyTimer=0
1166MaximumLatency=0
1167MinimumGrant=0
1168ProgIF=133
1169Revision=0
1170Status=640
1171SubClassCode=1
1172SubsystemID=0
1173SubsystemVendorID=0
1174VendorID=32902
1175clk_domain=system.clk_domain
1176config_latency=20000
1177ctrl_offset=0
1178disks=system.disk0 system.disk2
1179io_shift=0
1180pci_bus=0
1181pci_dev=0
1182pci_func=0
1183pio_latency=30000
1184platform=system.tsunami
1185system=system
1186config=system.iobus.master[26]
1187dma=system.iobus.slave[1]
1188pio=system.iobus.master[25]
1189
1190[system.tsunami.io]
1191type=TsunamiIO
1192clk_domain=system.clk_domain
1193frequency=976562500
1194pio_addr=8804615847936
1195pio_latency=100000
1196system=system
1197time=Thu Jan 1 00:00:00 2009
1198tsunami=system.tsunami
1199year_is_bcd=false
1200pio=system.iobus.master[22]
1201
1202[system.tsunami.pchip]
1203type=TsunamiPChip
1204clk_domain=system.clk_domain
1205pio_addr=8802535473152
1206pio_latency=100000
1207system=system
1208tsunami=system.tsunami
1209pio=system.iobus.master[1]
1210
1211[system.tsunami.pciconfig]
1212type=PciConfigAll
1213bus=0
1214clk_domain=system.clk_domain
1215pio_addr=0
1216pio_latency=30000
1217platform=system.tsunami
1218size=16777216
1219system=system
1220pio=system.iobus.default
1221
1222[system.tsunami.uart]
1223type=Uart8250
1224clk_domain=system.clk_domain
1225pio_addr=8804615848952
1226pio_latency=100000
1227platform=system.tsunami
1228system=system
1229terminal=system.terminal
1230pio=system.iobus.master[23]
1231
1232[system.voltage_domain]
1233type=VoltageDomain
1234voltage=1.000000
1235
105numPhysFloatRegs=256
106numPhysIntRegs=256
107numROBEntries=192
108numRobs=1
109numThreads=1
110profile=0
111progress_interval=0
112renameToDecodeDelay=1
113renameToFetchDelay=1
114renameToIEWDelay=2
115renameToROBDelay=1
116renameWidth=8
117simpoint_start_insts=
118smtCommitPolicy=RoundRobin
119smtFetchPolicy=SingleThread
120smtIQPolicy=Partitioned
121smtIQThreshold=100
122smtLSQPolicy=Partitioned
123smtLSQThreshold=100
124smtNumFetchingThreads=1
125smtROBPolicy=Partitioned
126smtROBThreshold=100
127squashWidth=8
128store_set_clear_period=250000
129switched_out=false
130system=system
131tracer=system.cpu.tracer
132trapLatency=13
133wbDepth=1
134wbWidth=8
135workload=
136dcache_port=system.cpu.dcache.cpu_side
137icache_port=system.cpu.icache.cpu_side
138
139[system.cpu.branchPred]
140type=BranchPredictor
141BTBEntries=4096
142BTBTagSize=16
143RASSize=16
144choiceCtrBits=2
145choicePredictorSize=8192
146globalCtrBits=2
147globalPredictorSize=8192
148instShiftAmt=2
149localCtrBits=2
150localHistoryTableSize=2048
151localPredictorSize=2048
152numThreads=1
153predType=tournament
154
155[system.cpu.dcache]
156type=BaseCache
157children=tags
158addr_ranges=0:18446744073709551615
159assoc=4
160clk_domain=system.cpu_clk_domain
161forward_snoops=true
162hit_latency=2
163is_top_level=true
164max_miss_count=0
165mshrs=4
166prefetch_on_access=false
167prefetcher=Null
168response_latency=2
169size=32768
170system=system
171tags=system.cpu.dcache.tags
172tgts_per_mshr=20
173two_queue=false
174write_buffers=8
175cpu_side=system.cpu.dcache_port
176mem_side=system.cpu.toL2Bus.slave[1]
177
178[system.cpu.dcache.tags]
179type=LRU
180assoc=4
181block_size=64
182clk_domain=system.cpu_clk_domain
183hit_latency=2
184size=32768
185
186[system.cpu.dtb]
187type=AlphaTLB
188size=64
189
190[system.cpu.fuPool]
191type=FUPool
192children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
193FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
194
195[system.cpu.fuPool.FUList0]
196type=FUDesc
197children=opList
198count=6
199opList=system.cpu.fuPool.FUList0.opList
200
201[system.cpu.fuPool.FUList0.opList]
202type=OpDesc
203issueLat=1
204opClass=IntAlu
205opLat=1
206
207[system.cpu.fuPool.FUList1]
208type=FUDesc
209children=opList0 opList1
210count=2
211opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
212
213[system.cpu.fuPool.FUList1.opList0]
214type=OpDesc
215issueLat=1
216opClass=IntMult
217opLat=3
218
219[system.cpu.fuPool.FUList1.opList1]
220type=OpDesc
221issueLat=19
222opClass=IntDiv
223opLat=20
224
225[system.cpu.fuPool.FUList2]
226type=FUDesc
227children=opList0 opList1 opList2
228count=4
229opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
230
231[system.cpu.fuPool.FUList2.opList0]
232type=OpDesc
233issueLat=1
234opClass=FloatAdd
235opLat=2
236
237[system.cpu.fuPool.FUList2.opList1]
238type=OpDesc
239issueLat=1
240opClass=FloatCmp
241opLat=2
242
243[system.cpu.fuPool.FUList2.opList2]
244type=OpDesc
245issueLat=1
246opClass=FloatCvt
247opLat=2
248
249[system.cpu.fuPool.FUList3]
250type=FUDesc
251children=opList0 opList1 opList2
252count=2
253opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
254
255[system.cpu.fuPool.FUList3.opList0]
256type=OpDesc
257issueLat=1
258opClass=FloatMult
259opLat=4
260
261[system.cpu.fuPool.FUList3.opList1]
262type=OpDesc
263issueLat=12
264opClass=FloatDiv
265opLat=12
266
267[system.cpu.fuPool.FUList3.opList2]
268type=OpDesc
269issueLat=24
270opClass=FloatSqrt
271opLat=24
272
273[system.cpu.fuPool.FUList4]
274type=FUDesc
275children=opList
276count=0
277opList=system.cpu.fuPool.FUList4.opList
278
279[system.cpu.fuPool.FUList4.opList]
280type=OpDesc
281issueLat=1
282opClass=MemRead
283opLat=1
284
285[system.cpu.fuPool.FUList5]
286type=FUDesc
287children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
288count=4
289opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
290
291[system.cpu.fuPool.FUList5.opList00]
292type=OpDesc
293issueLat=1
294opClass=SimdAdd
295opLat=1
296
297[system.cpu.fuPool.FUList5.opList01]
298type=OpDesc
299issueLat=1
300opClass=SimdAddAcc
301opLat=1
302
303[system.cpu.fuPool.FUList5.opList02]
304type=OpDesc
305issueLat=1
306opClass=SimdAlu
307opLat=1
308
309[system.cpu.fuPool.FUList5.opList03]
310type=OpDesc
311issueLat=1
312opClass=SimdCmp
313opLat=1
314
315[system.cpu.fuPool.FUList5.opList04]
316type=OpDesc
317issueLat=1
318opClass=SimdCvt
319opLat=1
320
321[system.cpu.fuPool.FUList5.opList05]
322type=OpDesc
323issueLat=1
324opClass=SimdMisc
325opLat=1
326
327[system.cpu.fuPool.FUList5.opList06]
328type=OpDesc
329issueLat=1
330opClass=SimdMult
331opLat=1
332
333[system.cpu.fuPool.FUList5.opList07]
334type=OpDesc
335issueLat=1
336opClass=SimdMultAcc
337opLat=1
338
339[system.cpu.fuPool.FUList5.opList08]
340type=OpDesc
341issueLat=1
342opClass=SimdShift
343opLat=1
344
345[system.cpu.fuPool.FUList5.opList09]
346type=OpDesc
347issueLat=1
348opClass=SimdShiftAcc
349opLat=1
350
351[system.cpu.fuPool.FUList5.opList10]
352type=OpDesc
353issueLat=1
354opClass=SimdSqrt
355opLat=1
356
357[system.cpu.fuPool.FUList5.opList11]
358type=OpDesc
359issueLat=1
360opClass=SimdFloatAdd
361opLat=1
362
363[system.cpu.fuPool.FUList5.opList12]
364type=OpDesc
365issueLat=1
366opClass=SimdFloatAlu
367opLat=1
368
369[system.cpu.fuPool.FUList5.opList13]
370type=OpDesc
371issueLat=1
372opClass=SimdFloatCmp
373opLat=1
374
375[system.cpu.fuPool.FUList5.opList14]
376type=OpDesc
377issueLat=1
378opClass=SimdFloatCvt
379opLat=1
380
381[system.cpu.fuPool.FUList5.opList15]
382type=OpDesc
383issueLat=1
384opClass=SimdFloatDiv
385opLat=1
386
387[system.cpu.fuPool.FUList5.opList16]
388type=OpDesc
389issueLat=1
390opClass=SimdFloatMisc
391opLat=1
392
393[system.cpu.fuPool.FUList5.opList17]
394type=OpDesc
395issueLat=1
396opClass=SimdFloatMult
397opLat=1
398
399[system.cpu.fuPool.FUList5.opList18]
400type=OpDesc
401issueLat=1
402opClass=SimdFloatMultAcc
403opLat=1
404
405[system.cpu.fuPool.FUList5.opList19]
406type=OpDesc
407issueLat=1
408opClass=SimdFloatSqrt
409opLat=1
410
411[system.cpu.fuPool.FUList6]
412type=FUDesc
413children=opList
414count=0
415opList=system.cpu.fuPool.FUList6.opList
416
417[system.cpu.fuPool.FUList6.opList]
418type=OpDesc
419issueLat=1
420opClass=MemWrite
421opLat=1
422
423[system.cpu.fuPool.FUList7]
424type=FUDesc
425children=opList0 opList1
426count=4
427opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
428
429[system.cpu.fuPool.FUList7.opList0]
430type=OpDesc
431issueLat=1
432opClass=MemRead
433opLat=1
434
435[system.cpu.fuPool.FUList7.opList1]
436type=OpDesc
437issueLat=1
438opClass=MemWrite
439opLat=1
440
441[system.cpu.fuPool.FUList8]
442type=FUDesc
443children=opList
444count=1
445opList=system.cpu.fuPool.FUList8.opList
446
447[system.cpu.fuPool.FUList8.opList]
448type=OpDesc
449issueLat=3
450opClass=IprAccess
451opLat=3
452
453[system.cpu.icache]
454type=BaseCache
455children=tags
456addr_ranges=0:18446744073709551615
457assoc=1
458clk_domain=system.cpu_clk_domain
459forward_snoops=true
460hit_latency=2
461is_top_level=true
462max_miss_count=0
463mshrs=4
464prefetch_on_access=false
465prefetcher=Null
466response_latency=2
467size=32768
468system=system
469tags=system.cpu.icache.tags
470tgts_per_mshr=20
471two_queue=false
472write_buffers=8
473cpu_side=system.cpu.icache_port
474mem_side=system.cpu.toL2Bus.slave[0]
475
476[system.cpu.icache.tags]
477type=LRU
478assoc=1
479block_size=64
480clk_domain=system.cpu_clk_domain
481hit_latency=2
482size=32768
483
484[system.cpu.interrupts]
485type=AlphaInterrupts
486
487[system.cpu.isa]
488type=AlphaISA
489
490[system.cpu.itb]
491type=AlphaTLB
492size=48
493
494[system.cpu.l2cache]
495type=BaseCache
496children=tags
497addr_ranges=0:18446744073709551615
498assoc=8
499clk_domain=system.cpu_clk_domain
500forward_snoops=true
501hit_latency=20
502is_top_level=false
503max_miss_count=0
504mshrs=20
505prefetch_on_access=false
506prefetcher=Null
507response_latency=20
508size=4194304
509system=system
510tags=system.cpu.l2cache.tags
511tgts_per_mshr=12
512two_queue=false
513write_buffers=8
514cpu_side=system.cpu.toL2Bus.master[0]
515mem_side=system.membus.slave[1]
516
517[system.cpu.l2cache.tags]
518type=LRU
519assoc=8
520block_size=64
521clk_domain=system.cpu_clk_domain
522hit_latency=20
523size=4194304
524
525[system.cpu.toL2Bus]
526type=CoherentBus
527clk_domain=system.cpu_clk_domain
528header_cycles=1
529system=system
530use_default_range=false
531width=32
532master=system.cpu.l2cache.cpu_side
533slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
534
535[system.cpu.tracer]
536type=ExeTracer
537
538[system.cpu_clk_domain]
539type=SrcClockDomain
540clock=500
541voltage_domain=system.voltage_domain
542
543[system.disk0]
544type=IdeDisk
545children=image
546delay=1000000
547driveID=master
548image=system.disk0.image
549
550[system.disk0.image]
551type=CowDiskImage
552children=child
553child=system.disk0.image.child
554image_file=
555read_only=false
556table_size=65536
557
558[system.disk0.image.child]
559type=RawDiskImage
560image_file=/dist/m5/system/disks/linux-latest.img
561read_only=true
562
563[system.disk2]
564type=IdeDisk
565children=image
566delay=1000000
567driveID=master
568image=system.disk2.image
569
570[system.disk2.image]
571type=CowDiskImage
572children=child
573child=system.disk2.image.child
574image_file=
575read_only=false
576table_size=65536
577
578[system.disk2.image.child]
579type=RawDiskImage
580image_file=/dist/m5/system/disks/linux-bigswap2.img
581read_only=true
582
583[system.intrctrl]
584type=IntrControl
585sys=system
586
587[system.iobus]
588type=NoncoherentBus
589clk_domain=system.clk_domain
590header_cycles=1
591use_default_range=true
592width=8
593default=system.tsunami.pciconfig.pio
594master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
595slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
596
597[system.iocache]
598type=BaseCache
599children=tags
600addr_ranges=0:134217727
601assoc=8
602clk_domain=system.clk_domain
603forward_snoops=false
604hit_latency=50
605is_top_level=true
606max_miss_count=0
607mshrs=20
608prefetch_on_access=false
609prefetcher=Null
610response_latency=50
611size=1024
612system=system
613tags=system.iocache.tags
614tgts_per_mshr=12
615two_queue=false
616write_buffers=8
617cpu_side=system.iobus.master[29]
618mem_side=system.membus.slave[2]
619
620[system.iocache.tags]
621type=LRU
622assoc=8
623block_size=64
624clk_domain=system.clk_domain
625hit_latency=50
626size=1024
627
628[system.membus]
629type=CoherentBus
630children=badaddr_responder
631clk_domain=system.clk_domain
632header_cycles=1
633system=system
634use_default_range=false
635width=8
636default=system.membus.badaddr_responder.pio
637master=system.bridge.slave system.physmem.port
638slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
639
640[system.membus.badaddr_responder]
641type=IsaFake
642clk_domain=system.clk_domain
643fake_mem=false
644pio_addr=0
645pio_latency=100000
646pio_size=8
647ret_bad_addr=true
648ret_data16=65535
649ret_data32=4294967295
650ret_data64=18446744073709551615
651ret_data8=255
652system=system
653update_data=false
654warn_access=
655pio=system.membus.default
656
657[system.physmem]
658type=SimpleDRAM
659activation_limit=4
660addr_mapping=RaBaChCo
661banks_per_rank=8
662burst_length=8
663channels=1
664clk_domain=system.clk_domain
665conf_table_reported=true
666device_bus_width=8
667device_rowbuffer_size=1024
668devices_per_rank=8
669in_addr_map=true
670mem_sched_policy=frfcfs
671null=false
672page_policy=open
673range=0:134217727
674ranks_per_channel=2
675read_buffer_size=32
676static_backend_latency=10000
677static_frontend_latency=10000
678tBURST=5000
679tCL=13750
680tRCD=13750
681tREFI=7800000
682tRFC=300000
683tRP=13750
684tWTR=7500
685tXAW=40000
686write_buffer_size=32
687write_thresh_perc=70
688port=system.membus.master[1]
689
690[system.simple_disk]
691type=SimpleDisk
692children=disk
693disk=system.simple_disk.disk
694system=system
695
696[system.simple_disk.disk]
697type=RawDiskImage
698image_file=/dist/m5/system/disks/linux-latest.img
699read_only=true
700
701[system.terminal]
702type=Terminal
703intr_control=system.intrctrl
704number=0
705output=true
706port=3456
707
708[system.tsunami]
709type=Tsunami
710children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
711intrctrl=system.intrctrl
712system=system
713
714[system.tsunami.backdoor]
715type=AlphaBackdoor
716clk_domain=system.clk_domain
717cpu=system.cpu
718disk=system.simple_disk
719pio_addr=8804682956800
720pio_latency=100000
721platform=system.tsunami
722system=system
723terminal=system.terminal
724pio=system.iobus.master[24]
725
726[system.tsunami.cchip]
727type=TsunamiCChip
728clk_domain=system.clk_domain
729pio_addr=8803072344064
730pio_latency=100000
731system=system
732tsunami=system.tsunami
733pio=system.iobus.master[0]
734
735[system.tsunami.ethernet]
736type=NSGigE
737BAR0=1
738BAR0LegacyIO=false
739BAR0Size=256
740BAR1=0
741BAR1LegacyIO=false
742BAR1Size=4096
743BAR2=0
744BAR2LegacyIO=false
745BAR2Size=0
746BAR3=0
747BAR3LegacyIO=false
748BAR3Size=0
749BAR4=0
750BAR4LegacyIO=false
751BAR4Size=0
752BAR5=0
753BAR5LegacyIO=false
754BAR5Size=0
755BIST=0
756CacheLineSize=0
757CardbusCIS=0
758ClassCode=2
759Command=0
760DeviceID=34
761ExpansionROM=0
762HeaderType=0
763InterruptLine=30
764InterruptPin=1
765LatencyTimer=0
766MaximumLatency=52
767MinimumGrant=176
768ProgIF=0
769Revision=0
770Status=656
771SubClassCode=0
772SubsystemID=0
773SubsystemVendorID=0
774VendorID=4107
775clk_domain=system.clk_domain
776config_latency=20000
777dma_data_free=false
778dma_desc_free=false
779dma_no_allocate=true
780dma_read_delay=0
781dma_read_factor=0
782dma_write_delay=0
783dma_write_factor=0
784hardware_address=00:90:00:00:00:01
785intr_delay=10000000
786pci_bus=0
787pci_dev=1
788pci_func=0
789pio_latency=30000
790platform=system.tsunami
791rss=false
792rx_delay=1000000
793rx_fifo_size=524288
794rx_filter=true
795rx_thread=false
796system=system
797tx_delay=1000000
798tx_fifo_size=524288
799tx_thread=false
800config=system.iobus.master[28]
801dma=system.iobus.slave[2]
802pio=system.iobus.master[27]
803
804[system.tsunami.fake_OROM]
805type=IsaFake
806clk_domain=system.clk_domain
807fake_mem=false
808pio_addr=8796093677568
809pio_latency=100000
810pio_size=393216
811ret_bad_addr=false
812ret_data16=65535
813ret_data32=4294967295
814ret_data64=18446744073709551615
815ret_data8=255
816system=system
817update_data=false
818warn_access=
819pio=system.iobus.master[8]
820
821[system.tsunami.fake_ata0]
822type=IsaFake
823clk_domain=system.clk_domain
824fake_mem=false
825pio_addr=8804615848432
826pio_latency=100000
827pio_size=8
828ret_bad_addr=false
829ret_data16=65535
830ret_data32=4294967295
831ret_data64=18446744073709551615
832ret_data8=255
833system=system
834update_data=false
835warn_access=
836pio=system.iobus.master[19]
837
838[system.tsunami.fake_ata1]
839type=IsaFake
840clk_domain=system.clk_domain
841fake_mem=false
842pio_addr=8804615848304
843pio_latency=100000
844pio_size=8
845ret_bad_addr=false
846ret_data16=65535
847ret_data32=4294967295
848ret_data64=18446744073709551615
849ret_data8=255
850system=system
851update_data=false
852warn_access=
853pio=system.iobus.master[20]
854
855[system.tsunami.fake_pnp_addr]
856type=IsaFake
857clk_domain=system.clk_domain
858fake_mem=false
859pio_addr=8804615848569
860pio_latency=100000
861pio_size=8
862ret_bad_addr=false
863ret_data16=65535
864ret_data32=4294967295
865ret_data64=18446744073709551615
866ret_data8=255
867system=system
868update_data=false
869warn_access=
870pio=system.iobus.master[9]
871
872[system.tsunami.fake_pnp_read0]
873type=IsaFake
874clk_domain=system.clk_domain
875fake_mem=false
876pio_addr=8804615848451
877pio_latency=100000
878pio_size=8
879ret_bad_addr=false
880ret_data16=65535
881ret_data32=4294967295
882ret_data64=18446744073709551615
883ret_data8=255
884system=system
885update_data=false
886warn_access=
887pio=system.iobus.master[11]
888
889[system.tsunami.fake_pnp_read1]
890type=IsaFake
891clk_domain=system.clk_domain
892fake_mem=false
893pio_addr=8804615848515
894pio_latency=100000
895pio_size=8
896ret_bad_addr=false
897ret_data16=65535
898ret_data32=4294967295
899ret_data64=18446744073709551615
900ret_data8=255
901system=system
902update_data=false
903warn_access=
904pio=system.iobus.master[12]
905
906[system.tsunami.fake_pnp_read2]
907type=IsaFake
908clk_domain=system.clk_domain
909fake_mem=false
910pio_addr=8804615848579
911pio_latency=100000
912pio_size=8
913ret_bad_addr=false
914ret_data16=65535
915ret_data32=4294967295
916ret_data64=18446744073709551615
917ret_data8=255
918system=system
919update_data=false
920warn_access=
921pio=system.iobus.master[13]
922
923[system.tsunami.fake_pnp_read3]
924type=IsaFake
925clk_domain=system.clk_domain
926fake_mem=false
927pio_addr=8804615848643
928pio_latency=100000
929pio_size=8
930ret_bad_addr=false
931ret_data16=65535
932ret_data32=4294967295
933ret_data64=18446744073709551615
934ret_data8=255
935system=system
936update_data=false
937warn_access=
938pio=system.iobus.master[14]
939
940[system.tsunami.fake_pnp_read4]
941type=IsaFake
942clk_domain=system.clk_domain
943fake_mem=false
944pio_addr=8804615848707
945pio_latency=100000
946pio_size=8
947ret_bad_addr=false
948ret_data16=65535
949ret_data32=4294967295
950ret_data64=18446744073709551615
951ret_data8=255
952system=system
953update_data=false
954warn_access=
955pio=system.iobus.master[15]
956
957[system.tsunami.fake_pnp_read5]
958type=IsaFake
959clk_domain=system.clk_domain
960fake_mem=false
961pio_addr=8804615848771
962pio_latency=100000
963pio_size=8
964ret_bad_addr=false
965ret_data16=65535
966ret_data32=4294967295
967ret_data64=18446744073709551615
968ret_data8=255
969system=system
970update_data=false
971warn_access=
972pio=system.iobus.master[16]
973
974[system.tsunami.fake_pnp_read6]
975type=IsaFake
976clk_domain=system.clk_domain
977fake_mem=false
978pio_addr=8804615848835
979pio_latency=100000
980pio_size=8
981ret_bad_addr=false
982ret_data16=65535
983ret_data32=4294967295
984ret_data64=18446744073709551615
985ret_data8=255
986system=system
987update_data=false
988warn_access=
989pio=system.iobus.master[17]
990
991[system.tsunami.fake_pnp_read7]
992type=IsaFake
993clk_domain=system.clk_domain
994fake_mem=false
995pio_addr=8804615848899
996pio_latency=100000
997pio_size=8
998ret_bad_addr=false
999ret_data16=65535
1000ret_data32=4294967295
1001ret_data64=18446744073709551615
1002ret_data8=255
1003system=system
1004update_data=false
1005warn_access=
1006pio=system.iobus.master[18]
1007
1008[system.tsunami.fake_pnp_write]
1009type=IsaFake
1010clk_domain=system.clk_domain
1011fake_mem=false
1012pio_addr=8804615850617
1013pio_latency=100000
1014pio_size=8
1015ret_bad_addr=false
1016ret_data16=65535
1017ret_data32=4294967295
1018ret_data64=18446744073709551615
1019ret_data8=255
1020system=system
1021update_data=false
1022warn_access=
1023pio=system.iobus.master[10]
1024
1025[system.tsunami.fake_ppc]
1026type=IsaFake
1027clk_domain=system.clk_domain
1028fake_mem=false
1029pio_addr=8804615848891
1030pio_latency=100000
1031pio_size=8
1032ret_bad_addr=false
1033ret_data16=65535
1034ret_data32=4294967295
1035ret_data64=18446744073709551615
1036ret_data8=255
1037system=system
1038update_data=false
1039warn_access=
1040pio=system.iobus.master[7]
1041
1042[system.tsunami.fake_sm_chip]
1043type=IsaFake
1044clk_domain=system.clk_domain
1045fake_mem=false
1046pio_addr=8804615848816
1047pio_latency=100000
1048pio_size=8
1049ret_bad_addr=false
1050ret_data16=65535
1051ret_data32=4294967295
1052ret_data64=18446744073709551615
1053ret_data8=255
1054system=system
1055update_data=false
1056warn_access=
1057pio=system.iobus.master[2]
1058
1059[system.tsunami.fake_uart1]
1060type=IsaFake
1061clk_domain=system.clk_domain
1062fake_mem=false
1063pio_addr=8804615848696
1064pio_latency=100000
1065pio_size=8
1066ret_bad_addr=false
1067ret_data16=65535
1068ret_data32=4294967295
1069ret_data64=18446744073709551615
1070ret_data8=255
1071system=system
1072update_data=false
1073warn_access=
1074pio=system.iobus.master[3]
1075
1076[system.tsunami.fake_uart2]
1077type=IsaFake
1078clk_domain=system.clk_domain
1079fake_mem=false
1080pio_addr=8804615848936
1081pio_latency=100000
1082pio_size=8
1083ret_bad_addr=false
1084ret_data16=65535
1085ret_data32=4294967295
1086ret_data64=18446744073709551615
1087ret_data8=255
1088system=system
1089update_data=false
1090warn_access=
1091pio=system.iobus.master[4]
1092
1093[system.tsunami.fake_uart3]
1094type=IsaFake
1095clk_domain=system.clk_domain
1096fake_mem=false
1097pio_addr=8804615848680
1098pio_latency=100000
1099pio_size=8
1100ret_bad_addr=false
1101ret_data16=65535
1102ret_data32=4294967295
1103ret_data64=18446744073709551615
1104ret_data8=255
1105system=system
1106update_data=false
1107warn_access=
1108pio=system.iobus.master[5]
1109
1110[system.tsunami.fake_uart4]
1111type=IsaFake
1112clk_domain=system.clk_domain
1113fake_mem=false
1114pio_addr=8804615848944
1115pio_latency=100000
1116pio_size=8
1117ret_bad_addr=false
1118ret_data16=65535
1119ret_data32=4294967295
1120ret_data64=18446744073709551615
1121ret_data8=255
1122system=system
1123update_data=false
1124warn_access=
1125pio=system.iobus.master[6]
1126
1127[system.tsunami.fb]
1128type=BadDevice
1129clk_domain=system.clk_domain
1130devicename=FrameBuffer
1131pio_addr=8804615848912
1132pio_latency=100000
1133system=system
1134pio=system.iobus.master[21]
1135
1136[system.tsunami.ide]
1137type=IdeController
1138BAR0=1
1139BAR0LegacyIO=false
1140BAR0Size=8
1141BAR1=1
1142BAR1LegacyIO=false
1143BAR1Size=4
1144BAR2=1
1145BAR2LegacyIO=false
1146BAR2Size=8
1147BAR3=1
1148BAR3LegacyIO=false
1149BAR3Size=4
1150BAR4=1
1151BAR4LegacyIO=false
1152BAR4Size=16
1153BAR5=1
1154BAR5LegacyIO=false
1155BAR5Size=0
1156BIST=0
1157CacheLineSize=0
1158CardbusCIS=0
1159ClassCode=1
1160Command=0
1161DeviceID=28945
1162ExpansionROM=0
1163HeaderType=0
1164InterruptLine=31
1165InterruptPin=1
1166LatencyTimer=0
1167MaximumLatency=0
1168MinimumGrant=0
1169ProgIF=133
1170Revision=0
1171Status=640
1172SubClassCode=1
1173SubsystemID=0
1174SubsystemVendorID=0
1175VendorID=32902
1176clk_domain=system.clk_domain
1177config_latency=20000
1178ctrl_offset=0
1179disks=system.disk0 system.disk2
1180io_shift=0
1181pci_bus=0
1182pci_dev=0
1183pci_func=0
1184pio_latency=30000
1185platform=system.tsunami
1186system=system
1187config=system.iobus.master[26]
1188dma=system.iobus.slave[1]
1189pio=system.iobus.master[25]
1190
1191[system.tsunami.io]
1192type=TsunamiIO
1193clk_domain=system.clk_domain
1194frequency=976562500
1195pio_addr=8804615847936
1196pio_latency=100000
1197system=system
1198time=Thu Jan 1 00:00:00 2009
1199tsunami=system.tsunami
1200year_is_bcd=false
1201pio=system.iobus.master[22]
1202
1203[system.tsunami.pchip]
1204type=TsunamiPChip
1205clk_domain=system.clk_domain
1206pio_addr=8802535473152
1207pio_latency=100000
1208system=system
1209tsunami=system.tsunami
1210pio=system.iobus.master[1]
1211
1212[system.tsunami.pciconfig]
1213type=PciConfigAll
1214bus=0
1215clk_domain=system.clk_domain
1216pio_addr=0
1217pio_latency=30000
1218platform=system.tsunami
1219size=16777216
1220system=system
1221pio=system.iobus.default
1222
1223[system.tsunami.uart]
1224type=Uart8250
1225clk_domain=system.clk_domain
1226pio_addr=8804615848952
1227pio_latency=100000
1228platform=system.tsunami
1229system=system
1230terminal=system.terminal
1231pio=system.iobus.master[23]
1232
1233[system.voltage_domain]
1234type=VoltageDomain
1235voltage=1.000000
1236