1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem 11children=bridge cpu disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 14console=/dist/m5/system/binaries/console 15init_param=0 16kernel=/dist/m5/system/binaries/vmlinux 17load_addr_mask=1099511627775 18mem_mode=timing 19memories=system.physmem 20num_work_ids=16 21pal=/dist/m5/system/binaries/ts_osfpal
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem 11children=bridge cpu disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 14console=/dist/m5/system/binaries/console 15init_param=0 16kernel=/dist/m5/system/binaries/vmlinux 17load_addr_mask=1099511627775 18mem_mode=timing 19memories=system.physmem 20num_work_ids=16 21pal=/dist/m5/system/binaries/ts_osfpal
|
22physmem=system.physmem
| |
23readfile=tests/halt.sh 24symbolfile= 25system_rev=1024 26system_type=34 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 30work_cpus_ckpt_count=0 31work_end_ckpt_count=0 32work_end_exit_count=0 33work_item_id=-1
| 22readfile=tests/halt.sh 23symbolfile= 24system_rev=1024 25system_type=34 26work_begin_ckpt_count=0 27work_begin_cpu_id_exit=-1 28work_begin_exit_count=0 29work_cpus_ckpt_count=0 30work_end_ckpt_count=0 31work_end_exit_count=0 32work_item_id=-1
|
34system_port=system.membus.port[2]
| 33system_port=system.membus.slave[0]
|
35 36[system.bridge] 37type=Bridge 38delay=50000 39nack_delay=4000 40ranges=8796093022208:18446744073709551615 41req_size=16 42resp_size=16 43write_ack=false
| 34 35[system.bridge] 36type=Bridge 37delay=50000 38nack_delay=4000 39ranges=8796093022208:18446744073709551615 40req_size=16 41resp_size=16 42write_ack=false
|
44master=system.iobus.port[0] 45slave=system.membus.port[0]
| 43master=system.iobus.slave[0] 44slave=system.membus.master[0]
|
46 47[system.cpu] 48type=DerivO3CPU 49children=dcache dtb fuPool icache interrupts itb tracer 50BTBEntries=4096 51BTBTagSize=16 52LFSTSize=1024 53LQEntries=32 54LSQCheckLoads=true 55LSQDepCheckShift=4 56RASSize=16 57SQEntries=32 58SSITSize=1024 59activity=0 60backComSize=5 61cachePorts=200 62checker=Null 63choiceCtrBits=2 64choicePredictorSize=8192 65clock=500 66commitToDecodeDelay=1 67commitToFetchDelay=1 68commitToIEWDelay=1 69commitToRenameDelay=1 70commitWidth=8 71cpu_id=0 72decodeToFetchDelay=1 73decodeToRenameDelay=1 74decodeWidth=8 75defer_registration=false 76dispatchWidth=8 77do_checkpoint_insts=true 78do_quiesce=true 79do_statistics_insts=true 80dtb=system.cpu.dtb 81fetchToDecodeDelay=1 82fetchTrapLatency=1 83fetchWidth=8 84forwardComSize=5 85fuPool=system.cpu.fuPool 86function_trace=false 87function_trace_start=0 88globalCtrBits=2 89globalHistoryBits=13 90globalPredictorSize=8192 91iewToCommitDelay=1 92iewToDecodeDelay=1 93iewToFetchDelay=1 94iewToRenameDelay=1 95instShiftAmt=2 96interrupts=system.cpu.interrupts 97issueToExecuteDelay=1 98issueWidth=8 99itb=system.cpu.itb 100localCtrBits=2 101localHistoryBits=11 102localHistoryTableSize=2048 103localPredictorSize=2048 104max_insts_all_threads=0 105max_insts_any_thread=0 106max_loads_all_threads=0 107max_loads_any_thread=0 108needsTSO=false 109numIQEntries=64 110numPhysFloatRegs=256 111numPhysIntRegs=256 112numROBEntries=192 113numRobs=1 114numThreads=1 115phase=0 116predType=tournament 117profile=0 118progress_interval=0 119renameToDecodeDelay=1 120renameToFetchDelay=1 121renameToIEWDelay=2 122renameToROBDelay=1 123renameWidth=8 124smtCommitPolicy=RoundRobin 125smtFetchPolicy=SingleThread 126smtIQPolicy=Partitioned 127smtIQThreshold=100 128smtLSQPolicy=Partitioned 129smtLSQThreshold=100 130smtNumFetchingThreads=1 131smtROBPolicy=Partitioned 132smtROBThreshold=100 133squashWidth=8 134store_set_clear_period=250000 135system=system 136tracer=system.cpu.tracer 137trapLatency=13 138wbDepth=1 139wbWidth=8 140workload= 141dcache_port=system.cpu.dcache.cpu_side 142icache_port=system.cpu.icache.cpu_side 143 144[system.cpu.dcache] 145type=BaseCache
| 45 46[system.cpu] 47type=DerivO3CPU 48children=dcache dtb fuPool icache interrupts itb tracer 49BTBEntries=4096 50BTBTagSize=16 51LFSTSize=1024 52LQEntries=32 53LSQCheckLoads=true 54LSQDepCheckShift=4 55RASSize=16 56SQEntries=32 57SSITSize=1024 58activity=0 59backComSize=5 60cachePorts=200 61checker=Null 62choiceCtrBits=2 63choicePredictorSize=8192 64clock=500 65commitToDecodeDelay=1 66commitToFetchDelay=1 67commitToIEWDelay=1 68commitToRenameDelay=1 69commitWidth=8 70cpu_id=0 71decodeToFetchDelay=1 72decodeToRenameDelay=1 73decodeWidth=8 74defer_registration=false 75dispatchWidth=8 76do_checkpoint_insts=true 77do_quiesce=true 78do_statistics_insts=true 79dtb=system.cpu.dtb 80fetchToDecodeDelay=1 81fetchTrapLatency=1 82fetchWidth=8 83forwardComSize=5 84fuPool=system.cpu.fuPool 85function_trace=false 86function_trace_start=0 87globalCtrBits=2 88globalHistoryBits=13 89globalPredictorSize=8192 90iewToCommitDelay=1 91iewToDecodeDelay=1 92iewToFetchDelay=1 93iewToRenameDelay=1 94instShiftAmt=2 95interrupts=system.cpu.interrupts 96issueToExecuteDelay=1 97issueWidth=8 98itb=system.cpu.itb 99localCtrBits=2 100localHistoryBits=11 101localHistoryTableSize=2048 102localPredictorSize=2048 103max_insts_all_threads=0 104max_insts_any_thread=0 105max_loads_all_threads=0 106max_loads_any_thread=0 107needsTSO=false 108numIQEntries=64 109numPhysFloatRegs=256 110numPhysIntRegs=256 111numROBEntries=192 112numRobs=1 113numThreads=1 114phase=0 115predType=tournament 116profile=0 117progress_interval=0 118renameToDecodeDelay=1 119renameToFetchDelay=1 120renameToIEWDelay=2 121renameToROBDelay=1 122renameWidth=8 123smtCommitPolicy=RoundRobin 124smtFetchPolicy=SingleThread 125smtIQPolicy=Partitioned 126smtIQThreshold=100 127smtLSQPolicy=Partitioned 128smtLSQThreshold=100 129smtNumFetchingThreads=1 130smtROBPolicy=Partitioned 131smtROBThreshold=100 132squashWidth=8 133store_set_clear_period=250000 134system=system 135tracer=system.cpu.tracer 136trapLatency=13 137wbDepth=1 138wbWidth=8 139workload= 140dcache_port=system.cpu.dcache.cpu_side 141icache_port=system.cpu.icache.cpu_side 142 143[system.cpu.dcache] 144type=BaseCache
|
146addr_range=0:18446744073709551615
| 145addr_ranges=0:18446744073709551615
|
147assoc=4 148block_size=64 149forward_snoops=true 150hash_delay=1 151is_top_level=true 152latency=1000 153max_miss_count=0 154mshrs=4 155prefetch_on_access=false 156prefetcher=Null 157prioritizeRequests=false 158repl=Null 159size=32768 160subblock_size=0 161system=system 162tgts_per_mshr=20 163trace_addr=0 164two_queue=false 165write_buffers=8 166cpu_side=system.cpu.dcache_port
| 146assoc=4 147block_size=64 148forward_snoops=true 149hash_delay=1 150is_top_level=true 151latency=1000 152max_miss_count=0 153mshrs=4 154prefetch_on_access=false 155prefetcher=Null 156prioritizeRequests=false 157repl=Null 158size=32768 159subblock_size=0 160system=system 161tgts_per_mshr=20 162trace_addr=0 163two_queue=false 164write_buffers=8 165cpu_side=system.cpu.dcache_port
|
167mem_side=system.toL2Bus.port[2]
| 166mem_side=system.toL2Bus.slave[1]
|
168 169[system.cpu.dtb] 170type=AlphaTLB 171size=64 172 173[system.cpu.fuPool] 174type=FUPool 175children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 176FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 177 178[system.cpu.fuPool.FUList0] 179type=FUDesc 180children=opList 181count=6 182opList=system.cpu.fuPool.FUList0.opList 183 184[system.cpu.fuPool.FUList0.opList] 185type=OpDesc 186issueLat=1 187opClass=IntAlu 188opLat=1 189 190[system.cpu.fuPool.FUList1] 191type=FUDesc 192children=opList0 opList1 193count=2 194opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 195 196[system.cpu.fuPool.FUList1.opList0] 197type=OpDesc 198issueLat=1 199opClass=IntMult 200opLat=3 201 202[system.cpu.fuPool.FUList1.opList1] 203type=OpDesc 204issueLat=19 205opClass=IntDiv 206opLat=20 207 208[system.cpu.fuPool.FUList2] 209type=FUDesc 210children=opList0 opList1 opList2 211count=4 212opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 213 214[system.cpu.fuPool.FUList2.opList0] 215type=OpDesc 216issueLat=1 217opClass=FloatAdd 218opLat=2 219 220[system.cpu.fuPool.FUList2.opList1] 221type=OpDesc 222issueLat=1 223opClass=FloatCmp 224opLat=2 225 226[system.cpu.fuPool.FUList2.opList2] 227type=OpDesc 228issueLat=1 229opClass=FloatCvt 230opLat=2 231 232[system.cpu.fuPool.FUList3] 233type=FUDesc 234children=opList0 opList1 opList2 235count=2 236opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 237 238[system.cpu.fuPool.FUList3.opList0] 239type=OpDesc 240issueLat=1 241opClass=FloatMult 242opLat=4 243 244[system.cpu.fuPool.FUList3.opList1] 245type=OpDesc 246issueLat=12 247opClass=FloatDiv 248opLat=12 249 250[system.cpu.fuPool.FUList3.opList2] 251type=OpDesc 252issueLat=24 253opClass=FloatSqrt 254opLat=24 255 256[system.cpu.fuPool.FUList4] 257type=FUDesc 258children=opList 259count=0 260opList=system.cpu.fuPool.FUList4.opList 261 262[system.cpu.fuPool.FUList4.opList] 263type=OpDesc 264issueLat=1 265opClass=MemRead 266opLat=1 267 268[system.cpu.fuPool.FUList5] 269type=FUDesc 270children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 271count=4 272opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 273 274[system.cpu.fuPool.FUList5.opList00] 275type=OpDesc 276issueLat=1 277opClass=SimdAdd 278opLat=1 279 280[system.cpu.fuPool.FUList5.opList01] 281type=OpDesc 282issueLat=1 283opClass=SimdAddAcc 284opLat=1 285 286[system.cpu.fuPool.FUList5.opList02] 287type=OpDesc 288issueLat=1 289opClass=SimdAlu 290opLat=1 291 292[system.cpu.fuPool.FUList5.opList03] 293type=OpDesc 294issueLat=1 295opClass=SimdCmp 296opLat=1 297 298[system.cpu.fuPool.FUList5.opList04] 299type=OpDesc 300issueLat=1 301opClass=SimdCvt 302opLat=1 303 304[system.cpu.fuPool.FUList5.opList05] 305type=OpDesc 306issueLat=1 307opClass=SimdMisc 308opLat=1 309 310[system.cpu.fuPool.FUList5.opList06] 311type=OpDesc 312issueLat=1 313opClass=SimdMult 314opLat=1 315 316[system.cpu.fuPool.FUList5.opList07] 317type=OpDesc 318issueLat=1 319opClass=SimdMultAcc 320opLat=1 321 322[system.cpu.fuPool.FUList5.opList08] 323type=OpDesc 324issueLat=1 325opClass=SimdShift 326opLat=1 327 328[system.cpu.fuPool.FUList5.opList09] 329type=OpDesc 330issueLat=1 331opClass=SimdShiftAcc 332opLat=1 333 334[system.cpu.fuPool.FUList5.opList10] 335type=OpDesc 336issueLat=1 337opClass=SimdSqrt 338opLat=1 339 340[system.cpu.fuPool.FUList5.opList11] 341type=OpDesc 342issueLat=1 343opClass=SimdFloatAdd 344opLat=1 345 346[system.cpu.fuPool.FUList5.opList12] 347type=OpDesc 348issueLat=1 349opClass=SimdFloatAlu 350opLat=1 351 352[system.cpu.fuPool.FUList5.opList13] 353type=OpDesc 354issueLat=1 355opClass=SimdFloatCmp 356opLat=1 357 358[system.cpu.fuPool.FUList5.opList14] 359type=OpDesc 360issueLat=1 361opClass=SimdFloatCvt 362opLat=1 363 364[system.cpu.fuPool.FUList5.opList15] 365type=OpDesc 366issueLat=1 367opClass=SimdFloatDiv 368opLat=1 369 370[system.cpu.fuPool.FUList5.opList16] 371type=OpDesc 372issueLat=1 373opClass=SimdFloatMisc 374opLat=1 375 376[system.cpu.fuPool.FUList5.opList17] 377type=OpDesc 378issueLat=1 379opClass=SimdFloatMult 380opLat=1 381 382[system.cpu.fuPool.FUList5.opList18] 383type=OpDesc 384issueLat=1 385opClass=SimdFloatMultAcc 386opLat=1 387 388[system.cpu.fuPool.FUList5.opList19] 389type=OpDesc 390issueLat=1 391opClass=SimdFloatSqrt 392opLat=1 393 394[system.cpu.fuPool.FUList6] 395type=FUDesc 396children=opList 397count=0 398opList=system.cpu.fuPool.FUList6.opList 399 400[system.cpu.fuPool.FUList6.opList] 401type=OpDesc 402issueLat=1 403opClass=MemWrite 404opLat=1 405 406[system.cpu.fuPool.FUList7] 407type=FUDesc 408children=opList0 opList1 409count=4 410opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 411 412[system.cpu.fuPool.FUList7.opList0] 413type=OpDesc 414issueLat=1 415opClass=MemRead 416opLat=1 417 418[system.cpu.fuPool.FUList7.opList1] 419type=OpDesc 420issueLat=1 421opClass=MemWrite 422opLat=1 423 424[system.cpu.fuPool.FUList8] 425type=FUDesc 426children=opList 427count=1 428opList=system.cpu.fuPool.FUList8.opList 429 430[system.cpu.fuPool.FUList8.opList] 431type=OpDesc 432issueLat=3 433opClass=IprAccess 434opLat=3 435 436[system.cpu.icache] 437type=BaseCache
| 167 168[system.cpu.dtb] 169type=AlphaTLB 170size=64 171 172[system.cpu.fuPool] 173type=FUPool 174children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 175FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 176 177[system.cpu.fuPool.FUList0] 178type=FUDesc 179children=opList 180count=6 181opList=system.cpu.fuPool.FUList0.opList 182 183[system.cpu.fuPool.FUList0.opList] 184type=OpDesc 185issueLat=1 186opClass=IntAlu 187opLat=1 188 189[system.cpu.fuPool.FUList1] 190type=FUDesc 191children=opList0 opList1 192count=2 193opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 194 195[system.cpu.fuPool.FUList1.opList0] 196type=OpDesc 197issueLat=1 198opClass=IntMult 199opLat=3 200 201[system.cpu.fuPool.FUList1.opList1] 202type=OpDesc 203issueLat=19 204opClass=IntDiv 205opLat=20 206 207[system.cpu.fuPool.FUList2] 208type=FUDesc 209children=opList0 opList1 opList2 210count=4 211opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 212 213[system.cpu.fuPool.FUList2.opList0] 214type=OpDesc 215issueLat=1 216opClass=FloatAdd 217opLat=2 218 219[system.cpu.fuPool.FUList2.opList1] 220type=OpDesc 221issueLat=1 222opClass=FloatCmp 223opLat=2 224 225[system.cpu.fuPool.FUList2.opList2] 226type=OpDesc 227issueLat=1 228opClass=FloatCvt 229opLat=2 230 231[system.cpu.fuPool.FUList3] 232type=FUDesc 233children=opList0 opList1 opList2 234count=2 235opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 236 237[system.cpu.fuPool.FUList3.opList0] 238type=OpDesc 239issueLat=1 240opClass=FloatMult 241opLat=4 242 243[system.cpu.fuPool.FUList3.opList1] 244type=OpDesc 245issueLat=12 246opClass=FloatDiv 247opLat=12 248 249[system.cpu.fuPool.FUList3.opList2] 250type=OpDesc 251issueLat=24 252opClass=FloatSqrt 253opLat=24 254 255[system.cpu.fuPool.FUList4] 256type=FUDesc 257children=opList 258count=0 259opList=system.cpu.fuPool.FUList4.opList 260 261[system.cpu.fuPool.FUList4.opList] 262type=OpDesc 263issueLat=1 264opClass=MemRead 265opLat=1 266 267[system.cpu.fuPool.FUList5] 268type=FUDesc 269children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 270count=4 271opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 272 273[system.cpu.fuPool.FUList5.opList00] 274type=OpDesc 275issueLat=1 276opClass=SimdAdd 277opLat=1 278 279[system.cpu.fuPool.FUList5.opList01] 280type=OpDesc 281issueLat=1 282opClass=SimdAddAcc 283opLat=1 284 285[system.cpu.fuPool.FUList5.opList02] 286type=OpDesc 287issueLat=1 288opClass=SimdAlu 289opLat=1 290 291[system.cpu.fuPool.FUList5.opList03] 292type=OpDesc 293issueLat=1 294opClass=SimdCmp 295opLat=1 296 297[system.cpu.fuPool.FUList5.opList04] 298type=OpDesc 299issueLat=1 300opClass=SimdCvt 301opLat=1 302 303[system.cpu.fuPool.FUList5.opList05] 304type=OpDesc 305issueLat=1 306opClass=SimdMisc 307opLat=1 308 309[system.cpu.fuPool.FUList5.opList06] 310type=OpDesc 311issueLat=1 312opClass=SimdMult 313opLat=1 314 315[system.cpu.fuPool.FUList5.opList07] 316type=OpDesc 317issueLat=1 318opClass=SimdMultAcc 319opLat=1 320 321[system.cpu.fuPool.FUList5.opList08] 322type=OpDesc 323issueLat=1 324opClass=SimdShift 325opLat=1 326 327[system.cpu.fuPool.FUList5.opList09] 328type=OpDesc 329issueLat=1 330opClass=SimdShiftAcc 331opLat=1 332 333[system.cpu.fuPool.FUList5.opList10] 334type=OpDesc 335issueLat=1 336opClass=SimdSqrt 337opLat=1 338 339[system.cpu.fuPool.FUList5.opList11] 340type=OpDesc 341issueLat=1 342opClass=SimdFloatAdd 343opLat=1 344 345[system.cpu.fuPool.FUList5.opList12] 346type=OpDesc 347issueLat=1 348opClass=SimdFloatAlu 349opLat=1 350 351[system.cpu.fuPool.FUList5.opList13] 352type=OpDesc 353issueLat=1 354opClass=SimdFloatCmp 355opLat=1 356 357[system.cpu.fuPool.FUList5.opList14] 358type=OpDesc 359issueLat=1 360opClass=SimdFloatCvt 361opLat=1 362 363[system.cpu.fuPool.FUList5.opList15] 364type=OpDesc 365issueLat=1 366opClass=SimdFloatDiv 367opLat=1 368 369[system.cpu.fuPool.FUList5.opList16] 370type=OpDesc 371issueLat=1 372opClass=SimdFloatMisc 373opLat=1 374 375[system.cpu.fuPool.FUList5.opList17] 376type=OpDesc 377issueLat=1 378opClass=SimdFloatMult 379opLat=1 380 381[system.cpu.fuPool.FUList5.opList18] 382type=OpDesc 383issueLat=1 384opClass=SimdFloatMultAcc 385opLat=1 386 387[system.cpu.fuPool.FUList5.opList19] 388type=OpDesc 389issueLat=1 390opClass=SimdFloatSqrt 391opLat=1 392 393[system.cpu.fuPool.FUList6] 394type=FUDesc 395children=opList 396count=0 397opList=system.cpu.fuPool.FUList6.opList 398 399[system.cpu.fuPool.FUList6.opList] 400type=OpDesc 401issueLat=1 402opClass=MemWrite 403opLat=1 404 405[system.cpu.fuPool.FUList7] 406type=FUDesc 407children=opList0 opList1 408count=4 409opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 410 411[system.cpu.fuPool.FUList7.opList0] 412type=OpDesc 413issueLat=1 414opClass=MemRead 415opLat=1 416 417[system.cpu.fuPool.FUList7.opList1] 418type=OpDesc 419issueLat=1 420opClass=MemWrite 421opLat=1 422 423[system.cpu.fuPool.FUList8] 424type=FUDesc 425children=opList 426count=1 427opList=system.cpu.fuPool.FUList8.opList 428 429[system.cpu.fuPool.FUList8.opList] 430type=OpDesc 431issueLat=3 432opClass=IprAccess 433opLat=3 434 435[system.cpu.icache] 436type=BaseCache
|
438addr_range=0:18446744073709551615
| 437addr_ranges=0:18446744073709551615
|
439assoc=1 440block_size=64 441forward_snoops=true 442hash_delay=1 443is_top_level=true 444latency=1000 445max_miss_count=0 446mshrs=4 447prefetch_on_access=false 448prefetcher=Null 449prioritizeRequests=false 450repl=Null 451size=32768 452subblock_size=0 453system=system 454tgts_per_mshr=20 455trace_addr=0 456two_queue=false 457write_buffers=8 458cpu_side=system.cpu.icache_port
| 438assoc=1 439block_size=64 440forward_snoops=true 441hash_delay=1 442is_top_level=true 443latency=1000 444max_miss_count=0 445mshrs=4 446prefetch_on_access=false 447prefetcher=Null 448prioritizeRequests=false 449repl=Null 450size=32768 451subblock_size=0 452system=system 453tgts_per_mshr=20 454trace_addr=0 455two_queue=false 456write_buffers=8 457cpu_side=system.cpu.icache_port
|
459mem_side=system.toL2Bus.port[1]
| 458mem_side=system.toL2Bus.slave[0]
|
460 461[system.cpu.interrupts] 462type=AlphaInterrupts 463 464[system.cpu.itb] 465type=AlphaTLB 466size=48 467 468[system.cpu.tracer] 469type=ExeTracer 470 471[system.disk0] 472type=IdeDisk 473children=image 474delay=1000000 475driveID=master 476image=system.disk0.image 477 478[system.disk0.image] 479type=CowDiskImage 480children=child 481child=system.disk0.image.child 482image_file= 483read_only=false 484table_size=65536 485 486[system.disk0.image.child] 487type=RawDiskImage 488image_file=/dist/m5/system/disks/linux-latest.img 489read_only=true 490 491[system.disk2] 492type=IdeDisk 493children=image 494delay=1000000 495driveID=master 496image=system.disk2.image 497 498[system.disk2.image] 499type=CowDiskImage 500children=child 501child=system.disk2.image.child 502image_file= 503read_only=false 504table_size=65536 505 506[system.disk2.image.child] 507type=RawDiskImage 508image_file=/dist/m5/system/disks/linux-bigswap2.img 509read_only=true 510 511[system.intrctrl] 512type=IntrControl 513sys=system 514 515[system.iobus] 516type=Bus 517block_size=64 518bus_id=0 519clock=1000 520header_cycles=1 521use_default_range=true 522width=64 523default=system.tsunami.pciconfig.pio
| 459 460[system.cpu.interrupts] 461type=AlphaInterrupts 462 463[system.cpu.itb] 464type=AlphaTLB 465size=48 466 467[system.cpu.tracer] 468type=ExeTracer 469 470[system.disk0] 471type=IdeDisk 472children=image 473delay=1000000 474driveID=master 475image=system.disk0.image 476 477[system.disk0.image] 478type=CowDiskImage 479children=child 480child=system.disk0.image.child 481image_file= 482read_only=false 483table_size=65536 484 485[system.disk0.image.child] 486type=RawDiskImage 487image_file=/dist/m5/system/disks/linux-latest.img 488read_only=true 489 490[system.disk2] 491type=IdeDisk 492children=image 493delay=1000000 494driveID=master 495image=system.disk2.image 496 497[system.disk2.image] 498type=CowDiskImage 499children=child 500child=system.disk2.image.child 501image_file= 502read_only=false 503table_size=65536 504 505[system.disk2.image.child] 506type=RawDiskImage 507image_file=/dist/m5/system/disks/linux-bigswap2.img 508read_only=true 509 510[system.intrctrl] 511type=IntrControl 512sys=system 513 514[system.iobus] 515type=Bus 516block_size=64 517bus_id=0 518clock=1000 519header_cycles=1 520use_default_range=true 521width=64 522default=system.tsunami.pciconfig.pio
|
524port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side
| 523master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 524slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
|
525 526[system.iocache] 527type=BaseCache
| 525 526[system.iocache] 527type=BaseCache
|
528addr_range=0:8589934591
| 528addr_ranges=0:8589934591
|
529assoc=8 530block_size=64 531forward_snoops=false 532hash_delay=1 533is_top_level=true 534latency=50000 535max_miss_count=0 536mshrs=20 537prefetch_on_access=false 538prefetcher=Null 539prioritizeRequests=false 540repl=Null 541size=1024 542subblock_size=0 543system=system 544tgts_per_mshr=12 545trace_addr=0 546two_queue=false 547write_buffers=8
| 529assoc=8 530block_size=64 531forward_snoops=false 532hash_delay=1 533is_top_level=true 534latency=50000 535max_miss_count=0 536mshrs=20 537prefetch_on_access=false 538prefetcher=Null 539prioritizeRequests=false 540repl=Null 541size=1024 542subblock_size=0 543system=system 544tgts_per_mshr=12 545trace_addr=0 546two_queue=false 547write_buffers=8
|
548cpu_side=system.iobus.port[32] 549mem_side=system.membus.port[3]
| 548cpu_side=system.iobus.master[29] 549mem_side=system.membus.slave[1]
|
550 551[system.l2c] 552type=BaseCache
| 550 551[system.l2c] 552type=BaseCache
|
553addr_range=0:18446744073709551615
| 553addr_ranges=0:18446744073709551615
|
554assoc=8 555block_size=64 556forward_snoops=true 557hash_delay=1 558is_top_level=false 559latency=10000 560max_miss_count=0 561mshrs=92 562prefetch_on_access=false 563prefetcher=Null 564prioritizeRequests=false 565repl=Null 566size=4194304 567subblock_size=0 568system=system 569tgts_per_mshr=16 570trace_addr=0 571two_queue=false 572write_buffers=8
| 554assoc=8 555block_size=64 556forward_snoops=true 557hash_delay=1 558is_top_level=false 559latency=10000 560max_miss_count=0 561mshrs=92 562prefetch_on_access=false 563prefetcher=Null 564prioritizeRequests=false 565repl=Null 566size=4194304 567subblock_size=0 568system=system 569tgts_per_mshr=16 570trace_addr=0 571two_queue=false 572write_buffers=8
|
573cpu_side=system.toL2Bus.port[0] 574mem_side=system.membus.port[4]
| 573cpu_side=system.toL2Bus.master[0] 574mem_side=system.membus.slave[2]
|
575 576[system.membus] 577type=Bus 578children=badaddr_responder 579block_size=64 580bus_id=1 581clock=1000 582header_cycles=1 583use_default_range=false 584width=64 585default=system.membus.badaddr_responder.pio
| 575 576[system.membus] 577type=Bus 578children=badaddr_responder 579block_size=64 580bus_id=1 581clock=1000 582header_cycles=1 583use_default_range=false 584width=64 585default=system.membus.badaddr_responder.pio
|
586port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side
| 586master=system.bridge.slave system.physmem.port[0] 587slave=system.system_port system.iocache.mem_side system.l2c.mem_side
|
587 588[system.membus.badaddr_responder] 589type=IsaFake 590fake_mem=false 591pio_addr=0 592pio_latency=1000 593pio_size=8 594ret_bad_addr=true 595ret_data16=65535 596ret_data32=4294967295 597ret_data64=18446744073709551615 598ret_data8=255 599system=system 600update_data=false 601warn_access= 602pio=system.membus.default 603 604[system.physmem]
| 588 589[system.membus.badaddr_responder] 590type=IsaFake 591fake_mem=false 592pio_addr=0 593pio_latency=1000 594pio_size=8 595ret_bad_addr=true 596ret_data16=65535 597ret_data32=4294967295 598ret_data64=18446744073709551615 599ret_data8=255 600system=system 601update_data=false 602warn_access= 603pio=system.membus.default 604 605[system.physmem]
|
605type=PhysicalMemory
| 606type=SimpleMemory 607conf_table_reported=false
|
606file=
| 608file=
|
| 609in_addr_map=true
|
607latency=30000 608latency_var=0 609null=false 610range=0:134217727 611zero=false
| 610latency=30000 611latency_var=0 612null=false 613range=0:134217727 614zero=false
|
612port=system.membus.port[1]
| 615port=system.membus.master[1]
|
613 614[system.simple_disk] 615type=SimpleDisk 616children=disk 617disk=system.simple_disk.disk 618system=system 619 620[system.simple_disk.disk] 621type=RawDiskImage 622image_file=/dist/m5/system/disks/linux-latest.img 623read_only=true 624 625[system.terminal] 626type=Terminal 627intr_control=system.intrctrl 628number=0 629output=true 630port=3456 631 632[system.toL2Bus] 633type=Bus 634block_size=64 635bus_id=0 636clock=1000 637header_cycles=1 638use_default_range=false 639width=64
| 616 617[system.simple_disk] 618type=SimpleDisk 619children=disk 620disk=system.simple_disk.disk 621system=system 622 623[system.simple_disk.disk] 624type=RawDiskImage 625image_file=/dist/m5/system/disks/linux-latest.img 626read_only=true 627 628[system.terminal] 629type=Terminal 630intr_control=system.intrctrl 631number=0 632output=true 633port=3456 634 635[system.toL2Bus] 636type=Bus 637block_size=64 638bus_id=0 639clock=1000 640header_cycles=1 641use_default_range=false 642width=64
|
640port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
| 643master=system.l2c.cpu_side 644slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
|
641 642[system.tsunami] 643type=Tsunami 644children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 645intrctrl=system.intrctrl 646system=system 647 648[system.tsunami.backdoor] 649type=AlphaBackdoor 650cpu=system.cpu 651disk=system.simple_disk 652pio_addr=8804682956800 653pio_latency=1000 654platform=system.tsunami 655system=system 656terminal=system.terminal
| 645 646[system.tsunami] 647type=Tsunami 648children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 649intrctrl=system.intrctrl 650system=system 651 652[system.tsunami.backdoor] 653type=AlphaBackdoor 654cpu=system.cpu 655disk=system.simple_disk 656pio_addr=8804682956800 657pio_latency=1000 658platform=system.tsunami 659system=system 660terminal=system.terminal
|
657pio=system.iobus.port[25]
| 661pio=system.iobus.master[24]
|
658 659[system.tsunami.cchip] 660type=TsunamiCChip 661pio_addr=8803072344064 662pio_latency=1000 663system=system 664tsunami=system.tsunami
| 662 663[system.tsunami.cchip] 664type=TsunamiCChip 665pio_addr=8803072344064 666pio_latency=1000 667system=system 668tsunami=system.tsunami
|
665pio=system.iobus.port[1]
| 669pio=system.iobus.master[0]
|
666 667[system.tsunami.ethernet] 668type=NSGigE 669BAR0=1 670BAR0LegacyIO=false 671BAR0Size=256 672BAR1=0 673BAR1LegacyIO=false 674BAR1Size=4096 675BAR2=0 676BAR2LegacyIO=false 677BAR2Size=0 678BAR3=0 679BAR3LegacyIO=false 680BAR3Size=0 681BAR4=0 682BAR4LegacyIO=false 683BAR4Size=0 684BAR5=0 685BAR5LegacyIO=false 686BAR5Size=0 687BIST=0 688CacheLineSize=0 689CardbusCIS=0 690ClassCode=2 691Command=0 692DeviceID=34 693ExpansionROM=0 694HeaderType=0 695InterruptLine=30 696InterruptPin=1 697LatencyTimer=0 698MaximumLatency=52 699MinimumGrant=176 700ProgIF=0 701Revision=0 702Status=656 703SubClassCode=0 704SubsystemID=0 705SubsystemVendorID=0 706VendorID=4107 707clock=0 708config_latency=20000 709dma_data_free=false 710dma_desc_free=false 711dma_no_allocate=true 712dma_read_delay=0 713dma_read_factor=0 714dma_write_delay=0 715dma_write_factor=0 716hardware_address=00:90:00:00:00:01 717intr_delay=10000000 718max_backoff_delay=10000000 719min_backoff_delay=4000 720pci_bus=0 721pci_dev=1 722pci_func=0 723pio_latency=1000 724platform=system.tsunami 725rss=false 726rx_delay=1000000 727rx_fifo_size=524288 728rx_filter=true 729rx_thread=false 730system=system 731tx_delay=1000000 732tx_fifo_size=524288 733tx_thread=false
| 670 671[system.tsunami.ethernet] 672type=NSGigE 673BAR0=1 674BAR0LegacyIO=false 675BAR0Size=256 676BAR1=0 677BAR1LegacyIO=false 678BAR1Size=4096 679BAR2=0 680BAR2LegacyIO=false 681BAR2Size=0 682BAR3=0 683BAR3LegacyIO=false 684BAR3Size=0 685BAR4=0 686BAR4LegacyIO=false 687BAR4Size=0 688BAR5=0 689BAR5LegacyIO=false 690BAR5Size=0 691BIST=0 692CacheLineSize=0 693CardbusCIS=0 694ClassCode=2 695Command=0 696DeviceID=34 697ExpansionROM=0 698HeaderType=0 699InterruptLine=30 700InterruptPin=1 701LatencyTimer=0 702MaximumLatency=52 703MinimumGrant=176 704ProgIF=0 705Revision=0 706Status=656 707SubClassCode=0 708SubsystemID=0 709SubsystemVendorID=0 710VendorID=4107 711clock=0 712config_latency=20000 713dma_data_free=false 714dma_desc_free=false 715dma_no_allocate=true 716dma_read_delay=0 717dma_read_factor=0 718dma_write_delay=0 719dma_write_factor=0 720hardware_address=00:90:00:00:00:01 721intr_delay=10000000 722max_backoff_delay=10000000 723min_backoff_delay=4000 724pci_bus=0 725pci_dev=1 726pci_func=0 727pio_latency=1000 728platform=system.tsunami 729rss=false 730rx_delay=1000000 731rx_fifo_size=524288 732rx_filter=true 733rx_thread=false 734system=system 735tx_delay=1000000 736tx_fifo_size=524288 737tx_thread=false
|
734config=system.iobus.port[30] 735dma=system.iobus.port[31] 736pio=system.iobus.port[29]
| 738config=system.iobus.master[28] 739dma=system.iobus.slave[2] 740pio=system.iobus.master[27]
|
737 738[system.tsunami.fake_OROM] 739type=IsaFake 740fake_mem=false 741pio_addr=8796093677568 742pio_latency=1000 743pio_size=393216 744ret_bad_addr=false 745ret_data16=65535 746ret_data32=4294967295 747ret_data64=18446744073709551615 748ret_data8=255 749system=system 750update_data=false 751warn_access=
| 741 742[system.tsunami.fake_OROM] 743type=IsaFake 744fake_mem=false 745pio_addr=8796093677568 746pio_latency=1000 747pio_size=393216 748ret_bad_addr=false 749ret_data16=65535 750ret_data32=4294967295 751ret_data64=18446744073709551615 752ret_data8=255 753system=system 754update_data=false 755warn_access=
|
752pio=system.iobus.port[9]
| 756pio=system.iobus.master[8]
|
753 754[system.tsunami.fake_ata0] 755type=IsaFake 756fake_mem=false 757pio_addr=8804615848432 758pio_latency=1000 759pio_size=8 760ret_bad_addr=false 761ret_data16=65535 762ret_data32=4294967295 763ret_data64=18446744073709551615 764ret_data8=255 765system=system 766update_data=false 767warn_access=
| 757 758[system.tsunami.fake_ata0] 759type=IsaFake 760fake_mem=false 761pio_addr=8804615848432 762pio_latency=1000 763pio_size=8 764ret_bad_addr=false 765ret_data16=65535 766ret_data32=4294967295 767ret_data64=18446744073709551615 768ret_data8=255 769system=system 770update_data=false 771warn_access=
|
768pio=system.iobus.port[20]
| 772pio=system.iobus.master[19]
|
769 770[system.tsunami.fake_ata1] 771type=IsaFake 772fake_mem=false 773pio_addr=8804615848304 774pio_latency=1000 775pio_size=8 776ret_bad_addr=false 777ret_data16=65535 778ret_data32=4294967295 779ret_data64=18446744073709551615 780ret_data8=255 781system=system 782update_data=false 783warn_access=
| 773 774[system.tsunami.fake_ata1] 775type=IsaFake 776fake_mem=false 777pio_addr=8804615848304 778pio_latency=1000 779pio_size=8 780ret_bad_addr=false 781ret_data16=65535 782ret_data32=4294967295 783ret_data64=18446744073709551615 784ret_data8=255 785system=system 786update_data=false 787warn_access=
|
784pio=system.iobus.port[21]
| 788pio=system.iobus.master[20]
|
785 786[system.tsunami.fake_pnp_addr] 787type=IsaFake 788fake_mem=false 789pio_addr=8804615848569 790pio_latency=1000 791pio_size=8 792ret_bad_addr=false 793ret_data16=65535 794ret_data32=4294967295 795ret_data64=18446744073709551615 796ret_data8=255 797system=system 798update_data=false 799warn_access=
| 789 790[system.tsunami.fake_pnp_addr] 791type=IsaFake 792fake_mem=false 793pio_addr=8804615848569 794pio_latency=1000 795pio_size=8 796ret_bad_addr=false 797ret_data16=65535 798ret_data32=4294967295 799ret_data64=18446744073709551615 800ret_data8=255 801system=system 802update_data=false 803warn_access=
|
800pio=system.iobus.port[10]
| 804pio=system.iobus.master[9]
|
801 802[system.tsunami.fake_pnp_read0] 803type=IsaFake 804fake_mem=false 805pio_addr=8804615848451 806pio_latency=1000 807pio_size=8 808ret_bad_addr=false 809ret_data16=65535 810ret_data32=4294967295 811ret_data64=18446744073709551615 812ret_data8=255 813system=system 814update_data=false 815warn_access=
| 805 806[system.tsunami.fake_pnp_read0] 807type=IsaFake 808fake_mem=false 809pio_addr=8804615848451 810pio_latency=1000 811pio_size=8 812ret_bad_addr=false 813ret_data16=65535 814ret_data32=4294967295 815ret_data64=18446744073709551615 816ret_data8=255 817system=system 818update_data=false 819warn_access=
|
816pio=system.iobus.port[12]
| 820pio=system.iobus.master[11]
|
817 818[system.tsunami.fake_pnp_read1] 819type=IsaFake 820fake_mem=false 821pio_addr=8804615848515 822pio_latency=1000 823pio_size=8 824ret_bad_addr=false 825ret_data16=65535 826ret_data32=4294967295 827ret_data64=18446744073709551615 828ret_data8=255 829system=system 830update_data=false 831warn_access=
| 821 822[system.tsunami.fake_pnp_read1] 823type=IsaFake 824fake_mem=false 825pio_addr=8804615848515 826pio_latency=1000 827pio_size=8 828ret_bad_addr=false 829ret_data16=65535 830ret_data32=4294967295 831ret_data64=18446744073709551615 832ret_data8=255 833system=system 834update_data=false 835warn_access=
|
832pio=system.iobus.port[13]
| 836pio=system.iobus.master[12]
|
833 834[system.tsunami.fake_pnp_read2] 835type=IsaFake 836fake_mem=false 837pio_addr=8804615848579 838pio_latency=1000 839pio_size=8 840ret_bad_addr=false 841ret_data16=65535 842ret_data32=4294967295 843ret_data64=18446744073709551615 844ret_data8=255 845system=system 846update_data=false 847warn_access=
| 837 838[system.tsunami.fake_pnp_read2] 839type=IsaFake 840fake_mem=false 841pio_addr=8804615848579 842pio_latency=1000 843pio_size=8 844ret_bad_addr=false 845ret_data16=65535 846ret_data32=4294967295 847ret_data64=18446744073709551615 848ret_data8=255 849system=system 850update_data=false 851warn_access=
|
848pio=system.iobus.port[14]
| 852pio=system.iobus.master[13]
|
849 850[system.tsunami.fake_pnp_read3] 851type=IsaFake 852fake_mem=false 853pio_addr=8804615848643 854pio_latency=1000 855pio_size=8 856ret_bad_addr=false 857ret_data16=65535 858ret_data32=4294967295 859ret_data64=18446744073709551615 860ret_data8=255 861system=system 862update_data=false 863warn_access=
| 853 854[system.tsunami.fake_pnp_read3] 855type=IsaFake 856fake_mem=false 857pio_addr=8804615848643 858pio_latency=1000 859pio_size=8 860ret_bad_addr=false 861ret_data16=65535 862ret_data32=4294967295 863ret_data64=18446744073709551615 864ret_data8=255 865system=system 866update_data=false 867warn_access=
|
864pio=system.iobus.port[15]
| 868pio=system.iobus.master[14]
|
865 866[system.tsunami.fake_pnp_read4] 867type=IsaFake 868fake_mem=false 869pio_addr=8804615848707 870pio_latency=1000 871pio_size=8 872ret_bad_addr=false 873ret_data16=65535 874ret_data32=4294967295 875ret_data64=18446744073709551615 876ret_data8=255 877system=system 878update_data=false 879warn_access=
| 869 870[system.tsunami.fake_pnp_read4] 871type=IsaFake 872fake_mem=false 873pio_addr=8804615848707 874pio_latency=1000 875pio_size=8 876ret_bad_addr=false 877ret_data16=65535 878ret_data32=4294967295 879ret_data64=18446744073709551615 880ret_data8=255 881system=system 882update_data=false 883warn_access=
|
880pio=system.iobus.port[16]
| 884pio=system.iobus.master[15]
|
881 882[system.tsunami.fake_pnp_read5] 883type=IsaFake 884fake_mem=false 885pio_addr=8804615848771 886pio_latency=1000 887pio_size=8 888ret_bad_addr=false 889ret_data16=65535 890ret_data32=4294967295 891ret_data64=18446744073709551615 892ret_data8=255 893system=system 894update_data=false 895warn_access=
| 885 886[system.tsunami.fake_pnp_read5] 887type=IsaFake 888fake_mem=false 889pio_addr=8804615848771 890pio_latency=1000 891pio_size=8 892ret_bad_addr=false 893ret_data16=65535 894ret_data32=4294967295 895ret_data64=18446744073709551615 896ret_data8=255 897system=system 898update_data=false 899warn_access=
|
896pio=system.iobus.port[17]
| 900pio=system.iobus.master[16]
|
897 898[system.tsunami.fake_pnp_read6] 899type=IsaFake 900fake_mem=false 901pio_addr=8804615848835 902pio_latency=1000 903pio_size=8 904ret_bad_addr=false 905ret_data16=65535 906ret_data32=4294967295 907ret_data64=18446744073709551615 908ret_data8=255 909system=system 910update_data=false 911warn_access=
| 901 902[system.tsunami.fake_pnp_read6] 903type=IsaFake 904fake_mem=false 905pio_addr=8804615848835 906pio_latency=1000 907pio_size=8 908ret_bad_addr=false 909ret_data16=65535 910ret_data32=4294967295 911ret_data64=18446744073709551615 912ret_data8=255 913system=system 914update_data=false 915warn_access=
|
912pio=system.iobus.port[18]
| 916pio=system.iobus.master[17]
|
913 914[system.tsunami.fake_pnp_read7] 915type=IsaFake 916fake_mem=false 917pio_addr=8804615848899 918pio_latency=1000 919pio_size=8 920ret_bad_addr=false 921ret_data16=65535 922ret_data32=4294967295 923ret_data64=18446744073709551615 924ret_data8=255 925system=system 926update_data=false 927warn_access=
| 917 918[system.tsunami.fake_pnp_read7] 919type=IsaFake 920fake_mem=false 921pio_addr=8804615848899 922pio_latency=1000 923pio_size=8 924ret_bad_addr=false 925ret_data16=65535 926ret_data32=4294967295 927ret_data64=18446744073709551615 928ret_data8=255 929system=system 930update_data=false 931warn_access=
|
928pio=system.iobus.port[19]
| 932pio=system.iobus.master[18]
|
929 930[system.tsunami.fake_pnp_write] 931type=IsaFake 932fake_mem=false 933pio_addr=8804615850617 934pio_latency=1000 935pio_size=8 936ret_bad_addr=false 937ret_data16=65535 938ret_data32=4294967295 939ret_data64=18446744073709551615 940ret_data8=255 941system=system 942update_data=false 943warn_access=
| 933 934[system.tsunami.fake_pnp_write] 935type=IsaFake 936fake_mem=false 937pio_addr=8804615850617 938pio_latency=1000 939pio_size=8 940ret_bad_addr=false 941ret_data16=65535 942ret_data32=4294967295 943ret_data64=18446744073709551615 944ret_data8=255 945system=system 946update_data=false 947warn_access=
|
944pio=system.iobus.port[11]
| 948pio=system.iobus.master[10]
|
945 946[system.tsunami.fake_ppc] 947type=IsaFake 948fake_mem=false 949pio_addr=8804615848891 950pio_latency=1000 951pio_size=8 952ret_bad_addr=false 953ret_data16=65535 954ret_data32=4294967295 955ret_data64=18446744073709551615 956ret_data8=255 957system=system 958update_data=false 959warn_access=
| 949 950[system.tsunami.fake_ppc] 951type=IsaFake 952fake_mem=false 953pio_addr=8804615848891 954pio_latency=1000 955pio_size=8 956ret_bad_addr=false 957ret_data16=65535 958ret_data32=4294967295 959ret_data64=18446744073709551615 960ret_data8=255 961system=system 962update_data=false 963warn_access=
|
960pio=system.iobus.port[8]
| 964pio=system.iobus.master[7]
|
961 962[system.tsunami.fake_sm_chip] 963type=IsaFake 964fake_mem=false 965pio_addr=8804615848816 966pio_latency=1000 967pio_size=8 968ret_bad_addr=false 969ret_data16=65535 970ret_data32=4294967295 971ret_data64=18446744073709551615 972ret_data8=255 973system=system 974update_data=false 975warn_access=
| 965 966[system.tsunami.fake_sm_chip] 967type=IsaFake 968fake_mem=false 969pio_addr=8804615848816 970pio_latency=1000 971pio_size=8 972ret_bad_addr=false 973ret_data16=65535 974ret_data32=4294967295 975ret_data64=18446744073709551615 976ret_data8=255 977system=system 978update_data=false 979warn_access=
|
976pio=system.iobus.port[3]
| 980pio=system.iobus.master[2]
|
977 978[system.tsunami.fake_uart1] 979type=IsaFake 980fake_mem=false 981pio_addr=8804615848696 982pio_latency=1000 983pio_size=8 984ret_bad_addr=false 985ret_data16=65535 986ret_data32=4294967295 987ret_data64=18446744073709551615 988ret_data8=255 989system=system 990update_data=false 991warn_access=
| 981 982[system.tsunami.fake_uart1] 983type=IsaFake 984fake_mem=false 985pio_addr=8804615848696 986pio_latency=1000 987pio_size=8 988ret_bad_addr=false 989ret_data16=65535 990ret_data32=4294967295 991ret_data64=18446744073709551615 992ret_data8=255 993system=system 994update_data=false 995warn_access=
|
992pio=system.iobus.port[4]
| 996pio=system.iobus.master[3]
|
993 994[system.tsunami.fake_uart2] 995type=IsaFake 996fake_mem=false 997pio_addr=8804615848936 998pio_latency=1000 999pio_size=8 1000ret_bad_addr=false 1001ret_data16=65535 1002ret_data32=4294967295 1003ret_data64=18446744073709551615 1004ret_data8=255 1005system=system 1006update_data=false 1007warn_access=
| 997 998[system.tsunami.fake_uart2] 999type=IsaFake 1000fake_mem=false 1001pio_addr=8804615848936 1002pio_latency=1000 1003pio_size=8 1004ret_bad_addr=false 1005ret_data16=65535 1006ret_data32=4294967295 1007ret_data64=18446744073709551615 1008ret_data8=255 1009system=system 1010update_data=false 1011warn_access=
|
1008pio=system.iobus.port[5]
| 1012pio=system.iobus.master[4]
|
1009 1010[system.tsunami.fake_uart3] 1011type=IsaFake 1012fake_mem=false 1013pio_addr=8804615848680 1014pio_latency=1000 1015pio_size=8 1016ret_bad_addr=false 1017ret_data16=65535 1018ret_data32=4294967295 1019ret_data64=18446744073709551615 1020ret_data8=255 1021system=system 1022update_data=false 1023warn_access=
| 1013 1014[system.tsunami.fake_uart3] 1015type=IsaFake 1016fake_mem=false 1017pio_addr=8804615848680 1018pio_latency=1000 1019pio_size=8 1020ret_bad_addr=false 1021ret_data16=65535 1022ret_data32=4294967295 1023ret_data64=18446744073709551615 1024ret_data8=255 1025system=system 1026update_data=false 1027warn_access=
|
1024pio=system.iobus.port[6]
| 1028pio=system.iobus.master[5]
|
1025 1026[system.tsunami.fake_uart4] 1027type=IsaFake 1028fake_mem=false 1029pio_addr=8804615848944 1030pio_latency=1000 1031pio_size=8 1032ret_bad_addr=false 1033ret_data16=65535 1034ret_data32=4294967295 1035ret_data64=18446744073709551615 1036ret_data8=255 1037system=system 1038update_data=false 1039warn_access=
| 1029 1030[system.tsunami.fake_uart4] 1031type=IsaFake 1032fake_mem=false 1033pio_addr=8804615848944 1034pio_latency=1000 1035pio_size=8 1036ret_bad_addr=false 1037ret_data16=65535 1038ret_data32=4294967295 1039ret_data64=18446744073709551615 1040ret_data8=255 1041system=system 1042update_data=false 1043warn_access=
|
1040pio=system.iobus.port[7]
| 1044pio=system.iobus.master[6]
|
1041 1042[system.tsunami.fb] 1043type=BadDevice 1044devicename=FrameBuffer 1045pio_addr=8804615848912 1046pio_latency=1000 1047system=system
| 1045 1046[system.tsunami.fb] 1047type=BadDevice 1048devicename=FrameBuffer 1049pio_addr=8804615848912 1050pio_latency=1000 1051system=system
|
1048pio=system.iobus.port[22]
| 1052pio=system.iobus.master[21]
|
1049 1050[system.tsunami.ide] 1051type=IdeController 1052BAR0=1 1053BAR0LegacyIO=false 1054BAR0Size=8 1055BAR1=1 1056BAR1LegacyIO=false 1057BAR1Size=4 1058BAR2=1 1059BAR2LegacyIO=false 1060BAR2Size=8 1061BAR3=1 1062BAR3LegacyIO=false 1063BAR3Size=4 1064BAR4=1 1065BAR4LegacyIO=false 1066BAR4Size=16 1067BAR5=1 1068BAR5LegacyIO=false 1069BAR5Size=0 1070BIST=0 1071CacheLineSize=0 1072CardbusCIS=0 1073ClassCode=1 1074Command=0 1075DeviceID=28945 1076ExpansionROM=0 1077HeaderType=0 1078InterruptLine=31 1079InterruptPin=1 1080LatencyTimer=0 1081MaximumLatency=0 1082MinimumGrant=0 1083ProgIF=133 1084Revision=0 1085Status=640 1086SubClassCode=1 1087SubsystemID=0 1088SubsystemVendorID=0 1089VendorID=32902 1090config_latency=20000 1091ctrl_offset=0 1092disks=system.disk0 system.disk2 1093io_shift=0 1094max_backoff_delay=10000000 1095min_backoff_delay=4000 1096pci_bus=0 1097pci_dev=0 1098pci_func=0 1099pio_latency=1000 1100platform=system.tsunami 1101system=system
| 1053 1054[system.tsunami.ide] 1055type=IdeController 1056BAR0=1 1057BAR0LegacyIO=false 1058BAR0Size=8 1059BAR1=1 1060BAR1LegacyIO=false 1061BAR1Size=4 1062BAR2=1 1063BAR2LegacyIO=false 1064BAR2Size=8 1065BAR3=1 1066BAR3LegacyIO=false 1067BAR3Size=4 1068BAR4=1 1069BAR4LegacyIO=false 1070BAR4Size=16 1071BAR5=1 1072BAR5LegacyIO=false 1073BAR5Size=0 1074BIST=0 1075CacheLineSize=0 1076CardbusCIS=0 1077ClassCode=1 1078Command=0 1079DeviceID=28945 1080ExpansionROM=0 1081HeaderType=0 1082InterruptLine=31 1083InterruptPin=1 1084LatencyTimer=0 1085MaximumLatency=0 1086MinimumGrant=0 1087ProgIF=133 1088Revision=0 1089Status=640 1090SubClassCode=1 1091SubsystemID=0 1092SubsystemVendorID=0 1093VendorID=32902 1094config_latency=20000 1095ctrl_offset=0 1096disks=system.disk0 system.disk2 1097io_shift=0 1098max_backoff_delay=10000000 1099min_backoff_delay=4000 1100pci_bus=0 1101pci_dev=0 1102pci_func=0 1103pio_latency=1000 1104platform=system.tsunami 1105system=system
|
1102config=system.iobus.port[27] 1103dma=system.iobus.port[28] 1104pio=system.iobus.port[26]
| 1106config=system.iobus.master[26] 1107dma=system.iobus.slave[1] 1108pio=system.iobus.master[25]
|
1105 1106[system.tsunami.io] 1107type=TsunamiIO 1108frequency=976562500 1109pio_addr=8804615847936 1110pio_latency=1000 1111system=system 1112time=Thu Jan 1 00:00:00 2009 1113tsunami=system.tsunami 1114year_is_bcd=false
| 1109 1110[system.tsunami.io] 1111type=TsunamiIO 1112frequency=976562500 1113pio_addr=8804615847936 1114pio_latency=1000 1115system=system 1116time=Thu Jan 1 00:00:00 2009 1117tsunami=system.tsunami 1118year_is_bcd=false
|
1115pio=system.iobus.port[23]
| 1119pio=system.iobus.master[22]
|
1116 1117[system.tsunami.pchip] 1118type=TsunamiPChip 1119pio_addr=8802535473152 1120pio_latency=1000 1121system=system 1122tsunami=system.tsunami
| 1120 1121[system.tsunami.pchip] 1122type=TsunamiPChip 1123pio_addr=8802535473152 1124pio_latency=1000 1125system=system 1126tsunami=system.tsunami
|
1123pio=system.iobus.port[2]
| 1127pio=system.iobus.master[1]
|
1124 1125[system.tsunami.pciconfig] 1126type=PciConfigAll 1127bus=0 1128pio_latency=1 1129platform=system.tsunami 1130size=16777216 1131system=system 1132pio=system.iobus.default 1133 1134[system.tsunami.uart] 1135type=Uart8250 1136pio_addr=8804615848952 1137pio_latency=1000 1138platform=system.tsunami 1139system=system 1140terminal=system.terminal
| 1128 1129[system.tsunami.pciconfig] 1130type=PciConfigAll 1131bus=0 1132pio_latency=1 1133platform=system.tsunami 1134size=16777216 1135system=system 1136pio=system.iobus.default 1137 1138[system.tsunami.uart] 1139type=Uart8250 1140pio_addr=8804615848952 1141pio_latency=1000 1142platform=system.tsunami 1143system=system 1144terminal=system.terminal
|
1141pio=system.iobus.port[24]
| 1145pio=system.iobus.master[23]
|
1142
| 1146
|