1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain
|
18console=/scratch/nilay/GEM5/system/binaries/console
| 18console=/work/gem5/dist/binaries/console
|
19eventq_index=0 20init_param=0
| 19eventq_index=0 20init_param=0
|
21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
| 21kernel=/work/gem5/dist/binaries/vmlinux
|
22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem 28mmap_using_noreserve=false
| 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem 28mmap_using_noreserve=false
|
| 29multi_thread=false
|
29num_work_ids=16
| 30num_work_ids=16
|
30pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal 31readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
| 31pal=/work/gem5/dist/binaries/ts_osfpal 32readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh
|
32symbolfile= 33system_rev=1024 34system_type=34 35work_begin_ckpt_count=0 36work_begin_cpu_id_exit=-1 37work_begin_exit_count=0 38work_cpus_ckpt_count=0 39work_end_ckpt_count=0 40work_end_exit_count=0 41work_item_id=-1 42system_port=system.membus.slave[0] 43 44[system.bridge] 45type=Bridge 46clk_domain=system.clk_domain 47delay=50000 48eventq_index=0 49ranges=8796093022208:18446744073709551615 50req_size=16 51resp_size=16 52master=system.iobus.slave[0] 53slave=system.membus.master[0] 54 55[system.clk_domain] 56type=SrcClockDomain 57clock=1000 58domain_id=-1 59eventq_index=0 60init_perf_level=0 61voltage_domain=system.voltage_domain 62 63[system.cpu] 64type=DerivO3CPU 65children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer 66LFSTSize=1024 67LQEntries=32 68LSQCheckLoads=true 69LSQDepCheckShift=4 70SQEntries=32 71SSITSize=1024 72activity=0 73backComSize=5 74branchPred=system.cpu.branchPred 75cachePorts=200 76checker=Null 77clk_domain=system.cpu_clk_domain 78commitToDecodeDelay=1 79commitToFetchDelay=1 80commitToIEWDelay=1 81commitToRenameDelay=1 82commitWidth=8 83cpu_id=0 84decodeToFetchDelay=1 85decodeToRenameDelay=1 86decodeWidth=8 87dispatchWidth=8 88do_checkpoint_insts=true 89do_quiesce=true 90do_statistics_insts=true 91dtb=system.cpu.dtb 92eventq_index=0 93fetchBufferSize=64 94fetchQueueSize=32 95fetchToDecodeDelay=1 96fetchTrapLatency=1 97fetchWidth=8 98forwardComSize=5 99fuPool=system.cpu.fuPool 100function_trace=false 101function_trace_start=0 102iewToCommitDelay=1 103iewToDecodeDelay=1 104iewToFetchDelay=1 105iewToRenameDelay=1 106interrupts=system.cpu.interrupts 107isa=system.cpu.isa 108issueToExecuteDelay=1 109issueWidth=8 110itb=system.cpu.itb 111max_insts_all_threads=0 112max_insts_any_thread=0 113max_loads_all_threads=0 114max_loads_any_thread=0 115needsTSO=false 116numIQEntries=64 117numPhysCCRegs=0 118numPhysFloatRegs=256 119numPhysIntRegs=256 120numROBEntries=192 121numRobs=1 122numThreads=1 123profile=0 124progress_interval=0 125renameToDecodeDelay=1 126renameToFetchDelay=1 127renameToIEWDelay=2 128renameToROBDelay=1 129renameWidth=8 130simpoint_start_insts= 131smtCommitPolicy=RoundRobin 132smtFetchPolicy=SingleThread 133smtIQPolicy=Partitioned 134smtIQThreshold=100 135smtLSQPolicy=Partitioned 136smtLSQThreshold=100 137smtNumFetchingThreads=1 138smtROBPolicy=Partitioned 139smtROBThreshold=100 140socket_id=0 141squashWidth=8 142store_set_clear_period=250000 143switched_out=false 144system=system 145tracer=system.cpu.tracer 146trapLatency=13 147wbWidth=8 148workload= 149dcache_port=system.cpu.dcache.cpu_side 150icache_port=system.cpu.icache.cpu_side 151 152[system.cpu.branchPred] 153type=TournamentBP 154BTBEntries=4096 155BTBTagSize=16 156RASSize=16 157choiceCtrBits=2 158choicePredictorSize=8192 159eventq_index=0 160globalCtrBits=2 161globalPredictorSize=8192 162instShiftAmt=2 163localCtrBits=2 164localHistoryTableSize=2048 165localPredictorSize=2048 166numThreads=1 167 168[system.cpu.dcache] 169type=Cache 170children=tags 171addr_ranges=0:18446744073709551615 172assoc=4 173clk_domain=system.cpu_clk_domain
| 33symbolfile= 34system_rev=1024 35system_type=34 36work_begin_ckpt_count=0 37work_begin_cpu_id_exit=-1 38work_begin_exit_count=0 39work_cpus_ckpt_count=0 40work_end_ckpt_count=0 41work_end_exit_count=0 42work_item_id=-1 43system_port=system.membus.slave[0] 44 45[system.bridge] 46type=Bridge 47clk_domain=system.clk_domain 48delay=50000 49eventq_index=0 50ranges=8796093022208:18446744073709551615 51req_size=16 52resp_size=16 53master=system.iobus.slave[0] 54slave=system.membus.master[0] 55 56[system.clk_domain] 57type=SrcClockDomain 58clock=1000 59domain_id=-1 60eventq_index=0 61init_perf_level=0 62voltage_domain=system.voltage_domain 63 64[system.cpu] 65type=DerivO3CPU 66children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer 67LFSTSize=1024 68LQEntries=32 69LSQCheckLoads=true 70LSQDepCheckShift=4 71SQEntries=32 72SSITSize=1024 73activity=0 74backComSize=5 75branchPred=system.cpu.branchPred 76cachePorts=200 77checker=Null 78clk_domain=system.cpu_clk_domain 79commitToDecodeDelay=1 80commitToFetchDelay=1 81commitToIEWDelay=1 82commitToRenameDelay=1 83commitWidth=8 84cpu_id=0 85decodeToFetchDelay=1 86decodeToRenameDelay=1 87decodeWidth=8 88dispatchWidth=8 89do_checkpoint_insts=true 90do_quiesce=true 91do_statistics_insts=true 92dtb=system.cpu.dtb 93eventq_index=0 94fetchBufferSize=64 95fetchQueueSize=32 96fetchToDecodeDelay=1 97fetchTrapLatency=1 98fetchWidth=8 99forwardComSize=5 100fuPool=system.cpu.fuPool 101function_trace=false 102function_trace_start=0 103iewToCommitDelay=1 104iewToDecodeDelay=1 105iewToFetchDelay=1 106iewToRenameDelay=1 107interrupts=system.cpu.interrupts 108isa=system.cpu.isa 109issueToExecuteDelay=1 110issueWidth=8 111itb=system.cpu.itb 112max_insts_all_threads=0 113max_insts_any_thread=0 114max_loads_all_threads=0 115max_loads_any_thread=0 116needsTSO=false 117numIQEntries=64 118numPhysCCRegs=0 119numPhysFloatRegs=256 120numPhysIntRegs=256 121numROBEntries=192 122numRobs=1 123numThreads=1 124profile=0 125progress_interval=0 126renameToDecodeDelay=1 127renameToFetchDelay=1 128renameToIEWDelay=2 129renameToROBDelay=1 130renameWidth=8 131simpoint_start_insts= 132smtCommitPolicy=RoundRobin 133smtFetchPolicy=SingleThread 134smtIQPolicy=Partitioned 135smtIQThreshold=100 136smtLSQPolicy=Partitioned 137smtLSQThreshold=100 138smtNumFetchingThreads=1 139smtROBPolicy=Partitioned 140smtROBThreshold=100 141socket_id=0 142squashWidth=8 143store_set_clear_period=250000 144switched_out=false 145system=system 146tracer=system.cpu.tracer 147trapLatency=13 148wbWidth=8 149workload= 150dcache_port=system.cpu.dcache.cpu_side 151icache_port=system.cpu.icache.cpu_side 152 153[system.cpu.branchPred] 154type=TournamentBP 155BTBEntries=4096 156BTBTagSize=16 157RASSize=16 158choiceCtrBits=2 159choicePredictorSize=8192 160eventq_index=0 161globalCtrBits=2 162globalPredictorSize=8192 163instShiftAmt=2 164localCtrBits=2 165localHistoryTableSize=2048 166localPredictorSize=2048 167numThreads=1 168 169[system.cpu.dcache] 170type=Cache 171children=tags 172addr_ranges=0:18446744073709551615 173assoc=4 174clk_domain=system.cpu_clk_domain
|
| 175clusivity=mostly_incl
|
174demand_mshr_reserve=1 175eventq_index=0 176forward_snoops=true 177hit_latency=2 178is_read_only=false 179max_miss_count=0 180mshrs=4 181prefetch_on_access=false 182prefetcher=Null 183response_latency=2 184sequential_access=false 185size=32768 186system=system 187tags=system.cpu.dcache.tags 188tgts_per_mshr=20 189write_buffers=8
| 176demand_mshr_reserve=1 177eventq_index=0 178forward_snoops=true 179hit_latency=2 180is_read_only=false 181max_miss_count=0 182mshrs=4 183prefetch_on_access=false 184prefetcher=Null 185response_latency=2 186sequential_access=false 187size=32768 188system=system 189tags=system.cpu.dcache.tags 190tgts_per_mshr=20 191write_buffers=8
|
| 192writeback_clean=false
|
190cpu_side=system.cpu.dcache_port 191mem_side=system.cpu.toL2Bus.slave[1] 192 193[system.cpu.dcache.tags] 194type=LRU 195assoc=4 196block_size=64 197clk_domain=system.cpu_clk_domain 198eventq_index=0 199hit_latency=2 200sequential_access=false 201size=32768 202 203[system.cpu.dtb] 204type=AlphaTLB 205eventq_index=0 206size=64 207 208[system.cpu.fuPool] 209type=FUPool 210children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 211FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 212eventq_index=0 213 214[system.cpu.fuPool.FUList0] 215type=FUDesc 216children=opList 217count=6 218eventq_index=0 219opList=system.cpu.fuPool.FUList0.opList 220 221[system.cpu.fuPool.FUList0.opList] 222type=OpDesc 223eventq_index=0 224opClass=IntAlu 225opLat=1 226pipelined=true 227 228[system.cpu.fuPool.FUList1] 229type=FUDesc 230children=opList0 opList1 231count=2 232eventq_index=0 233opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 234 235[system.cpu.fuPool.FUList1.opList0] 236type=OpDesc 237eventq_index=0 238opClass=IntMult 239opLat=3 240pipelined=true 241 242[system.cpu.fuPool.FUList1.opList1] 243type=OpDesc 244eventq_index=0 245opClass=IntDiv 246opLat=20 247pipelined=false 248 249[system.cpu.fuPool.FUList2] 250type=FUDesc 251children=opList0 opList1 opList2 252count=4 253eventq_index=0 254opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 255 256[system.cpu.fuPool.FUList2.opList0] 257type=OpDesc 258eventq_index=0 259opClass=FloatAdd 260opLat=2 261pipelined=true 262 263[system.cpu.fuPool.FUList2.opList1] 264type=OpDesc 265eventq_index=0 266opClass=FloatCmp 267opLat=2 268pipelined=true 269 270[system.cpu.fuPool.FUList2.opList2] 271type=OpDesc 272eventq_index=0 273opClass=FloatCvt 274opLat=2 275pipelined=true 276 277[system.cpu.fuPool.FUList3] 278type=FUDesc 279children=opList0 opList1 opList2 280count=2 281eventq_index=0 282opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 283 284[system.cpu.fuPool.FUList3.opList0] 285type=OpDesc 286eventq_index=0 287opClass=FloatMult 288opLat=4 289pipelined=true 290 291[system.cpu.fuPool.FUList3.opList1] 292type=OpDesc 293eventq_index=0 294opClass=FloatDiv 295opLat=12 296pipelined=false 297 298[system.cpu.fuPool.FUList3.opList2] 299type=OpDesc 300eventq_index=0 301opClass=FloatSqrt 302opLat=24 303pipelined=false 304 305[system.cpu.fuPool.FUList4] 306type=FUDesc 307children=opList 308count=0 309eventq_index=0 310opList=system.cpu.fuPool.FUList4.opList 311 312[system.cpu.fuPool.FUList4.opList] 313type=OpDesc 314eventq_index=0 315opClass=MemRead 316opLat=1 317pipelined=true 318 319[system.cpu.fuPool.FUList5] 320type=FUDesc 321children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 322count=4 323eventq_index=0 324opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 325 326[system.cpu.fuPool.FUList5.opList00] 327type=OpDesc 328eventq_index=0 329opClass=SimdAdd 330opLat=1 331pipelined=true 332 333[system.cpu.fuPool.FUList5.opList01] 334type=OpDesc 335eventq_index=0 336opClass=SimdAddAcc 337opLat=1 338pipelined=true 339 340[system.cpu.fuPool.FUList5.opList02] 341type=OpDesc 342eventq_index=0 343opClass=SimdAlu 344opLat=1 345pipelined=true 346 347[system.cpu.fuPool.FUList5.opList03] 348type=OpDesc 349eventq_index=0 350opClass=SimdCmp 351opLat=1 352pipelined=true 353 354[system.cpu.fuPool.FUList5.opList04] 355type=OpDesc 356eventq_index=0 357opClass=SimdCvt 358opLat=1 359pipelined=true 360 361[system.cpu.fuPool.FUList5.opList05] 362type=OpDesc 363eventq_index=0 364opClass=SimdMisc 365opLat=1 366pipelined=true 367 368[system.cpu.fuPool.FUList5.opList06] 369type=OpDesc 370eventq_index=0 371opClass=SimdMult 372opLat=1 373pipelined=true 374 375[system.cpu.fuPool.FUList5.opList07] 376type=OpDesc 377eventq_index=0 378opClass=SimdMultAcc 379opLat=1 380pipelined=true 381 382[system.cpu.fuPool.FUList5.opList08] 383type=OpDesc 384eventq_index=0 385opClass=SimdShift 386opLat=1 387pipelined=true 388 389[system.cpu.fuPool.FUList5.opList09] 390type=OpDesc 391eventq_index=0 392opClass=SimdShiftAcc 393opLat=1 394pipelined=true 395 396[system.cpu.fuPool.FUList5.opList10] 397type=OpDesc 398eventq_index=0 399opClass=SimdSqrt 400opLat=1 401pipelined=true 402 403[system.cpu.fuPool.FUList5.opList11] 404type=OpDesc 405eventq_index=0 406opClass=SimdFloatAdd 407opLat=1 408pipelined=true 409 410[system.cpu.fuPool.FUList5.opList12] 411type=OpDesc 412eventq_index=0 413opClass=SimdFloatAlu 414opLat=1 415pipelined=true 416 417[system.cpu.fuPool.FUList5.opList13] 418type=OpDesc 419eventq_index=0 420opClass=SimdFloatCmp 421opLat=1 422pipelined=true 423 424[system.cpu.fuPool.FUList5.opList14] 425type=OpDesc 426eventq_index=0 427opClass=SimdFloatCvt 428opLat=1 429pipelined=true 430 431[system.cpu.fuPool.FUList5.opList15] 432type=OpDesc 433eventq_index=0 434opClass=SimdFloatDiv 435opLat=1 436pipelined=true 437 438[system.cpu.fuPool.FUList5.opList16] 439type=OpDesc 440eventq_index=0 441opClass=SimdFloatMisc 442opLat=1 443pipelined=true 444 445[system.cpu.fuPool.FUList5.opList17] 446type=OpDesc 447eventq_index=0 448opClass=SimdFloatMult 449opLat=1 450pipelined=true 451 452[system.cpu.fuPool.FUList5.opList18] 453type=OpDesc 454eventq_index=0 455opClass=SimdFloatMultAcc 456opLat=1 457pipelined=true 458 459[system.cpu.fuPool.FUList5.opList19] 460type=OpDesc 461eventq_index=0 462opClass=SimdFloatSqrt 463opLat=1 464pipelined=true 465 466[system.cpu.fuPool.FUList6] 467type=FUDesc 468children=opList 469count=0 470eventq_index=0 471opList=system.cpu.fuPool.FUList6.opList 472 473[system.cpu.fuPool.FUList6.opList] 474type=OpDesc 475eventq_index=0 476opClass=MemWrite 477opLat=1 478pipelined=true 479 480[system.cpu.fuPool.FUList7] 481type=FUDesc 482children=opList0 opList1 483count=4 484eventq_index=0 485opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 486 487[system.cpu.fuPool.FUList7.opList0] 488type=OpDesc 489eventq_index=0 490opClass=MemRead 491opLat=1 492pipelined=true 493 494[system.cpu.fuPool.FUList7.opList1] 495type=OpDesc 496eventq_index=0 497opClass=MemWrite 498opLat=1 499pipelined=true 500 501[system.cpu.fuPool.FUList8] 502type=FUDesc 503children=opList 504count=1 505eventq_index=0 506opList=system.cpu.fuPool.FUList8.opList 507 508[system.cpu.fuPool.FUList8.opList] 509type=OpDesc 510eventq_index=0 511opClass=IprAccess 512opLat=3 513pipelined=false 514 515[system.cpu.icache] 516type=Cache 517children=tags 518addr_ranges=0:18446744073709551615 519assoc=1 520clk_domain=system.cpu_clk_domain
| 193cpu_side=system.cpu.dcache_port 194mem_side=system.cpu.toL2Bus.slave[1] 195 196[system.cpu.dcache.tags] 197type=LRU 198assoc=4 199block_size=64 200clk_domain=system.cpu_clk_domain 201eventq_index=0 202hit_latency=2 203sequential_access=false 204size=32768 205 206[system.cpu.dtb] 207type=AlphaTLB 208eventq_index=0 209size=64 210 211[system.cpu.fuPool] 212type=FUPool 213children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 214FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 215eventq_index=0 216 217[system.cpu.fuPool.FUList0] 218type=FUDesc 219children=opList 220count=6 221eventq_index=0 222opList=system.cpu.fuPool.FUList0.opList 223 224[system.cpu.fuPool.FUList0.opList] 225type=OpDesc 226eventq_index=0 227opClass=IntAlu 228opLat=1 229pipelined=true 230 231[system.cpu.fuPool.FUList1] 232type=FUDesc 233children=opList0 opList1 234count=2 235eventq_index=0 236opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 237 238[system.cpu.fuPool.FUList1.opList0] 239type=OpDesc 240eventq_index=0 241opClass=IntMult 242opLat=3 243pipelined=true 244 245[system.cpu.fuPool.FUList1.opList1] 246type=OpDesc 247eventq_index=0 248opClass=IntDiv 249opLat=20 250pipelined=false 251 252[system.cpu.fuPool.FUList2] 253type=FUDesc 254children=opList0 opList1 opList2 255count=4 256eventq_index=0 257opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 258 259[system.cpu.fuPool.FUList2.opList0] 260type=OpDesc 261eventq_index=0 262opClass=FloatAdd 263opLat=2 264pipelined=true 265 266[system.cpu.fuPool.FUList2.opList1] 267type=OpDesc 268eventq_index=0 269opClass=FloatCmp 270opLat=2 271pipelined=true 272 273[system.cpu.fuPool.FUList2.opList2] 274type=OpDesc 275eventq_index=0 276opClass=FloatCvt 277opLat=2 278pipelined=true 279 280[system.cpu.fuPool.FUList3] 281type=FUDesc 282children=opList0 opList1 opList2 283count=2 284eventq_index=0 285opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 286 287[system.cpu.fuPool.FUList3.opList0] 288type=OpDesc 289eventq_index=0 290opClass=FloatMult 291opLat=4 292pipelined=true 293 294[system.cpu.fuPool.FUList3.opList1] 295type=OpDesc 296eventq_index=0 297opClass=FloatDiv 298opLat=12 299pipelined=false 300 301[system.cpu.fuPool.FUList3.opList2] 302type=OpDesc 303eventq_index=0 304opClass=FloatSqrt 305opLat=24 306pipelined=false 307 308[system.cpu.fuPool.FUList4] 309type=FUDesc 310children=opList 311count=0 312eventq_index=0 313opList=system.cpu.fuPool.FUList4.opList 314 315[system.cpu.fuPool.FUList4.opList] 316type=OpDesc 317eventq_index=0 318opClass=MemRead 319opLat=1 320pipelined=true 321 322[system.cpu.fuPool.FUList5] 323type=FUDesc 324children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 325count=4 326eventq_index=0 327opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 328 329[system.cpu.fuPool.FUList5.opList00] 330type=OpDesc 331eventq_index=0 332opClass=SimdAdd 333opLat=1 334pipelined=true 335 336[system.cpu.fuPool.FUList5.opList01] 337type=OpDesc 338eventq_index=0 339opClass=SimdAddAcc 340opLat=1 341pipelined=true 342 343[system.cpu.fuPool.FUList5.opList02] 344type=OpDesc 345eventq_index=0 346opClass=SimdAlu 347opLat=1 348pipelined=true 349 350[system.cpu.fuPool.FUList5.opList03] 351type=OpDesc 352eventq_index=0 353opClass=SimdCmp 354opLat=1 355pipelined=true 356 357[system.cpu.fuPool.FUList5.opList04] 358type=OpDesc 359eventq_index=0 360opClass=SimdCvt 361opLat=1 362pipelined=true 363 364[system.cpu.fuPool.FUList5.opList05] 365type=OpDesc 366eventq_index=0 367opClass=SimdMisc 368opLat=1 369pipelined=true 370 371[system.cpu.fuPool.FUList5.opList06] 372type=OpDesc 373eventq_index=0 374opClass=SimdMult 375opLat=1 376pipelined=true 377 378[system.cpu.fuPool.FUList5.opList07] 379type=OpDesc 380eventq_index=0 381opClass=SimdMultAcc 382opLat=1 383pipelined=true 384 385[system.cpu.fuPool.FUList5.opList08] 386type=OpDesc 387eventq_index=0 388opClass=SimdShift 389opLat=1 390pipelined=true 391 392[system.cpu.fuPool.FUList5.opList09] 393type=OpDesc 394eventq_index=0 395opClass=SimdShiftAcc 396opLat=1 397pipelined=true 398 399[system.cpu.fuPool.FUList5.opList10] 400type=OpDesc 401eventq_index=0 402opClass=SimdSqrt 403opLat=1 404pipelined=true 405 406[system.cpu.fuPool.FUList5.opList11] 407type=OpDesc 408eventq_index=0 409opClass=SimdFloatAdd 410opLat=1 411pipelined=true 412 413[system.cpu.fuPool.FUList5.opList12] 414type=OpDesc 415eventq_index=0 416opClass=SimdFloatAlu 417opLat=1 418pipelined=true 419 420[system.cpu.fuPool.FUList5.opList13] 421type=OpDesc 422eventq_index=0 423opClass=SimdFloatCmp 424opLat=1 425pipelined=true 426 427[system.cpu.fuPool.FUList5.opList14] 428type=OpDesc 429eventq_index=0 430opClass=SimdFloatCvt 431opLat=1 432pipelined=true 433 434[system.cpu.fuPool.FUList5.opList15] 435type=OpDesc 436eventq_index=0 437opClass=SimdFloatDiv 438opLat=1 439pipelined=true 440 441[system.cpu.fuPool.FUList5.opList16] 442type=OpDesc 443eventq_index=0 444opClass=SimdFloatMisc 445opLat=1 446pipelined=true 447 448[system.cpu.fuPool.FUList5.opList17] 449type=OpDesc 450eventq_index=0 451opClass=SimdFloatMult 452opLat=1 453pipelined=true 454 455[system.cpu.fuPool.FUList5.opList18] 456type=OpDesc 457eventq_index=0 458opClass=SimdFloatMultAcc 459opLat=1 460pipelined=true 461 462[system.cpu.fuPool.FUList5.opList19] 463type=OpDesc 464eventq_index=0 465opClass=SimdFloatSqrt 466opLat=1 467pipelined=true 468 469[system.cpu.fuPool.FUList6] 470type=FUDesc 471children=opList 472count=0 473eventq_index=0 474opList=system.cpu.fuPool.FUList6.opList 475 476[system.cpu.fuPool.FUList6.opList] 477type=OpDesc 478eventq_index=0 479opClass=MemWrite 480opLat=1 481pipelined=true 482 483[system.cpu.fuPool.FUList7] 484type=FUDesc 485children=opList0 opList1 486count=4 487eventq_index=0 488opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 489 490[system.cpu.fuPool.FUList7.opList0] 491type=OpDesc 492eventq_index=0 493opClass=MemRead 494opLat=1 495pipelined=true 496 497[system.cpu.fuPool.FUList7.opList1] 498type=OpDesc 499eventq_index=0 500opClass=MemWrite 501opLat=1 502pipelined=true 503 504[system.cpu.fuPool.FUList8] 505type=FUDesc 506children=opList 507count=1 508eventq_index=0 509opList=system.cpu.fuPool.FUList8.opList 510 511[system.cpu.fuPool.FUList8.opList] 512type=OpDesc 513eventq_index=0 514opClass=IprAccess 515opLat=3 516pipelined=false 517 518[system.cpu.icache] 519type=Cache 520children=tags 521addr_ranges=0:18446744073709551615 522assoc=1 523clk_domain=system.cpu_clk_domain
|
| 524clusivity=mostly_incl
|
521demand_mshr_reserve=1 522eventq_index=0 523forward_snoops=true 524hit_latency=2 525is_read_only=true 526max_miss_count=0 527mshrs=4 528prefetch_on_access=false 529prefetcher=Null 530response_latency=2 531sequential_access=false 532size=32768 533system=system 534tags=system.cpu.icache.tags 535tgts_per_mshr=20 536write_buffers=8
| 525demand_mshr_reserve=1 526eventq_index=0 527forward_snoops=true 528hit_latency=2 529is_read_only=true 530max_miss_count=0 531mshrs=4 532prefetch_on_access=false 533prefetcher=Null 534response_latency=2 535sequential_access=false 536size=32768 537system=system 538tags=system.cpu.icache.tags 539tgts_per_mshr=20 540write_buffers=8
|
| 541writeback_clean=true
|
537cpu_side=system.cpu.icache_port 538mem_side=system.cpu.toL2Bus.slave[0] 539 540[system.cpu.icache.tags] 541type=LRU 542assoc=1 543block_size=64 544clk_domain=system.cpu_clk_domain 545eventq_index=0 546hit_latency=2 547sequential_access=false 548size=32768 549 550[system.cpu.interrupts] 551type=AlphaInterrupts 552eventq_index=0 553 554[system.cpu.isa] 555type=AlphaISA 556eventq_index=0 557system=system 558 559[system.cpu.itb] 560type=AlphaTLB 561eventq_index=0 562size=48 563 564[system.cpu.l2cache] 565type=Cache 566children=tags 567addr_ranges=0:18446744073709551615 568assoc=8 569clk_domain=system.cpu_clk_domain
| 542cpu_side=system.cpu.icache_port 543mem_side=system.cpu.toL2Bus.slave[0] 544 545[system.cpu.icache.tags] 546type=LRU 547assoc=1 548block_size=64 549clk_domain=system.cpu_clk_domain 550eventq_index=0 551hit_latency=2 552sequential_access=false 553size=32768 554 555[system.cpu.interrupts] 556type=AlphaInterrupts 557eventq_index=0 558 559[system.cpu.isa] 560type=AlphaISA 561eventq_index=0 562system=system 563 564[system.cpu.itb] 565type=AlphaTLB 566eventq_index=0 567size=48 568 569[system.cpu.l2cache] 570type=Cache 571children=tags 572addr_ranges=0:18446744073709551615 573assoc=8 574clk_domain=system.cpu_clk_domain
|
| 575clusivity=mostly_incl
|
570demand_mshr_reserve=1 571eventq_index=0 572forward_snoops=true 573hit_latency=20 574is_read_only=false 575max_miss_count=0 576mshrs=20 577prefetch_on_access=false 578prefetcher=Null 579response_latency=20 580sequential_access=false 581size=4194304 582system=system 583tags=system.cpu.l2cache.tags 584tgts_per_mshr=12 585write_buffers=8
| 576demand_mshr_reserve=1 577eventq_index=0 578forward_snoops=true 579hit_latency=20 580is_read_only=false 581max_miss_count=0 582mshrs=20 583prefetch_on_access=false 584prefetcher=Null 585response_latency=20 586sequential_access=false 587size=4194304 588system=system 589tags=system.cpu.l2cache.tags 590tgts_per_mshr=12 591write_buffers=8
|
| 592writeback_clean=false
|
586cpu_side=system.cpu.toL2Bus.master[0] 587mem_side=system.membus.slave[1] 588 589[system.cpu.l2cache.tags] 590type=LRU 591assoc=8 592block_size=64 593clk_domain=system.cpu_clk_domain 594eventq_index=0 595hit_latency=20 596sequential_access=false 597size=4194304 598 599[system.cpu.toL2Bus] 600type=CoherentXBar
| 593cpu_side=system.cpu.toL2Bus.master[0] 594mem_side=system.membus.slave[1] 595 596[system.cpu.l2cache.tags] 597type=LRU 598assoc=8 599block_size=64 600clk_domain=system.cpu_clk_domain 601eventq_index=0 602hit_latency=20 603sequential_access=false 604size=4194304 605 606[system.cpu.toL2Bus] 607type=CoherentXBar
|
| 608children=snoop_filter
|
601clk_domain=system.cpu_clk_domain 602eventq_index=0 603forward_latency=0 604frontend_latency=1 605response_latency=1
| 609clk_domain=system.cpu_clk_domain 610eventq_index=0 611forward_latency=0 612frontend_latency=1 613response_latency=1
|
606snoop_filter=Null
| 614snoop_filter=system.cpu.toL2Bus.snoop_filter
|
607snoop_response_latency=1 608system=system 609use_default_range=false 610width=32 611master=system.cpu.l2cache.cpu_side 612slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 613
| 615snoop_response_latency=1 616system=system 617use_default_range=false 618width=32 619master=system.cpu.l2cache.cpu_side 620slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 621
|
| 622[system.cpu.toL2Bus.snoop_filter] 623type=SnoopFilter 624eventq_index=0 625lookup_latency=0 626max_capacity=8388608 627system=system 628
|
614[system.cpu.tracer] 615type=ExeTracer 616eventq_index=0 617 618[system.cpu_clk_domain] 619type=SrcClockDomain 620clock=500 621domain_id=-1 622eventq_index=0 623init_perf_level=0 624voltage_domain=system.voltage_domain 625 626[system.disk0] 627type=IdeDisk 628children=image 629delay=1000000 630driveID=master 631eventq_index=0 632image=system.disk0.image 633 634[system.disk0.image] 635type=CowDiskImage 636children=child 637child=system.disk0.image.child 638eventq_index=0 639image_file= 640read_only=false 641table_size=65536 642 643[system.disk0.image.child] 644type=RawDiskImage 645eventq_index=0
| 629[system.cpu.tracer] 630type=ExeTracer 631eventq_index=0 632 633[system.cpu_clk_domain] 634type=SrcClockDomain 635clock=500 636domain_id=-1 637eventq_index=0 638init_perf_level=0 639voltage_domain=system.voltage_domain 640 641[system.disk0] 642type=IdeDisk 643children=image 644delay=1000000 645driveID=master 646eventq_index=0 647image=system.disk0.image 648 649[system.disk0.image] 650type=CowDiskImage 651children=child 652child=system.disk0.image.child 653eventq_index=0 654image_file= 655read_only=false 656table_size=65536 657 658[system.disk0.image.child] 659type=RawDiskImage 660eventq_index=0
|
646image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
| 661image_file=/work/gem5/dist/disks/linux-latest.img
|
647read_only=true 648 649[system.disk2] 650type=IdeDisk 651children=image 652delay=1000000 653driveID=master 654eventq_index=0 655image=system.disk2.image 656 657[system.disk2.image] 658type=CowDiskImage 659children=child 660child=system.disk2.image.child 661eventq_index=0 662image_file= 663read_only=false 664table_size=65536 665 666[system.disk2.image.child] 667type=RawDiskImage 668eventq_index=0
| 662read_only=true 663 664[system.disk2] 665type=IdeDisk 666children=image 667delay=1000000 668driveID=master 669eventq_index=0 670image=system.disk2.image 671 672[system.disk2.image] 673type=CowDiskImage 674children=child 675child=system.disk2.image.child 676eventq_index=0 677image_file= 678read_only=false 679table_size=65536 680 681[system.disk2.image.child] 682type=RawDiskImage 683eventq_index=0
|
669image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
| 684image_file=/work/gem5/dist/disks/linux-bigswap2.img
|
670read_only=true 671 672[system.dvfs_handler] 673type=DVFSHandler 674domains= 675enable=false 676eventq_index=0 677sys_clk_domain=system.clk_domain 678transition_latency=100000000 679 680[system.intrctrl] 681type=IntrControl 682eventq_index=0 683sys=system 684 685[system.iobus] 686type=NoncoherentXBar 687clk_domain=system.clk_domain 688eventq_index=0 689forward_latency=1 690frontend_latency=2 691response_latency=2
| 685read_only=true 686 687[system.dvfs_handler] 688type=DVFSHandler 689domains= 690enable=false 691eventq_index=0 692sys_clk_domain=system.clk_domain 693transition_latency=100000000 694 695[system.intrctrl] 696type=IntrControl 697eventq_index=0 698sys=system 699 700[system.iobus] 701type=NoncoherentXBar 702clk_domain=system.clk_domain 703eventq_index=0 704forward_latency=1 705frontend_latency=2 706response_latency=2
|
692use_default_range=true
| 707use_default_range=false
|
693width=16
| 708width=16
|
694default=system.tsunami.pciconfig.pio 695master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
| 709master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
|
696slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 697 698[system.iocache] 699type=Cache 700children=tags 701addr_ranges=0:134217727 702assoc=8 703clk_domain=system.clk_domain
| 710slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 711 712[system.iocache] 713type=Cache 714children=tags 715addr_ranges=0:134217727 716assoc=8 717clk_domain=system.clk_domain
|
| 718clusivity=mostly_incl
|
704demand_mshr_reserve=1 705eventq_index=0 706forward_snoops=false 707hit_latency=50 708is_read_only=false 709max_miss_count=0 710mshrs=20 711prefetch_on_access=false 712prefetcher=Null 713response_latency=50 714sequential_access=false 715size=1024 716system=system 717tags=system.iocache.tags 718tgts_per_mshr=12 719write_buffers=8
| 719demand_mshr_reserve=1 720eventq_index=0 721forward_snoops=false 722hit_latency=50 723is_read_only=false 724max_miss_count=0 725mshrs=20 726prefetch_on_access=false 727prefetcher=Null 728response_latency=50 729sequential_access=false 730size=1024 731system=system 732tags=system.iocache.tags 733tgts_per_mshr=12 734write_buffers=8
|
720cpu_side=system.iobus.master[29]
| 735writeback_clean=false 736cpu_side=system.iobus.master[27]
|
721mem_side=system.membus.slave[2] 722 723[system.iocache.tags] 724type=LRU 725assoc=8 726block_size=64 727clk_domain=system.clk_domain 728eventq_index=0 729hit_latency=50 730sequential_access=false 731size=1024 732 733[system.membus] 734type=CoherentXBar 735children=badaddr_responder 736clk_domain=system.clk_domain 737eventq_index=0 738forward_latency=4 739frontend_latency=3 740response_latency=2 741snoop_filter=Null 742snoop_response_latency=4 743system=system 744use_default_range=false 745width=16 746default=system.membus.badaddr_responder.pio 747master=system.bridge.slave system.physmem.port 748slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 749 750[system.membus.badaddr_responder] 751type=IsaFake 752clk_domain=system.clk_domain 753eventq_index=0 754fake_mem=false 755pio_addr=0 756pio_latency=100000 757pio_size=8 758ret_bad_addr=true 759ret_data16=65535 760ret_data32=4294967295 761ret_data64=18446744073709551615 762ret_data8=255 763system=system 764update_data=false 765warn_access= 766pio=system.membus.default 767 768[system.physmem] 769type=DRAMCtrl 770IDD0=0.075000 771IDD02=0.000000 772IDD2N=0.050000 773IDD2N2=0.000000 774IDD2P0=0.000000 775IDD2P02=0.000000 776IDD2P1=0.000000 777IDD2P12=0.000000 778IDD3N=0.057000 779IDD3N2=0.000000 780IDD3P0=0.000000 781IDD3P02=0.000000 782IDD3P1=0.000000 783IDD3P12=0.000000 784IDD4R=0.187000 785IDD4R2=0.000000 786IDD4W=0.165000 787IDD4W2=0.000000 788IDD5=0.220000 789IDD52=0.000000 790IDD6=0.000000 791IDD62=0.000000 792VDD=1.500000 793VDD2=0.000000 794activation_limit=4 795addr_mapping=RoRaBaCoCh 796bank_groups_per_rank=0 797banks_per_rank=8 798burst_length=8 799channels=1 800clk_domain=system.clk_domain 801conf_table_reported=true 802device_bus_width=8 803device_rowbuffer_size=1024 804device_size=536870912 805devices_per_rank=8 806dll=true 807eventq_index=0 808in_addr_map=true 809max_accesses_per_row=16 810mem_sched_policy=frfcfs 811min_writes_per_switch=16 812null=false 813page_policy=open_adaptive 814range=0:134217727 815ranks_per_channel=2 816read_buffer_size=32 817static_backend_latency=10000 818static_frontend_latency=10000 819tBURST=5000 820tCCD_L=0 821tCK=1250 822tCL=13750 823tCS=2500 824tRAS=35000 825tRCD=13750 826tREFI=7800000 827tRFC=260000 828tRP=13750 829tRRD=6000 830tRRD_L=0 831tRTP=7500 832tRTW=2500 833tWR=15000 834tWTR=7500 835tXAW=30000 836tXP=0 837tXPDLL=0 838tXS=0 839tXSDLL=0 840write_buffer_size=64 841write_high_thresh_perc=85 842write_low_thresh_perc=50 843port=system.membus.master[1] 844 845[system.simple_disk] 846type=SimpleDisk 847children=disk 848disk=system.simple_disk.disk 849eventq_index=0 850system=system 851 852[system.simple_disk.disk] 853type=RawDiskImage 854eventq_index=0
| 737mem_side=system.membus.slave[2] 738 739[system.iocache.tags] 740type=LRU 741assoc=8 742block_size=64 743clk_domain=system.clk_domain 744eventq_index=0 745hit_latency=50 746sequential_access=false 747size=1024 748 749[system.membus] 750type=CoherentXBar 751children=badaddr_responder 752clk_domain=system.clk_domain 753eventq_index=0 754forward_latency=4 755frontend_latency=3 756response_latency=2 757snoop_filter=Null 758snoop_response_latency=4 759system=system 760use_default_range=false 761width=16 762default=system.membus.badaddr_responder.pio 763master=system.bridge.slave system.physmem.port 764slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 765 766[system.membus.badaddr_responder] 767type=IsaFake 768clk_domain=system.clk_domain 769eventq_index=0 770fake_mem=false 771pio_addr=0 772pio_latency=100000 773pio_size=8 774ret_bad_addr=true 775ret_data16=65535 776ret_data32=4294967295 777ret_data64=18446744073709551615 778ret_data8=255 779system=system 780update_data=false 781warn_access= 782pio=system.membus.default 783 784[system.physmem] 785type=DRAMCtrl 786IDD0=0.075000 787IDD02=0.000000 788IDD2N=0.050000 789IDD2N2=0.000000 790IDD2P0=0.000000 791IDD2P02=0.000000 792IDD2P1=0.000000 793IDD2P12=0.000000 794IDD3N=0.057000 795IDD3N2=0.000000 796IDD3P0=0.000000 797IDD3P02=0.000000 798IDD3P1=0.000000 799IDD3P12=0.000000 800IDD4R=0.187000 801IDD4R2=0.000000 802IDD4W=0.165000 803IDD4W2=0.000000 804IDD5=0.220000 805IDD52=0.000000 806IDD6=0.000000 807IDD62=0.000000 808VDD=1.500000 809VDD2=0.000000 810activation_limit=4 811addr_mapping=RoRaBaCoCh 812bank_groups_per_rank=0 813banks_per_rank=8 814burst_length=8 815channels=1 816clk_domain=system.clk_domain 817conf_table_reported=true 818device_bus_width=8 819device_rowbuffer_size=1024 820device_size=536870912 821devices_per_rank=8 822dll=true 823eventq_index=0 824in_addr_map=true 825max_accesses_per_row=16 826mem_sched_policy=frfcfs 827min_writes_per_switch=16 828null=false 829page_policy=open_adaptive 830range=0:134217727 831ranks_per_channel=2 832read_buffer_size=32 833static_backend_latency=10000 834static_frontend_latency=10000 835tBURST=5000 836tCCD_L=0 837tCK=1250 838tCL=13750 839tCS=2500 840tRAS=35000 841tRCD=13750 842tREFI=7800000 843tRFC=260000 844tRP=13750 845tRRD=6000 846tRRD_L=0 847tRTP=7500 848tRTW=2500 849tWR=15000 850tWTR=7500 851tXAW=30000 852tXP=0 853tXPDLL=0 854tXS=0 855tXSDLL=0 856write_buffer_size=64 857write_high_thresh_perc=85 858write_low_thresh_perc=50 859port=system.membus.master[1] 860 861[system.simple_disk] 862type=SimpleDisk 863children=disk 864disk=system.simple_disk.disk 865eventq_index=0 866system=system 867 868[system.simple_disk.disk] 869type=RawDiskImage 870eventq_index=0
|
855image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
| 871image_file=/work/gem5/dist/disks/linux-latest.img
|
856read_only=true 857 858[system.terminal] 859type=Terminal 860eventq_index=0 861intr_control=system.intrctrl 862number=0 863output=true 864port=3456 865 866[system.tsunami] 867type=Tsunami
| 872read_only=true 873 874[system.terminal] 875type=Terminal 876eventq_index=0 877intr_control=system.intrctrl 878number=0 879output=true 880port=3456 881 882[system.tsunami] 883type=Tsunami
|
868children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
| 884children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
|
869eventq_index=0 870intrctrl=system.intrctrl 871system=system 872 873[system.tsunami.backdoor] 874type=AlphaBackdoor 875clk_domain=system.clk_domain 876cpu=system.cpu 877disk=system.simple_disk 878eventq_index=0 879pio_addr=8804682956800 880pio_latency=100000 881platform=system.tsunami 882system=system 883terminal=system.terminal 884pio=system.iobus.master[24] 885 886[system.tsunami.cchip] 887type=TsunamiCChip 888clk_domain=system.clk_domain 889eventq_index=0 890pio_addr=8803072344064 891pio_latency=100000 892system=system 893tsunami=system.tsunami 894pio=system.iobus.master[0] 895 896[system.tsunami.ethernet] 897type=NSGigE 898BAR0=1 899BAR0LegacyIO=false 900BAR0Size=256 901BAR1=0 902BAR1LegacyIO=false 903BAR1Size=4096 904BAR2=0 905BAR2LegacyIO=false 906BAR2Size=0 907BAR3=0 908BAR3LegacyIO=false 909BAR3Size=0 910BAR4=0 911BAR4LegacyIO=false 912BAR4Size=0 913BAR5=0 914BAR5LegacyIO=false 915BAR5Size=0 916BIST=0 917CacheLineSize=0 918CapabilityPtr=0 919CardbusCIS=0 920ClassCode=2 921Command=0 922DeviceID=34 923ExpansionROM=0 924HeaderType=0 925InterruptLine=30 926InterruptPin=1 927LatencyTimer=0 928LegacyIOBase=0 929MSICAPBaseOffset=0 930MSICAPCapId=0 931MSICAPMaskBits=0 932MSICAPMsgAddr=0 933MSICAPMsgCtrl=0 934MSICAPMsgData=0 935MSICAPMsgUpperAddr=0 936MSICAPNextCapability=0 937MSICAPPendingBits=0 938MSIXCAPBaseOffset=0 939MSIXCAPCapId=0 940MSIXCAPNextCapability=0 941MSIXMsgCtrl=0 942MSIXPbaOffset=0 943MSIXTableOffset=0 944MaximumLatency=52 945MinimumGrant=176 946PMCAPBaseOffset=0 947PMCAPCapId=0 948PMCAPCapabilities=0 949PMCAPCtrlStatus=0 950PMCAPNextCapability=0 951PXCAPBaseOffset=0 952PXCAPCapId=0 953PXCAPCapabilities=0 954PXCAPDevCap2=0 955PXCAPDevCapabilities=0 956PXCAPDevCtrl=0 957PXCAPDevCtrl2=0 958PXCAPDevStatus=0 959PXCAPLinkCap=0 960PXCAPLinkCtrl=0 961PXCAPLinkStatus=0 962PXCAPNextCapability=0 963ProgIF=0 964Revision=0 965Status=656 966SubClassCode=0 967SubsystemID=0 968SubsystemVendorID=0 969VendorID=4107 970clk_domain=system.clk_domain 971config_latency=20000 972dma_data_free=false 973dma_desc_free=false 974dma_no_allocate=true 975dma_read_delay=0 976dma_read_factor=0 977dma_write_delay=0 978dma_write_factor=0 979eventq_index=0 980hardware_address=00:90:00:00:00:01
| 885eventq_index=0 886intrctrl=system.intrctrl 887system=system 888 889[system.tsunami.backdoor] 890type=AlphaBackdoor 891clk_domain=system.clk_domain 892cpu=system.cpu 893disk=system.simple_disk 894eventq_index=0 895pio_addr=8804682956800 896pio_latency=100000 897platform=system.tsunami 898system=system 899terminal=system.terminal 900pio=system.iobus.master[24] 901 902[system.tsunami.cchip] 903type=TsunamiCChip 904clk_domain=system.clk_domain 905eventq_index=0 906pio_addr=8803072344064 907pio_latency=100000 908system=system 909tsunami=system.tsunami 910pio=system.iobus.master[0] 911 912[system.tsunami.ethernet] 913type=NSGigE 914BAR0=1 915BAR0LegacyIO=false 916BAR0Size=256 917BAR1=0 918BAR1LegacyIO=false 919BAR1Size=4096 920BAR2=0 921BAR2LegacyIO=false 922BAR2Size=0 923BAR3=0 924BAR3LegacyIO=false 925BAR3Size=0 926BAR4=0 927BAR4LegacyIO=false 928BAR4Size=0 929BAR5=0 930BAR5LegacyIO=false 931BAR5Size=0 932BIST=0 933CacheLineSize=0 934CapabilityPtr=0 935CardbusCIS=0 936ClassCode=2 937Command=0 938DeviceID=34 939ExpansionROM=0 940HeaderType=0 941InterruptLine=30 942InterruptPin=1 943LatencyTimer=0 944LegacyIOBase=0 945MSICAPBaseOffset=0 946MSICAPCapId=0 947MSICAPMaskBits=0 948MSICAPMsgAddr=0 949MSICAPMsgCtrl=0 950MSICAPMsgData=0 951MSICAPMsgUpperAddr=0 952MSICAPNextCapability=0 953MSICAPPendingBits=0 954MSIXCAPBaseOffset=0 955MSIXCAPCapId=0 956MSIXCAPNextCapability=0 957MSIXMsgCtrl=0 958MSIXPbaOffset=0 959MSIXTableOffset=0 960MaximumLatency=52 961MinimumGrant=176 962PMCAPBaseOffset=0 963PMCAPCapId=0 964PMCAPCapabilities=0 965PMCAPCtrlStatus=0 966PMCAPNextCapability=0 967PXCAPBaseOffset=0 968PXCAPCapId=0 969PXCAPCapabilities=0 970PXCAPDevCap2=0 971PXCAPDevCapabilities=0 972PXCAPDevCtrl=0 973PXCAPDevCtrl2=0 974PXCAPDevStatus=0 975PXCAPLinkCap=0 976PXCAPLinkCtrl=0 977PXCAPLinkStatus=0 978PXCAPNextCapability=0 979ProgIF=0 980Revision=0 981Status=656 982SubClassCode=0 983SubsystemID=0 984SubsystemVendorID=0 985VendorID=4107 986clk_domain=system.clk_domain 987config_latency=20000 988dma_data_free=false 989dma_desc_free=false 990dma_no_allocate=true 991dma_read_delay=0 992dma_read_factor=0 993dma_write_delay=0 994dma_write_factor=0 995eventq_index=0 996hardware_address=00:90:00:00:00:01
|
| 997host=system.tsunami.pchip
|
981intr_delay=10000000 982pci_bus=0 983pci_dev=1 984pci_func=0 985pio_latency=30000
| 998intr_delay=10000000 999pci_bus=0 1000pci_dev=1 1001pci_func=0 1002pio_latency=30000
|
986platform=system.tsunami
| |
987rss=false 988rx_delay=1000000 989rx_fifo_size=524288 990rx_filter=true 991rx_thread=false 992system=system 993tx_delay=1000000 994tx_fifo_size=524288 995tx_thread=false
| 1003rss=false 1004rx_delay=1000000 1005rx_fifo_size=524288 1006rx_filter=true 1007rx_thread=false 1008system=system 1009tx_delay=1000000 1010tx_fifo_size=524288 1011tx_thread=false
|
996config=system.iobus.master[28]
| |
997dma=system.iobus.slave[2]
| 1012dma=system.iobus.slave[2]
|
998pio=system.iobus.master[27]
| 1013pio=system.iobus.master[26]
|
999 1000[system.tsunami.fake_OROM] 1001type=IsaFake 1002clk_domain=system.clk_domain 1003eventq_index=0 1004fake_mem=false 1005pio_addr=8796093677568 1006pio_latency=100000 1007pio_size=393216 1008ret_bad_addr=false 1009ret_data16=65535 1010ret_data32=4294967295 1011ret_data64=18446744073709551615 1012ret_data8=255 1013system=system 1014update_data=false 1015warn_access= 1016pio=system.iobus.master[8] 1017 1018[system.tsunami.fake_ata0] 1019type=IsaFake 1020clk_domain=system.clk_domain 1021eventq_index=0 1022fake_mem=false 1023pio_addr=8804615848432 1024pio_latency=100000 1025pio_size=8 1026ret_bad_addr=false 1027ret_data16=65535 1028ret_data32=4294967295 1029ret_data64=18446744073709551615 1030ret_data8=255 1031system=system 1032update_data=false 1033warn_access= 1034pio=system.iobus.master[19] 1035 1036[system.tsunami.fake_ata1] 1037type=IsaFake 1038clk_domain=system.clk_domain 1039eventq_index=0 1040fake_mem=false 1041pio_addr=8804615848304 1042pio_latency=100000 1043pio_size=8 1044ret_bad_addr=false 1045ret_data16=65535 1046ret_data32=4294967295 1047ret_data64=18446744073709551615 1048ret_data8=255 1049system=system 1050update_data=false 1051warn_access= 1052pio=system.iobus.master[20] 1053 1054[system.tsunami.fake_pnp_addr] 1055type=IsaFake 1056clk_domain=system.clk_domain 1057eventq_index=0 1058fake_mem=false 1059pio_addr=8804615848569 1060pio_latency=100000 1061pio_size=8 1062ret_bad_addr=false 1063ret_data16=65535 1064ret_data32=4294967295 1065ret_data64=18446744073709551615 1066ret_data8=255 1067system=system 1068update_data=false 1069warn_access= 1070pio=system.iobus.master[9] 1071 1072[system.tsunami.fake_pnp_read0] 1073type=IsaFake 1074clk_domain=system.clk_domain 1075eventq_index=0 1076fake_mem=false 1077pio_addr=8804615848451 1078pio_latency=100000 1079pio_size=8 1080ret_bad_addr=false 1081ret_data16=65535 1082ret_data32=4294967295 1083ret_data64=18446744073709551615 1084ret_data8=255 1085system=system 1086update_data=false 1087warn_access= 1088pio=system.iobus.master[11] 1089 1090[system.tsunami.fake_pnp_read1] 1091type=IsaFake 1092clk_domain=system.clk_domain 1093eventq_index=0 1094fake_mem=false 1095pio_addr=8804615848515 1096pio_latency=100000 1097pio_size=8 1098ret_bad_addr=false 1099ret_data16=65535 1100ret_data32=4294967295 1101ret_data64=18446744073709551615 1102ret_data8=255 1103system=system 1104update_data=false 1105warn_access= 1106pio=system.iobus.master[12] 1107 1108[system.tsunami.fake_pnp_read2] 1109type=IsaFake 1110clk_domain=system.clk_domain 1111eventq_index=0 1112fake_mem=false 1113pio_addr=8804615848579 1114pio_latency=100000 1115pio_size=8 1116ret_bad_addr=false 1117ret_data16=65535 1118ret_data32=4294967295 1119ret_data64=18446744073709551615 1120ret_data8=255 1121system=system 1122update_data=false 1123warn_access= 1124pio=system.iobus.master[13] 1125 1126[system.tsunami.fake_pnp_read3] 1127type=IsaFake 1128clk_domain=system.clk_domain 1129eventq_index=0 1130fake_mem=false 1131pio_addr=8804615848643 1132pio_latency=100000 1133pio_size=8 1134ret_bad_addr=false 1135ret_data16=65535 1136ret_data32=4294967295 1137ret_data64=18446744073709551615 1138ret_data8=255 1139system=system 1140update_data=false 1141warn_access= 1142pio=system.iobus.master[14] 1143 1144[system.tsunami.fake_pnp_read4] 1145type=IsaFake 1146clk_domain=system.clk_domain 1147eventq_index=0 1148fake_mem=false 1149pio_addr=8804615848707 1150pio_latency=100000 1151pio_size=8 1152ret_bad_addr=false 1153ret_data16=65535 1154ret_data32=4294967295 1155ret_data64=18446744073709551615 1156ret_data8=255 1157system=system 1158update_data=false 1159warn_access= 1160pio=system.iobus.master[15] 1161 1162[system.tsunami.fake_pnp_read5] 1163type=IsaFake 1164clk_domain=system.clk_domain 1165eventq_index=0 1166fake_mem=false 1167pio_addr=8804615848771 1168pio_latency=100000 1169pio_size=8 1170ret_bad_addr=false 1171ret_data16=65535 1172ret_data32=4294967295 1173ret_data64=18446744073709551615 1174ret_data8=255 1175system=system 1176update_data=false 1177warn_access= 1178pio=system.iobus.master[16] 1179 1180[system.tsunami.fake_pnp_read6] 1181type=IsaFake 1182clk_domain=system.clk_domain 1183eventq_index=0 1184fake_mem=false 1185pio_addr=8804615848835 1186pio_latency=100000 1187pio_size=8 1188ret_bad_addr=false 1189ret_data16=65535 1190ret_data32=4294967295 1191ret_data64=18446744073709551615 1192ret_data8=255 1193system=system 1194update_data=false 1195warn_access= 1196pio=system.iobus.master[17] 1197 1198[system.tsunami.fake_pnp_read7] 1199type=IsaFake 1200clk_domain=system.clk_domain 1201eventq_index=0 1202fake_mem=false 1203pio_addr=8804615848899 1204pio_latency=100000 1205pio_size=8 1206ret_bad_addr=false 1207ret_data16=65535 1208ret_data32=4294967295 1209ret_data64=18446744073709551615 1210ret_data8=255 1211system=system 1212update_data=false 1213warn_access= 1214pio=system.iobus.master[18] 1215 1216[system.tsunami.fake_pnp_write] 1217type=IsaFake 1218clk_domain=system.clk_domain 1219eventq_index=0 1220fake_mem=false 1221pio_addr=8804615850617 1222pio_latency=100000 1223pio_size=8 1224ret_bad_addr=false 1225ret_data16=65535 1226ret_data32=4294967295 1227ret_data64=18446744073709551615 1228ret_data8=255 1229system=system 1230update_data=false 1231warn_access= 1232pio=system.iobus.master[10] 1233 1234[system.tsunami.fake_ppc] 1235type=IsaFake 1236clk_domain=system.clk_domain 1237eventq_index=0 1238fake_mem=false 1239pio_addr=8804615848891 1240pio_latency=100000 1241pio_size=8 1242ret_bad_addr=false 1243ret_data16=65535 1244ret_data32=4294967295 1245ret_data64=18446744073709551615 1246ret_data8=255 1247system=system 1248update_data=false 1249warn_access= 1250pio=system.iobus.master[7] 1251 1252[system.tsunami.fake_sm_chip] 1253type=IsaFake 1254clk_domain=system.clk_domain 1255eventq_index=0 1256fake_mem=false 1257pio_addr=8804615848816 1258pio_latency=100000 1259pio_size=8 1260ret_bad_addr=false 1261ret_data16=65535 1262ret_data32=4294967295 1263ret_data64=18446744073709551615 1264ret_data8=255 1265system=system 1266update_data=false 1267warn_access= 1268pio=system.iobus.master[2] 1269 1270[system.tsunami.fake_uart1] 1271type=IsaFake 1272clk_domain=system.clk_domain 1273eventq_index=0 1274fake_mem=false 1275pio_addr=8804615848696 1276pio_latency=100000 1277pio_size=8 1278ret_bad_addr=false 1279ret_data16=65535 1280ret_data32=4294967295 1281ret_data64=18446744073709551615 1282ret_data8=255 1283system=system 1284update_data=false 1285warn_access= 1286pio=system.iobus.master[3] 1287 1288[system.tsunami.fake_uart2] 1289type=IsaFake 1290clk_domain=system.clk_domain 1291eventq_index=0 1292fake_mem=false 1293pio_addr=8804615848936 1294pio_latency=100000 1295pio_size=8 1296ret_bad_addr=false 1297ret_data16=65535 1298ret_data32=4294967295 1299ret_data64=18446744073709551615 1300ret_data8=255 1301system=system 1302update_data=false 1303warn_access= 1304pio=system.iobus.master[4] 1305 1306[system.tsunami.fake_uart3] 1307type=IsaFake 1308clk_domain=system.clk_domain 1309eventq_index=0 1310fake_mem=false 1311pio_addr=8804615848680 1312pio_latency=100000 1313pio_size=8 1314ret_bad_addr=false 1315ret_data16=65535 1316ret_data32=4294967295 1317ret_data64=18446744073709551615 1318ret_data8=255 1319system=system 1320update_data=false 1321warn_access= 1322pio=system.iobus.master[5] 1323 1324[system.tsunami.fake_uart4] 1325type=IsaFake 1326clk_domain=system.clk_domain 1327eventq_index=0 1328fake_mem=false 1329pio_addr=8804615848944 1330pio_latency=100000 1331pio_size=8 1332ret_bad_addr=false 1333ret_data16=65535 1334ret_data32=4294967295 1335ret_data64=18446744073709551615 1336ret_data8=255 1337system=system 1338update_data=false 1339warn_access= 1340pio=system.iobus.master[6] 1341 1342[system.tsunami.fb] 1343type=BadDevice 1344clk_domain=system.clk_domain 1345devicename=FrameBuffer 1346eventq_index=0 1347pio_addr=8804615848912 1348pio_latency=100000 1349system=system 1350pio=system.iobus.master[21] 1351 1352[system.tsunami.ide] 1353type=IdeController 1354BAR0=1 1355BAR0LegacyIO=false 1356BAR0Size=8 1357BAR1=1 1358BAR1LegacyIO=false 1359BAR1Size=4 1360BAR2=1 1361BAR2LegacyIO=false 1362BAR2Size=8 1363BAR3=1 1364BAR3LegacyIO=false 1365BAR3Size=4 1366BAR4=1 1367BAR4LegacyIO=false 1368BAR4Size=16 1369BAR5=1 1370BAR5LegacyIO=false 1371BAR5Size=0 1372BIST=0 1373CacheLineSize=0 1374CapabilityPtr=0 1375CardbusCIS=0 1376ClassCode=1 1377Command=0 1378DeviceID=28945 1379ExpansionROM=0 1380HeaderType=0 1381InterruptLine=31 1382InterruptPin=1 1383LatencyTimer=0 1384LegacyIOBase=0 1385MSICAPBaseOffset=0 1386MSICAPCapId=0 1387MSICAPMaskBits=0 1388MSICAPMsgAddr=0 1389MSICAPMsgCtrl=0 1390MSICAPMsgData=0 1391MSICAPMsgUpperAddr=0 1392MSICAPNextCapability=0 1393MSICAPPendingBits=0 1394MSIXCAPBaseOffset=0 1395MSIXCAPCapId=0 1396MSIXCAPNextCapability=0 1397MSIXMsgCtrl=0 1398MSIXPbaOffset=0 1399MSIXTableOffset=0 1400MaximumLatency=0 1401MinimumGrant=0 1402PMCAPBaseOffset=0 1403PMCAPCapId=0 1404PMCAPCapabilities=0 1405PMCAPCtrlStatus=0 1406PMCAPNextCapability=0 1407PXCAPBaseOffset=0 1408PXCAPCapId=0 1409PXCAPCapabilities=0 1410PXCAPDevCap2=0 1411PXCAPDevCapabilities=0 1412PXCAPDevCtrl=0 1413PXCAPDevCtrl2=0 1414PXCAPDevStatus=0 1415PXCAPLinkCap=0 1416PXCAPLinkCtrl=0 1417PXCAPLinkStatus=0 1418PXCAPNextCapability=0 1419ProgIF=133 1420Revision=0 1421Status=640 1422SubClassCode=1 1423SubsystemID=0 1424SubsystemVendorID=0 1425VendorID=32902 1426clk_domain=system.clk_domain 1427config_latency=20000 1428ctrl_offset=0 1429disks=system.disk0 system.disk2 1430eventq_index=0
| 1014 1015[system.tsunami.fake_OROM] 1016type=IsaFake 1017clk_domain=system.clk_domain 1018eventq_index=0 1019fake_mem=false 1020pio_addr=8796093677568 1021pio_latency=100000 1022pio_size=393216 1023ret_bad_addr=false 1024ret_data16=65535 1025ret_data32=4294967295 1026ret_data64=18446744073709551615 1027ret_data8=255 1028system=system 1029update_data=false 1030warn_access= 1031pio=system.iobus.master[8] 1032 1033[system.tsunami.fake_ata0] 1034type=IsaFake 1035clk_domain=system.clk_domain 1036eventq_index=0 1037fake_mem=false 1038pio_addr=8804615848432 1039pio_latency=100000 1040pio_size=8 1041ret_bad_addr=false 1042ret_data16=65535 1043ret_data32=4294967295 1044ret_data64=18446744073709551615 1045ret_data8=255 1046system=system 1047update_data=false 1048warn_access= 1049pio=system.iobus.master[19] 1050 1051[system.tsunami.fake_ata1] 1052type=IsaFake 1053clk_domain=system.clk_domain 1054eventq_index=0 1055fake_mem=false 1056pio_addr=8804615848304 1057pio_latency=100000 1058pio_size=8 1059ret_bad_addr=false 1060ret_data16=65535 1061ret_data32=4294967295 1062ret_data64=18446744073709551615 1063ret_data8=255 1064system=system 1065update_data=false 1066warn_access= 1067pio=system.iobus.master[20] 1068 1069[system.tsunami.fake_pnp_addr] 1070type=IsaFake 1071clk_domain=system.clk_domain 1072eventq_index=0 1073fake_mem=false 1074pio_addr=8804615848569 1075pio_latency=100000 1076pio_size=8 1077ret_bad_addr=false 1078ret_data16=65535 1079ret_data32=4294967295 1080ret_data64=18446744073709551615 1081ret_data8=255 1082system=system 1083update_data=false 1084warn_access= 1085pio=system.iobus.master[9] 1086 1087[system.tsunami.fake_pnp_read0] 1088type=IsaFake 1089clk_domain=system.clk_domain 1090eventq_index=0 1091fake_mem=false 1092pio_addr=8804615848451 1093pio_latency=100000 1094pio_size=8 1095ret_bad_addr=false 1096ret_data16=65535 1097ret_data32=4294967295 1098ret_data64=18446744073709551615 1099ret_data8=255 1100system=system 1101update_data=false 1102warn_access= 1103pio=system.iobus.master[11] 1104 1105[system.tsunami.fake_pnp_read1] 1106type=IsaFake 1107clk_domain=system.clk_domain 1108eventq_index=0 1109fake_mem=false 1110pio_addr=8804615848515 1111pio_latency=100000 1112pio_size=8 1113ret_bad_addr=false 1114ret_data16=65535 1115ret_data32=4294967295 1116ret_data64=18446744073709551615 1117ret_data8=255 1118system=system 1119update_data=false 1120warn_access= 1121pio=system.iobus.master[12] 1122 1123[system.tsunami.fake_pnp_read2] 1124type=IsaFake 1125clk_domain=system.clk_domain 1126eventq_index=0 1127fake_mem=false 1128pio_addr=8804615848579 1129pio_latency=100000 1130pio_size=8 1131ret_bad_addr=false 1132ret_data16=65535 1133ret_data32=4294967295 1134ret_data64=18446744073709551615 1135ret_data8=255 1136system=system 1137update_data=false 1138warn_access= 1139pio=system.iobus.master[13] 1140 1141[system.tsunami.fake_pnp_read3] 1142type=IsaFake 1143clk_domain=system.clk_domain 1144eventq_index=0 1145fake_mem=false 1146pio_addr=8804615848643 1147pio_latency=100000 1148pio_size=8 1149ret_bad_addr=false 1150ret_data16=65535 1151ret_data32=4294967295 1152ret_data64=18446744073709551615 1153ret_data8=255 1154system=system 1155update_data=false 1156warn_access= 1157pio=system.iobus.master[14] 1158 1159[system.tsunami.fake_pnp_read4] 1160type=IsaFake 1161clk_domain=system.clk_domain 1162eventq_index=0 1163fake_mem=false 1164pio_addr=8804615848707 1165pio_latency=100000 1166pio_size=8 1167ret_bad_addr=false 1168ret_data16=65535 1169ret_data32=4294967295 1170ret_data64=18446744073709551615 1171ret_data8=255 1172system=system 1173update_data=false 1174warn_access= 1175pio=system.iobus.master[15] 1176 1177[system.tsunami.fake_pnp_read5] 1178type=IsaFake 1179clk_domain=system.clk_domain 1180eventq_index=0 1181fake_mem=false 1182pio_addr=8804615848771 1183pio_latency=100000 1184pio_size=8 1185ret_bad_addr=false 1186ret_data16=65535 1187ret_data32=4294967295 1188ret_data64=18446744073709551615 1189ret_data8=255 1190system=system 1191update_data=false 1192warn_access= 1193pio=system.iobus.master[16] 1194 1195[system.tsunami.fake_pnp_read6] 1196type=IsaFake 1197clk_domain=system.clk_domain 1198eventq_index=0 1199fake_mem=false 1200pio_addr=8804615848835 1201pio_latency=100000 1202pio_size=8 1203ret_bad_addr=false 1204ret_data16=65535 1205ret_data32=4294967295 1206ret_data64=18446744073709551615 1207ret_data8=255 1208system=system 1209update_data=false 1210warn_access= 1211pio=system.iobus.master[17] 1212 1213[system.tsunami.fake_pnp_read7] 1214type=IsaFake 1215clk_domain=system.clk_domain 1216eventq_index=0 1217fake_mem=false 1218pio_addr=8804615848899 1219pio_latency=100000 1220pio_size=8 1221ret_bad_addr=false 1222ret_data16=65535 1223ret_data32=4294967295 1224ret_data64=18446744073709551615 1225ret_data8=255 1226system=system 1227update_data=false 1228warn_access= 1229pio=system.iobus.master[18] 1230 1231[system.tsunami.fake_pnp_write] 1232type=IsaFake 1233clk_domain=system.clk_domain 1234eventq_index=0 1235fake_mem=false 1236pio_addr=8804615850617 1237pio_latency=100000 1238pio_size=8 1239ret_bad_addr=false 1240ret_data16=65535 1241ret_data32=4294967295 1242ret_data64=18446744073709551615 1243ret_data8=255 1244system=system 1245update_data=false 1246warn_access= 1247pio=system.iobus.master[10] 1248 1249[system.tsunami.fake_ppc] 1250type=IsaFake 1251clk_domain=system.clk_domain 1252eventq_index=0 1253fake_mem=false 1254pio_addr=8804615848891 1255pio_latency=100000 1256pio_size=8 1257ret_bad_addr=false 1258ret_data16=65535 1259ret_data32=4294967295 1260ret_data64=18446744073709551615 1261ret_data8=255 1262system=system 1263update_data=false 1264warn_access= 1265pio=system.iobus.master[7] 1266 1267[system.tsunami.fake_sm_chip] 1268type=IsaFake 1269clk_domain=system.clk_domain 1270eventq_index=0 1271fake_mem=false 1272pio_addr=8804615848816 1273pio_latency=100000 1274pio_size=8 1275ret_bad_addr=false 1276ret_data16=65535 1277ret_data32=4294967295 1278ret_data64=18446744073709551615 1279ret_data8=255 1280system=system 1281update_data=false 1282warn_access= 1283pio=system.iobus.master[2] 1284 1285[system.tsunami.fake_uart1] 1286type=IsaFake 1287clk_domain=system.clk_domain 1288eventq_index=0 1289fake_mem=false 1290pio_addr=8804615848696 1291pio_latency=100000 1292pio_size=8 1293ret_bad_addr=false 1294ret_data16=65535 1295ret_data32=4294967295 1296ret_data64=18446744073709551615 1297ret_data8=255 1298system=system 1299update_data=false 1300warn_access= 1301pio=system.iobus.master[3] 1302 1303[system.tsunami.fake_uart2] 1304type=IsaFake 1305clk_domain=system.clk_domain 1306eventq_index=0 1307fake_mem=false 1308pio_addr=8804615848936 1309pio_latency=100000 1310pio_size=8 1311ret_bad_addr=false 1312ret_data16=65535 1313ret_data32=4294967295 1314ret_data64=18446744073709551615 1315ret_data8=255 1316system=system 1317update_data=false 1318warn_access= 1319pio=system.iobus.master[4] 1320 1321[system.tsunami.fake_uart3] 1322type=IsaFake 1323clk_domain=system.clk_domain 1324eventq_index=0 1325fake_mem=false 1326pio_addr=8804615848680 1327pio_latency=100000 1328pio_size=8 1329ret_bad_addr=false 1330ret_data16=65535 1331ret_data32=4294967295 1332ret_data64=18446744073709551615 1333ret_data8=255 1334system=system 1335update_data=false 1336warn_access= 1337pio=system.iobus.master[5] 1338 1339[system.tsunami.fake_uart4] 1340type=IsaFake 1341clk_domain=system.clk_domain 1342eventq_index=0 1343fake_mem=false 1344pio_addr=8804615848944 1345pio_latency=100000 1346pio_size=8 1347ret_bad_addr=false 1348ret_data16=65535 1349ret_data32=4294967295 1350ret_data64=18446744073709551615 1351ret_data8=255 1352system=system 1353update_data=false 1354warn_access= 1355pio=system.iobus.master[6] 1356 1357[system.tsunami.fb] 1358type=BadDevice 1359clk_domain=system.clk_domain 1360devicename=FrameBuffer 1361eventq_index=0 1362pio_addr=8804615848912 1363pio_latency=100000 1364system=system 1365pio=system.iobus.master[21] 1366 1367[system.tsunami.ide] 1368type=IdeController 1369BAR0=1 1370BAR0LegacyIO=false 1371BAR0Size=8 1372BAR1=1 1373BAR1LegacyIO=false 1374BAR1Size=4 1375BAR2=1 1376BAR2LegacyIO=false 1377BAR2Size=8 1378BAR3=1 1379BAR3LegacyIO=false 1380BAR3Size=4 1381BAR4=1 1382BAR4LegacyIO=false 1383BAR4Size=16 1384BAR5=1 1385BAR5LegacyIO=false 1386BAR5Size=0 1387BIST=0 1388CacheLineSize=0 1389CapabilityPtr=0 1390CardbusCIS=0 1391ClassCode=1 1392Command=0 1393DeviceID=28945 1394ExpansionROM=0 1395HeaderType=0 1396InterruptLine=31 1397InterruptPin=1 1398LatencyTimer=0 1399LegacyIOBase=0 1400MSICAPBaseOffset=0 1401MSICAPCapId=0 1402MSICAPMaskBits=0 1403MSICAPMsgAddr=0 1404MSICAPMsgCtrl=0 1405MSICAPMsgData=0 1406MSICAPMsgUpperAddr=0 1407MSICAPNextCapability=0 1408MSICAPPendingBits=0 1409MSIXCAPBaseOffset=0 1410MSIXCAPCapId=0 1411MSIXCAPNextCapability=0 1412MSIXMsgCtrl=0 1413MSIXPbaOffset=0 1414MSIXTableOffset=0 1415MaximumLatency=0 1416MinimumGrant=0 1417PMCAPBaseOffset=0 1418PMCAPCapId=0 1419PMCAPCapabilities=0 1420PMCAPCtrlStatus=0 1421PMCAPNextCapability=0 1422PXCAPBaseOffset=0 1423PXCAPCapId=0 1424PXCAPCapabilities=0 1425PXCAPDevCap2=0 1426PXCAPDevCapabilities=0 1427PXCAPDevCtrl=0 1428PXCAPDevCtrl2=0 1429PXCAPDevStatus=0 1430PXCAPLinkCap=0 1431PXCAPLinkCtrl=0 1432PXCAPLinkStatus=0 1433PXCAPNextCapability=0 1434ProgIF=133 1435Revision=0 1436Status=640 1437SubClassCode=1 1438SubsystemID=0 1439SubsystemVendorID=0 1440VendorID=32902 1441clk_domain=system.clk_domain 1442config_latency=20000 1443ctrl_offset=0 1444disks=system.disk0 system.disk2 1445eventq_index=0
|
| 1446host=system.tsunami.pchip
|
1431io_shift=0 1432pci_bus=0 1433pci_dev=0 1434pci_func=0 1435pio_latency=30000
| 1447io_shift=0 1448pci_bus=0 1449pci_dev=0 1450pci_func=0 1451pio_latency=30000
|
1436platform=system.tsunami
| |
1437system=system
| 1452system=system
|
1438config=system.iobus.master[26]
| |
1439dma=system.iobus.slave[1] 1440pio=system.iobus.master[25] 1441 1442[system.tsunami.io] 1443type=TsunamiIO 1444clk_domain=system.clk_domain 1445eventq_index=0 1446frequency=976562500 1447pio_addr=8804615847936 1448pio_latency=100000 1449system=system 1450time=Thu Jan 1 00:00:00 2009 1451tsunami=system.tsunami 1452year_is_bcd=false 1453pio=system.iobus.master[22] 1454 1455[system.tsunami.pchip] 1456type=TsunamiPChip 1457clk_domain=system.clk_domain
| 1453dma=system.iobus.slave[1] 1454pio=system.iobus.master[25] 1455 1456[system.tsunami.io] 1457type=TsunamiIO 1458clk_domain=system.clk_domain 1459eventq_index=0 1460frequency=976562500 1461pio_addr=8804615847936 1462pio_latency=100000 1463system=system 1464time=Thu Jan 1 00:00:00 2009 1465tsunami=system.tsunami 1466year_is_bcd=false 1467pio=system.iobus.master[22] 1468 1469[system.tsunami.pchip] 1470type=TsunamiPChip 1471clk_domain=system.clk_domain
|
| 1472conf_base=8804649402368 1473conf_device_bits=8 1474conf_size=16777216
|
1458eventq_index=0
| 1475eventq_index=0
|
| 1476pci_dma_base=0 1477pci_mem_base=8796093022208 1478pci_pio_base=8804615847936
|
1459pio_addr=8802535473152 1460pio_latency=100000
| 1479pio_addr=8802535473152 1480pio_latency=100000
|
| 1481platform=system.tsunami
|
1461system=system 1462tsunami=system.tsunami 1463pio=system.iobus.master[1] 1464
| 1482system=system 1483tsunami=system.tsunami 1484pio=system.iobus.master[1] 1485
|
1465[system.tsunami.pciconfig] 1466type=PciConfigAll 1467bus=0 1468clk_domain=system.clk_domain 1469eventq_index=0 1470pio_addr=0 1471pio_latency=30000 1472platform=system.tsunami 1473size=16777216 1474system=system 1475pio=system.iobus.default 1476
| |
1477[system.tsunami.uart] 1478type=Uart8250 1479clk_domain=system.clk_domain 1480eventq_index=0 1481pio_addr=8804615848952 1482pio_latency=100000 1483platform=system.tsunami 1484system=system 1485terminal=system.terminal 1486pio=system.iobus.master[23] 1487 1488[system.voltage_domain] 1489type=VoltageDomain 1490eventq_index=0 1491voltage=1.000000 1492
| 1486[system.tsunami.uart] 1487type=Uart8250 1488clk_domain=system.clk_domain 1489eventq_index=0 1490pio_addr=8804615848952 1491pio_latency=100000 1492platform=system.tsunami 1493system=system 1494terminal=system.terminal 1495pio=system.iobus.master[23] 1496 1497[system.voltage_domain] 1498type=VoltageDomain 1499eventq_index=0 1500voltage=1.000000 1501
|