| simple-timing.py (8706:b1838faf3bcc) | simple-timing.py (8801:1a84c6a81299) |
|---|---|
| 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 37 unchanged lines hidden (view full) --- 46system = System(cpu = cpu, 47 physmem = PhysicalMemory(), 48 membus = Bus()) 49system.system_port = system.membus.port 50system.physmem.port = system.membus.port 51cpu.connectAllPorts(system.membus) 52cpu.clock = '2GHz' 53 | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 37 unchanged lines hidden (view full) --- 46system = System(cpu = cpu, 47 physmem = PhysicalMemory(), 48 membus = Bus()) 49system.system_port = system.membus.port 50system.physmem.port = system.membus.port 51cpu.connectAllPorts(system.membus) 52cpu.clock = '2GHz' 53 |
| 54root = Root(system = system) | 54root = Root(full_system=False, system = system) |