pc-simple-timing-ruby.py (9577:91cac7c9c636) pc-simple-timing-ruby.py (9665:6dbdeee787cc)
1# Copyright (c) 2012 Mark D. Hill and David A. Wood
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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50options.l2_size="4MB"
51options.l1d_assoc=2
52options.l1i_assoc=2
53options.l2_assoc=2
54options.num_cpus = 2
55
56#the system
57mdesc = SysConfig(disk = 'linux-x86.img')
1# Copyright (c) 2012 Mark D. Hill and David A. Wood
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 41 unchanged lines hidden (view full) ---

50options.l2_size="4MB"
51options.l1d_assoc=2
52options.l1i_assoc=2
53options.l2_assoc=2
54options.num_cpus = 2
55
56#the system
57mdesc = SysConfig(disk = 'linux-x86.img')
58system = FSConfig.makeLinuxX86System('timing', options.num_cpus,
58system = FSConfig.makeLinuxX86System('timing', SimpleDDR3, options.num_cpus,
59 mdesc=mdesc, Ruby=True)
60system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9.smp')
61system.cpu = [TimingSimpleCPU(cpu_id=i) for i in xrange(options.num_cpus)]
62Ruby.create_system(options, system, system.piobus, system._dma_ports)
63
64for (i, cpu) in enumerate(system.cpu):
65 # create the interrupt controller
66 cpu.createInterruptController()

--- 15 unchanged lines hidden --- 		59 mdesc=mdesc, Ruby=True)
60system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9.smp')
61system.cpu = [TimingSimpleCPU(cpu_id=i) for i in xrange(options.num_cpus)]
62Ruby.create_system(options, system, system.piobus, system._dma_ports)
63
64for (i, cpu) in enumerate(system.cpu):
65 # create the interrupt controller
66 cpu.createInterruptController()

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