pc-simple-timing-ruby.py (11682:612f75cf36a0) pc-simple-timing-ruby.py (13718:89e8bcc7253b)
1# Copyright (c) 2012 Mark D. Hill and David A. Wood
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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58system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
59
60system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9.smp')
61system.clk_domain = SrcClockDomain(clock = '1GHz',
62 voltage_domain = system.voltage_domain)
63system.cpu_clk_domain = SrcClockDomain(clock = '2GHz',
64 voltage_domain = system.voltage_domain)
65system.cpu = [TimingSimpleCPU(cpu_id=i, clk_domain = system.cpu_clk_domain)
1# Copyright (c) 2012 Mark D. Hill and David A. Wood
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 49 unchanged lines hidden (view full) ---

58system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
59
60system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9.smp')
61system.clk_domain = SrcClockDomain(clock = '1GHz',
62 voltage_domain = system.voltage_domain)
63system.cpu_clk_domain = SrcClockDomain(clock = '2GHz',
64 voltage_domain = system.voltage_domain)
65system.cpu = [TimingSimpleCPU(cpu_id=i, clk_domain = system.cpu_clk_domain)
66 for i in xrange(options.num_cpus)]
66 for i in range(options.num_cpus)]
67
68Ruby.create_system(options, True, system, system.iobus, system._dma_ports)
69
70# Create a seperate clock domain for Ruby
71system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
72 voltage_domain = system.voltage_domain)
73
74# Connect the ruby io port to the PIO bus,

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68Ruby.create_system(options, True, system, system.iobus, system._dma_ports)
69
70# Create a seperate clock domain for Ruby
71system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
72 voltage_domain = system.voltage_domain)
73
74# Connect the ruby io port to the PIO bus,

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