memtest-filter.py (11682:612f75cf36a0) memtest-filter.py (13718:89e8bcc7253b)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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28
29import m5
30from m5.objects import *
31m5.util.addToPath('../configs/')
32from common.Caches import *
33
34#MAX CORES IS 8 with the fals sharing method
35nb_cores = 8
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 19 unchanged lines hidden (view full) ---

28
29import m5
30from m5.objects import *
31m5.util.addToPath('../configs/')
32from common.Caches import *
33
34#MAX CORES IS 8 with the fals sharing method
35nb_cores = 8
36cpus = [ MemTest() for i in xrange(nb_cores) ]
36cpus = [ MemTest() for i in range(nb_cores) ]
37
38# system simulated
39system = System(cpu = cpus,
40 physmem = SimpleMemory(),
41 membus = SystemXBar(width=16, snoop_filter = SnoopFilter()))
42# Dummy voltage domain for all our clock domains
43system.voltage_domain = VoltageDomain()
44system.clk_domain = SrcClockDomain(clock = '1GHz',

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38# system simulated
39system = System(cpu = cpus,
40 physmem = SimpleMemory(),
41 membus = SystemXBar(width=16, snoop_filter = SnoopFilter()))
42# Dummy voltage domain for all our clock domains
43system.voltage_domain = VoltageDomain()
44system.clk_domain = SrcClockDomain(clock = '1GHz',

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