1/*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2006 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Steve Reinhardt
42 * Lisa Hsu
43 * Nathan Binkert
44 * Ali Saidi
45 * Rick Strong
46 */
47
48#include "arch/isa_traits.hh"
49#include "arch/remote_gdb.hh"
50#include "arch/utility.hh"
51#include "base/loader/object_file.hh"
52#include "base/loader/symtab.hh"
53#include "base/str.hh"
54#include "base/trace.hh"
55#include "config/the_isa.hh"
56#include "cpu/thread_context.hh"
57#include "debug/Loader.hh"
58#include "debug/WorkItems.hh"
59#include "kern/kernel_stats.hh"
60#include "mem/abstract_mem.hh"
61#include "mem/physical.hh"
62#include "params/System.hh"
63#include "sim/byteswap.hh"
64#include "sim/debug.hh"
65#include "sim/full_system.hh"
66#include "sim/system.hh"
67
68using namespace std;
69using namespace TheISA;
70
71vector<System *> System::systemList;
72
73int System::numSystemsRunning = 0;
74
75System::System(Params *p)
76 : MemObject(p), _systemPort("system_port", this),
77 _numContexts(0),
78 pagePtr(0),
79 init_param(p->init_param),
80 physProxy(_systemPort, p->cache_line_size),
81 loadAddrMask(p->load_addr_mask),
| 1/*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2006 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Steve Reinhardt
42 * Lisa Hsu
43 * Nathan Binkert
44 * Ali Saidi
45 * Rick Strong
46 */
47
48#include "arch/isa_traits.hh"
49#include "arch/remote_gdb.hh"
50#include "arch/utility.hh"
51#include "base/loader/object_file.hh"
52#include "base/loader/symtab.hh"
53#include "base/str.hh"
54#include "base/trace.hh"
55#include "config/the_isa.hh"
56#include "cpu/thread_context.hh"
57#include "debug/Loader.hh"
58#include "debug/WorkItems.hh"
59#include "kern/kernel_stats.hh"
60#include "mem/abstract_mem.hh"
61#include "mem/physical.hh"
62#include "params/System.hh"
63#include "sim/byteswap.hh"
64#include "sim/debug.hh"
65#include "sim/full_system.hh"
66#include "sim/system.hh"
67
68using namespace std;
69using namespace TheISA;
70
71vector<System *> System::systemList;
72
73int System::numSystemsRunning = 0;
74
75System::System(Params *p)
76 : MemObject(p), _systemPort("system_port", this),
77 _numContexts(0),
78 pagePtr(0),
79 init_param(p->init_param),
80 physProxy(_systemPort, p->cache_line_size),
81 loadAddrMask(p->load_addr_mask),
|
| 82 loadAddrOffset(p->load_offset),
|
82 nextPID(0),
83 physmem(name() + ".physmem", p->memories),
84 memoryMode(p->mem_mode),
85 _cacheLineSize(p->cache_line_size),
86 workItemsBegin(0),
87 workItemsEnd(0),
88 numWorkIds(p->num_work_ids),
89 _params(p),
90 totalNumInsts(0),
91 instEventQueue("system instruction-based event queue")
92{
93 // add self to global system list
94 systemList.push_back(this);
95
96 if (FullSystem) {
97 kernelSymtab = new SymbolTable;
98 if (!debugSymbolTable)
99 debugSymbolTable = new SymbolTable;
100 }
101
102 // check if the cache line size is a value known to work
103 if (!(_cacheLineSize == 16 || _cacheLineSize == 32 ||
104 _cacheLineSize == 64 || _cacheLineSize == 128))
105 warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n");
106
107 // Get the generic system master IDs
108 MasterID tmp_id M5_VAR_USED;
109 tmp_id = getMasterId("writebacks");
110 assert(tmp_id == Request::wbMasterId);
111 tmp_id = getMasterId("functional");
112 assert(tmp_id == Request::funcMasterId);
113 tmp_id = getMasterId("interrupt");
114 assert(tmp_id == Request::intMasterId);
115
116 if (FullSystem) {
117 if (params()->kernel == "") {
118 inform("No kernel set for full system simulation. "
119 "Assuming you know what you're doing\n");
120
121 kernel = NULL;
122 } else {
123 // Get the kernel code
124 kernel = createObjectFile(params()->kernel);
125 inform("kernel located at: %s", params()->kernel);
126
127 if (kernel == NULL)
128 fatal("Could not load kernel file %s", params()->kernel);
129
130 // setup entry points
131 kernelStart = kernel->textBase();
132 kernelEnd = kernel->bssBase() + kernel->bssSize();
133 kernelEntry = kernel->entryPoint();
134
135 // load symbols
136 if (!kernel->loadGlobalSymbols(kernelSymtab))
137 fatal("could not load kernel symbols\n");
138
139 if (!kernel->loadLocalSymbols(kernelSymtab))
140 fatal("could not load kernel local symbols\n");
141
142 if (!kernel->loadGlobalSymbols(debugSymbolTable))
143 fatal("could not load kernel symbols\n");
144
145 if (!kernel->loadLocalSymbols(debugSymbolTable))
146 fatal("could not load kernel local symbols\n");
147
148 // Loading only needs to happen once and after memory system is
149 // connected so it will happen in initState()
150 }
151 }
152
153 // increment the number of running systms
154 numSystemsRunning++;
155
156 // Set back pointers to the system in all memories
157 for (int x = 0; x < params()->memories.size(); x++)
158 params()->memories[x]->system(this);
159}
160
161System::~System()
162{
163 delete kernelSymtab;
164 delete kernel;
165
166 for (uint32_t j = 0; j < numWorkIds; j++)
167 delete workItemStats[j];
168}
169
170void
171System::init()
172{
173 // check that the system port is connected
174 if (!_systemPort.isConnected())
175 panic("System port on %s is not connected.\n", name());
176}
177
178BaseMasterPort&
179System::getMasterPort(const std::string &if_name, PortID idx)
180{
181 // no need to distinguish at the moment (besides checking)
182 return _systemPort;
183}
184
185void
186System::setMemoryMode(Enums::MemoryMode mode)
187{
188 assert(getDrainState() == Drainable::Drained);
189 memoryMode = mode;
190}
191
192bool System::breakpoint()
193{
194 if (remoteGDB.size())
195 return remoteGDB[0]->breakpoint();
196 return false;
197}
198
199/**
200 * Setting rgdb_wait to a positive integer waits for a remote debugger to
201 * connect to that context ID before continuing. This should really
202 be a parameter on the CPU object or something...
203 */
204int rgdb_wait = -1;
205
206int
207System::registerThreadContext(ThreadContext *tc, int assigned)
208{
209 int id;
210 if (assigned == -1) {
211 for (id = 0; id < threadContexts.size(); id++) {
212 if (!threadContexts[id])
213 break;
214 }
215
216 if (threadContexts.size() <= id)
217 threadContexts.resize(id + 1);
218 } else {
219 if (threadContexts.size() <= assigned)
220 threadContexts.resize(assigned + 1);
221 id = assigned;
222 }
223
224 if (threadContexts[id])
225 fatal("Cannot have two CPUs with the same id (%d)\n", id);
226
227 threadContexts[id] = tc;
228 _numContexts++;
229
230#if THE_ISA != NULL_ISA
231 int port = getRemoteGDBPort();
232 if (port) {
233 RemoteGDB *rgdb = new RemoteGDB(this, tc);
234 GDBListener *gdbl = new GDBListener(rgdb, port + id);
235 gdbl->listen();
236
237 if (rgdb_wait != -1 && rgdb_wait == id)
238 gdbl->accept();
239
240 if (remoteGDB.size() <= id) {
241 remoteGDB.resize(id + 1);
242 }
243
244 remoteGDB[id] = rgdb;
245 }
246#endif
247
248 activeCpus.push_back(false);
249
250 return id;
251}
252
253int
254System::numRunningContexts()
255{
256 int running = 0;
257 for (int i = 0; i < _numContexts; ++i) {
258 if (threadContexts[i]->status() != ThreadContext::Halted)
259 ++running;
260 }
261 return running;
262}
263
264void
265System::initState()
266{
267 if (FullSystem) {
268 for (int i = 0; i < threadContexts.size(); i++)
269 TheISA::startupCPU(threadContexts[i], i);
270 // Moved from the constructor to here since it relies on the
271 // address map being resolved in the interconnect
272 /**
273 * Load the kernel code into memory
274 */
275 if (params()->kernel != "") {
276 // Validate kernel mapping before loading binary
| 83 nextPID(0),
84 physmem(name() + ".physmem", p->memories),
85 memoryMode(p->mem_mode),
86 _cacheLineSize(p->cache_line_size),
87 workItemsBegin(0),
88 workItemsEnd(0),
89 numWorkIds(p->num_work_ids),
90 _params(p),
91 totalNumInsts(0),
92 instEventQueue("system instruction-based event queue")
93{
94 // add self to global system list
95 systemList.push_back(this);
96
97 if (FullSystem) {
98 kernelSymtab = new SymbolTable;
99 if (!debugSymbolTable)
100 debugSymbolTable = new SymbolTable;
101 }
102
103 // check if the cache line size is a value known to work
104 if (!(_cacheLineSize == 16 || _cacheLineSize == 32 ||
105 _cacheLineSize == 64 || _cacheLineSize == 128))
106 warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n");
107
108 // Get the generic system master IDs
109 MasterID tmp_id M5_VAR_USED;
110 tmp_id = getMasterId("writebacks");
111 assert(tmp_id == Request::wbMasterId);
112 tmp_id = getMasterId("functional");
113 assert(tmp_id == Request::funcMasterId);
114 tmp_id = getMasterId("interrupt");
115 assert(tmp_id == Request::intMasterId);
116
117 if (FullSystem) {
118 if (params()->kernel == "") {
119 inform("No kernel set for full system simulation. "
120 "Assuming you know what you're doing\n");
121
122 kernel = NULL;
123 } else {
124 // Get the kernel code
125 kernel = createObjectFile(params()->kernel);
126 inform("kernel located at: %s", params()->kernel);
127
128 if (kernel == NULL)
129 fatal("Could not load kernel file %s", params()->kernel);
130
131 // setup entry points
132 kernelStart = kernel->textBase();
133 kernelEnd = kernel->bssBase() + kernel->bssSize();
134 kernelEntry = kernel->entryPoint();
135
136 // load symbols
137 if (!kernel->loadGlobalSymbols(kernelSymtab))
138 fatal("could not load kernel symbols\n");
139
140 if (!kernel->loadLocalSymbols(kernelSymtab))
141 fatal("could not load kernel local symbols\n");
142
143 if (!kernel->loadGlobalSymbols(debugSymbolTable))
144 fatal("could not load kernel symbols\n");
145
146 if (!kernel->loadLocalSymbols(debugSymbolTable))
147 fatal("could not load kernel local symbols\n");
148
149 // Loading only needs to happen once and after memory system is
150 // connected so it will happen in initState()
151 }
152 }
153
154 // increment the number of running systms
155 numSystemsRunning++;
156
157 // Set back pointers to the system in all memories
158 for (int x = 0; x < params()->memories.size(); x++)
159 params()->memories[x]->system(this);
160}
161
162System::~System()
163{
164 delete kernelSymtab;
165 delete kernel;
166
167 for (uint32_t j = 0; j < numWorkIds; j++)
168 delete workItemStats[j];
169}
170
171void
172System::init()
173{
174 // check that the system port is connected
175 if (!_systemPort.isConnected())
176 panic("System port on %s is not connected.\n", name());
177}
178
179BaseMasterPort&
180System::getMasterPort(const std::string &if_name, PortID idx)
181{
182 // no need to distinguish at the moment (besides checking)
183 return _systemPort;
184}
185
186void
187System::setMemoryMode(Enums::MemoryMode mode)
188{
189 assert(getDrainState() == Drainable::Drained);
190 memoryMode = mode;
191}
192
193bool System::breakpoint()
194{
195 if (remoteGDB.size())
196 return remoteGDB[0]->breakpoint();
197 return false;
198}
199
200/**
201 * Setting rgdb_wait to a positive integer waits for a remote debugger to
202 * connect to that context ID before continuing. This should really
203 be a parameter on the CPU object or something...
204 */
205int rgdb_wait = -1;
206
207int
208System::registerThreadContext(ThreadContext *tc, int assigned)
209{
210 int id;
211 if (assigned == -1) {
212 for (id = 0; id < threadContexts.size(); id++) {
213 if (!threadContexts[id])
214 break;
215 }
216
217 if (threadContexts.size() <= id)
218 threadContexts.resize(id + 1);
219 } else {
220 if (threadContexts.size() <= assigned)
221 threadContexts.resize(assigned + 1);
222 id = assigned;
223 }
224
225 if (threadContexts[id])
226 fatal("Cannot have two CPUs with the same id (%d)\n", id);
227
228 threadContexts[id] = tc;
229 _numContexts++;
230
231#if THE_ISA != NULL_ISA
232 int port = getRemoteGDBPort();
233 if (port) {
234 RemoteGDB *rgdb = new RemoteGDB(this, tc);
235 GDBListener *gdbl = new GDBListener(rgdb, port + id);
236 gdbl->listen();
237
238 if (rgdb_wait != -1 && rgdb_wait == id)
239 gdbl->accept();
240
241 if (remoteGDB.size() <= id) {
242 remoteGDB.resize(id + 1);
243 }
244
245 remoteGDB[id] = rgdb;
246 }
247#endif
248
249 activeCpus.push_back(false);
250
251 return id;
252}
253
254int
255System::numRunningContexts()
256{
257 int running = 0;
258 for (int i = 0; i < _numContexts; ++i) {
259 if (threadContexts[i]->status() != ThreadContext::Halted)
260 ++running;
261 }
262 return running;
263}
264
265void
266System::initState()
267{
268 if (FullSystem) {
269 for (int i = 0; i < threadContexts.size(); i++)
270 TheISA::startupCPU(threadContexts[i], i);
271 // Moved from the constructor to here since it relies on the
272 // address map being resolved in the interconnect
273 /**
274 * Load the kernel code into memory
275 */
276 if (params()->kernel != "") {
277 // Validate kernel mapping before loading binary
|
277 if (!(isMemAddr(kernelStart & loadAddrMask) &&
278 isMemAddr(kernelEnd & loadAddrMask))) {
| 278 if (!(isMemAddr((kernelStart & loadAddrMask) + loadAddrOffset) &&
279 isMemAddr((kernelEnd & loadAddrMask) + loadAddrOffset))) {
|
279 fatal("Kernel is mapped to invalid location (not memory). "
| 280 fatal("Kernel is mapped to invalid location (not memory). "
|
280 "kernelStart 0x(%x) - kernelEnd 0x(%x)\n", kernelStart,
281 kernelEnd);
| 281 "kernelStart 0x(%x) - kernelEnd 0x(%x) %#x:%#x\n", kernelStart,
282 kernelEnd, (kernelStart & loadAddrMask) + loadAddrOffset,
283 (kernelEnd & loadAddrMask) + loadAddrOffset);
|
282 }
283 // Load program sections into memory
| 284 }
285 // Load program sections into memory
|
284 kernel->loadSections(physProxy, loadAddrMask);
| 286 kernel->loadSections(physProxy, loadAddrMask, loadAddrOffset);
|
285
286 DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
287 DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
288 DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
289 DPRINTF(Loader, "Kernel loaded...\n");
290 }
291 }
292
293 activeCpus.clear();
294}
295
296void
297System::replaceThreadContext(ThreadContext *tc, int context_id)
298{
299 if (context_id >= threadContexts.size()) {
300 panic("replaceThreadContext: bad id, %d >= %d\n",
301 context_id, threadContexts.size());
302 }
303
304 threadContexts[context_id] = tc;
305 if (context_id < remoteGDB.size())
306 remoteGDB[context_id]->replaceThreadContext(tc);
307}
308
309Addr
310System::allocPhysPages(int npages)
311{
312 Addr return_addr = pagePtr << LogVMPageSize;
313 pagePtr += npages;
314 if ((pagePtr << LogVMPageSize) > physmem.totalSize())
315 fatal("Out of memory, please increase size of physical memory.");
316 return return_addr;
317}
318
319Addr
320System::memSize() const
321{
322 return physmem.totalSize();
323}
324
325Addr
326System::freeMemSize() const
327{
328 return physmem.totalSize() - (pagePtr << LogVMPageSize);
329}
330
331bool
332System::isMemAddr(Addr addr) const
333{
334 return physmem.isMemAddr(addr);
335}
336
337unsigned int
338System::drain(DrainManager *dm)
339{
340 setDrainState(Drainable::Drained);
341 return 0;
342}
343
344void
345System::drainResume()
346{
347 Drainable::drainResume();
348 totalNumInsts = 0;
349}
350
351void
352System::serialize(ostream &os)
353{
354 if (FullSystem)
355 kernelSymtab->serialize("kernel_symtab", os);
356 SERIALIZE_SCALAR(pagePtr);
357 SERIALIZE_SCALAR(nextPID);
358 serializeSymtab(os);
359
360 // also serialize the memories in the system
361 nameOut(os, csprintf("%s.physmem", name()));
362 physmem.serialize(os);
363}
364
365
366void
367System::unserialize(Checkpoint *cp, const string §ion)
368{
369 if (FullSystem)
370 kernelSymtab->unserialize("kernel_symtab", cp, section);
371 UNSERIALIZE_SCALAR(pagePtr);
372 UNSERIALIZE_SCALAR(nextPID);
373 unserializeSymtab(cp, section);
374
375 // also unserialize the memories in the system
376 physmem.unserialize(cp, csprintf("%s.physmem", name()));
377}
378
379void
380System::regStats()
381{
382 for (uint32_t j = 0; j < numWorkIds ; j++) {
383 workItemStats[j] = new Stats::Histogram();
384 stringstream namestr;
385 ccprintf(namestr, "work_item_type%d", j);
386 workItemStats[j]->init(20)
387 .name(name() + "." + namestr.str())
388 .desc("Run time stat for" + namestr.str())
389 .prereq(*workItemStats[j]);
390 }
391}
392
393void
394System::workItemEnd(uint32_t tid, uint32_t workid)
395{
396 std::pair<uint32_t,uint32_t> p(tid, workid);
397 if (!lastWorkItemStarted.count(p))
398 return;
399
400 Tick samp = curTick() - lastWorkItemStarted[p];
401 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
402
403 if (workid >= numWorkIds)
404 fatal("Got workid greater than specified in system configuration\n");
405
406 workItemStats[workid]->sample(samp);
407 lastWorkItemStarted.erase(p);
408}
409
410void
411System::printSystems()
412{
413 vector<System *>::iterator i = systemList.begin();
414 vector<System *>::iterator end = systemList.end();
415 for (; i != end; ++i) {
416 System *sys = *i;
417 cerr << "System " << sys->name() << ": " << hex << sys << endl;
418 }
419}
420
421void
422printSystems()
423{
424 System::printSystems();
425}
426
427MasterID
428System::getMasterId(std::string master_name)
429{
430 // strip off system name if the string starts with it
431 if (startswith(master_name, name()))
432 master_name = master_name.erase(0, name().size() + 1);
433
434 // CPUs in switch_cpus ask for ids again after switching
435 for (int i = 0; i < masterIds.size(); i++) {
436 if (masterIds[i] == master_name) {
437 return i;
438 }
439 }
440
441 // Verify that the statistics haven't been enabled yet
442 // Otherwise objects will have sized their stat buckets and
443 // they will be too small
444
445 if (Stats::enabled())
446 fatal("Can't request a masterId after regStats(). \
447 You must do so in init().\n");
448
449 masterIds.push_back(master_name);
450
451 return masterIds.size() - 1;
452}
453
454std::string
455System::getMasterName(MasterID master_id)
456{
457 if (master_id >= masterIds.size())
458 fatal("Invalid master_id passed to getMasterName()\n");
459
460 return masterIds[master_id];
461}
462
463const char *System::MemoryModeStrings[4] = {"invalid", "atomic", "timing",
464 "atomic_noncaching"};
465
466System *
467SystemParams::create()
468{
469 return new System(this);
470}
| 287
288 DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
289 DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
290 DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
291 DPRINTF(Loader, "Kernel loaded...\n");
292 }
293 }
294
295 activeCpus.clear();
296}
297
298void
299System::replaceThreadContext(ThreadContext *tc, int context_id)
300{
301 if (context_id >= threadContexts.size()) {
302 panic("replaceThreadContext: bad id, %d >= %d\n",
303 context_id, threadContexts.size());
304 }
305
306 threadContexts[context_id] = tc;
307 if (context_id < remoteGDB.size())
308 remoteGDB[context_id]->replaceThreadContext(tc);
309}
310
311Addr
312System::allocPhysPages(int npages)
313{
314 Addr return_addr = pagePtr << LogVMPageSize;
315 pagePtr += npages;
316 if ((pagePtr << LogVMPageSize) > physmem.totalSize())
317 fatal("Out of memory, please increase size of physical memory.");
318 return return_addr;
319}
320
321Addr
322System::memSize() const
323{
324 return physmem.totalSize();
325}
326
327Addr
328System::freeMemSize() const
329{
330 return physmem.totalSize() - (pagePtr << LogVMPageSize);
331}
332
333bool
334System::isMemAddr(Addr addr) const
335{
336 return physmem.isMemAddr(addr);
337}
338
339unsigned int
340System::drain(DrainManager *dm)
341{
342 setDrainState(Drainable::Drained);
343 return 0;
344}
345
346void
347System::drainResume()
348{
349 Drainable::drainResume();
350 totalNumInsts = 0;
351}
352
353void
354System::serialize(ostream &os)
355{
356 if (FullSystem)
357 kernelSymtab->serialize("kernel_symtab", os);
358 SERIALIZE_SCALAR(pagePtr);
359 SERIALIZE_SCALAR(nextPID);
360 serializeSymtab(os);
361
362 // also serialize the memories in the system
363 nameOut(os, csprintf("%s.physmem", name()));
364 physmem.serialize(os);
365}
366
367
368void
369System::unserialize(Checkpoint *cp, const string §ion)
370{
371 if (FullSystem)
372 kernelSymtab->unserialize("kernel_symtab", cp, section);
373 UNSERIALIZE_SCALAR(pagePtr);
374 UNSERIALIZE_SCALAR(nextPID);
375 unserializeSymtab(cp, section);
376
377 // also unserialize the memories in the system
378 physmem.unserialize(cp, csprintf("%s.physmem", name()));
379}
380
381void
382System::regStats()
383{
384 for (uint32_t j = 0; j < numWorkIds ; j++) {
385 workItemStats[j] = new Stats::Histogram();
386 stringstream namestr;
387 ccprintf(namestr, "work_item_type%d", j);
388 workItemStats[j]->init(20)
389 .name(name() + "." + namestr.str())
390 .desc("Run time stat for" + namestr.str())
391 .prereq(*workItemStats[j]);
392 }
393}
394
395void
396System::workItemEnd(uint32_t tid, uint32_t workid)
397{
398 std::pair<uint32_t,uint32_t> p(tid, workid);
399 if (!lastWorkItemStarted.count(p))
400 return;
401
402 Tick samp = curTick() - lastWorkItemStarted[p];
403 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
404
405 if (workid >= numWorkIds)
406 fatal("Got workid greater than specified in system configuration\n");
407
408 workItemStats[workid]->sample(samp);
409 lastWorkItemStarted.erase(p);
410}
411
412void
413System::printSystems()
414{
415 vector<System *>::iterator i = systemList.begin();
416 vector<System *>::iterator end = systemList.end();
417 for (; i != end; ++i) {
418 System *sys = *i;
419 cerr << "System " << sys->name() << ": " << hex << sys << endl;
420 }
421}
422
423void
424printSystems()
425{
426 System::printSystems();
427}
428
429MasterID
430System::getMasterId(std::string master_name)
431{
432 // strip off system name if the string starts with it
433 if (startswith(master_name, name()))
434 master_name = master_name.erase(0, name().size() + 1);
435
436 // CPUs in switch_cpus ask for ids again after switching
437 for (int i = 0; i < masterIds.size(); i++) {
438 if (masterIds[i] == master_name) {
439 return i;
440 }
441 }
442
443 // Verify that the statistics haven't been enabled yet
444 // Otherwise objects will have sized their stat buckets and
445 // they will be too small
446
447 if (Stats::enabled())
448 fatal("Can't request a masterId after regStats(). \
449 You must do so in init().\n");
450
451 masterIds.push_back(master_name);
452
453 return masterIds.size() - 1;
454}
455
456std::string
457System::getMasterName(MasterID master_id)
458{
459 if (master_id >= masterIds.size())
460 fatal("Invalid master_id passed to getMasterName()\n");
461
462 return masterIds[master_id];
463}
464
465const char *System::MemoryModeStrings[4] = {"invalid", "atomic", "timing",
466 "atomic_noncaching"};
467
468System *
469SystemParams::create()
470{
471 return new System(this);
472}
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