system.cc (9814:7ad2b0186a32) | system.cc (9847:29941c87f7b0) |
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1/* 2 * Copyright (c) 2011-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2003-2006 The Regents of The University of Michigan 15 * Copyright (c) 2011 Regents of the University of California 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Steve Reinhardt 42 * Lisa Hsu 43 * Nathan Binkert 44 * Ali Saidi 45 * Rick Strong 46 */ 47 48#include "arch/isa_traits.hh" 49#include "arch/remote_gdb.hh" 50#include "arch/utility.hh" 51#include "arch/vtophys.hh" 52#include "base/loader/object_file.hh" 53#include "base/loader/symtab.hh" 54#include "base/str.hh" 55#include "base/trace.hh" 56#include "config/the_isa.hh" 57#include "cpu/thread_context.hh" 58#include "debug/Loader.hh" 59#include "debug/WorkItems.hh" 60#include "kern/kernel_stats.hh" 61#include "mem/abstract_mem.hh" 62#include "mem/physical.hh" 63#include "params/System.hh" 64#include "sim/byteswap.hh" 65#include "sim/debug.hh" 66#include "sim/full_system.hh" 67#include "sim/system.hh" 68 69using namespace std; 70using namespace TheISA; 71 72vector<System *> System::systemList; 73 74int System::numSystemsRunning = 0; 75 76System::System(Params *p) 77 : MemObject(p), _systemPort("system_port", this), 78 _numContexts(0), 79 pagePtr(0), 80 init_param(p->init_param), 81 physProxy(_systemPort, p->cache_line_size), | 1/* 2 * Copyright (c) 2011-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2003-2006 The Regents of The University of Michigan 15 * Copyright (c) 2011 Regents of the University of California 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Steve Reinhardt 42 * Lisa Hsu 43 * Nathan Binkert 44 * Ali Saidi 45 * Rick Strong 46 */ 47 48#include "arch/isa_traits.hh" 49#include "arch/remote_gdb.hh" 50#include "arch/utility.hh" 51#include "arch/vtophys.hh" 52#include "base/loader/object_file.hh" 53#include "base/loader/symtab.hh" 54#include "base/str.hh" 55#include "base/trace.hh" 56#include "config/the_isa.hh" 57#include "cpu/thread_context.hh" 58#include "debug/Loader.hh" 59#include "debug/WorkItems.hh" 60#include "kern/kernel_stats.hh" 61#include "mem/abstract_mem.hh" 62#include "mem/physical.hh" 63#include "params/System.hh" 64#include "sim/byteswap.hh" 65#include "sim/debug.hh" 66#include "sim/full_system.hh" 67#include "sim/system.hh" 68 69using namespace std; 70using namespace TheISA; 71 72vector<System *> System::systemList; 73 74int System::numSystemsRunning = 0; 75 76System::System(Params *p) 77 : MemObject(p), _systemPort("system_port", this), 78 _numContexts(0), 79 pagePtr(0), 80 init_param(p->init_param), 81 physProxy(_systemPort, p->cache_line_size), |
82 virtProxy(_systemPort, p->cache_line_size), | |
83 loadAddrMask(p->load_addr_mask), 84 nextPID(0), 85 physmem(name() + ".physmem", p->memories), 86 memoryMode(p->mem_mode), 87 _cacheLineSize(p->cache_line_size), 88 workItemsBegin(0), 89 workItemsEnd(0), 90 numWorkIds(p->num_work_ids), 91 _params(p), 92 totalNumInsts(0), 93 instEventQueue("system instruction-based event queue") 94{ 95 // add self to global system list 96 systemList.push_back(this); 97 98 if (FullSystem) { 99 kernelSymtab = new SymbolTable; 100 if (!debugSymbolTable) 101 debugSymbolTable = new SymbolTable; 102 } 103 104 // check if the cache line size is a value known to work 105 if (!(_cacheLineSize == 16 || _cacheLineSize == 32 || 106 _cacheLineSize == 64 || _cacheLineSize == 128)) 107 warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n"); 108 109 // Get the generic system master IDs 110 MasterID tmp_id M5_VAR_USED; 111 tmp_id = getMasterId("writebacks"); 112 assert(tmp_id == Request::wbMasterId); 113 tmp_id = getMasterId("functional"); 114 assert(tmp_id == Request::funcMasterId); 115 tmp_id = getMasterId("interrupt"); 116 assert(tmp_id == Request::intMasterId); 117 118 if (FullSystem) { 119 if (params()->kernel == "") { 120 inform("No kernel set for full system simulation. " 121 "Assuming you know what you're doing\n"); 122 123 kernel = NULL; 124 } else { 125 // Get the kernel code 126 kernel = createObjectFile(params()->kernel); 127 inform("kernel located at: %s", params()->kernel); 128 129 if (kernel == NULL) 130 fatal("Could not load kernel file %s", params()->kernel); 131 132 // setup entry points 133 kernelStart = kernel->textBase(); 134 kernelEnd = kernel->bssBase() + kernel->bssSize(); 135 kernelEntry = kernel->entryPoint(); 136 137 // load symbols 138 if (!kernel->loadGlobalSymbols(kernelSymtab)) 139 fatal("could not load kernel symbols\n"); 140 141 if (!kernel->loadLocalSymbols(kernelSymtab)) 142 fatal("could not load kernel local symbols\n"); 143 144 if (!kernel->loadGlobalSymbols(debugSymbolTable)) 145 fatal("could not load kernel symbols\n"); 146 147 if (!kernel->loadLocalSymbols(debugSymbolTable)) 148 fatal("could not load kernel local symbols\n"); 149 150 // Loading only needs to happen once and after memory system is 151 // connected so it will happen in initState() 152 } 153 } 154 155 // increment the number of running systms 156 numSystemsRunning++; 157 158 // Set back pointers to the system in all memories 159 for (int x = 0; x < params()->memories.size(); x++) 160 params()->memories[x]->system(this); 161} 162 163System::~System() 164{ 165 delete kernelSymtab; 166 delete kernel; 167 168 for (uint32_t j = 0; j < numWorkIds; j++) 169 delete workItemStats[j]; 170} 171 172void 173System::init() 174{ 175 // check that the system port is connected 176 if (!_systemPort.isConnected()) 177 panic("System port on %s is not connected.\n", name()); 178} 179 180BaseMasterPort& 181System::getMasterPort(const std::string &if_name, PortID idx) 182{ 183 // no need to distinguish at the moment (besides checking) 184 return _systemPort; 185} 186 187void 188System::setMemoryMode(Enums::MemoryMode mode) 189{ 190 assert(getDrainState() == Drainable::Drained); 191 memoryMode = mode; 192} 193 194bool System::breakpoint() 195{ 196 if (remoteGDB.size()) 197 return remoteGDB[0]->breakpoint(); 198 return false; 199} 200 201/** 202 * Setting rgdb_wait to a positive integer waits for a remote debugger to 203 * connect to that context ID before continuing. This should really 204 be a parameter on the CPU object or something... 205 */ 206int rgdb_wait = -1; 207 208int 209System::registerThreadContext(ThreadContext *tc, int assigned) 210{ 211 int id; 212 if (assigned == -1) { 213 for (id = 0; id < threadContexts.size(); id++) { 214 if (!threadContexts[id]) 215 break; 216 } 217 218 if (threadContexts.size() <= id) 219 threadContexts.resize(id + 1); 220 } else { 221 if (threadContexts.size() <= assigned) 222 threadContexts.resize(assigned + 1); 223 id = assigned; 224 } 225 226 if (threadContexts[id]) 227 fatal("Cannot have two CPUs with the same id (%d)\n", id); 228 229 threadContexts[id] = tc; 230 _numContexts++; 231 232 int port = getRemoteGDBPort(); 233 if (port) { 234 RemoteGDB *rgdb = new RemoteGDB(this, tc); 235 GDBListener *gdbl = new GDBListener(rgdb, port + id); 236 gdbl->listen(); 237 238 if (rgdb_wait != -1 && rgdb_wait == id) 239 gdbl->accept(); 240 241 if (remoteGDB.size() <= id) { 242 remoteGDB.resize(id + 1); 243 } 244 245 remoteGDB[id] = rgdb; 246 } 247 248 activeCpus.push_back(false); 249 250 return id; 251} 252 253int 254System::numRunningContexts() 255{ 256 int running = 0; 257 for (int i = 0; i < _numContexts; ++i) { 258 if (threadContexts[i]->status() != ThreadContext::Halted) 259 ++running; 260 } 261 return running; 262} 263 264void 265System::initState() 266{ 267 if (FullSystem) { 268 for (int i = 0; i < threadContexts.size(); i++) 269 TheISA::startupCPU(threadContexts[i], i); 270 // Moved from the constructor to here since it relies on the 271 // address map being resolved in the interconnect 272 /** 273 * Load the kernel code into memory 274 */ 275 if (params()->kernel != "") { 276 // Validate kernel mapping before loading binary 277 if (!(isMemAddr(kernelStart & loadAddrMask) && 278 isMemAddr(kernelEnd & loadAddrMask))) { 279 fatal("Kernel is mapped to invalid location (not memory). " 280 "kernelStart 0x(%x) - kernelEnd 0x(%x)\n", kernelStart, 281 kernelEnd); 282 } 283 // Load program sections into memory 284 kernel->loadSections(physProxy, loadAddrMask); 285 286 DPRINTF(Loader, "Kernel start = %#x\n", kernelStart); 287 DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd); 288 DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry); 289 DPRINTF(Loader, "Kernel loaded...\n"); 290 } 291 } 292 293 activeCpus.clear(); 294} 295 296void 297System::replaceThreadContext(ThreadContext *tc, int context_id) 298{ 299 if (context_id >= threadContexts.size()) { 300 panic("replaceThreadContext: bad id, %d >= %d\n", 301 context_id, threadContexts.size()); 302 } 303 304 threadContexts[context_id] = tc; 305 if (context_id < remoteGDB.size()) 306 remoteGDB[context_id]->replaceThreadContext(tc); 307} 308 309Addr 310System::allocPhysPages(int npages) 311{ 312 Addr return_addr = pagePtr << LogVMPageSize; 313 pagePtr += npages; 314 if ((pagePtr << LogVMPageSize) > physmem.totalSize()) 315 fatal("Out of memory, please increase size of physical memory."); 316 return return_addr; 317} 318 319Addr 320System::memSize() const 321{ 322 return physmem.totalSize(); 323} 324 325Addr 326System::freeMemSize() const 327{ 328 return physmem.totalSize() - (pagePtr << LogVMPageSize); 329} 330 331bool 332System::isMemAddr(Addr addr) const 333{ 334 return physmem.isMemAddr(addr); 335} 336 337unsigned int 338System::drain(DrainManager *dm) 339{ 340 setDrainState(Drainable::Drained); 341 return 0; 342} 343 344void 345System::drainResume() 346{ 347 Drainable::drainResume(); 348 totalNumInsts = 0; 349} 350 351void 352System::serialize(ostream &os) 353{ 354 if (FullSystem) 355 kernelSymtab->serialize("kernel_symtab", os); 356 SERIALIZE_SCALAR(pagePtr); 357 SERIALIZE_SCALAR(nextPID); 358 serializeSymtab(os); 359 360 // also serialize the memories in the system 361 nameOut(os, csprintf("%s.physmem", name())); 362 physmem.serialize(os); 363} 364 365 366void 367System::unserialize(Checkpoint *cp, const string §ion) 368{ 369 if (FullSystem) 370 kernelSymtab->unserialize("kernel_symtab", cp, section); 371 UNSERIALIZE_SCALAR(pagePtr); 372 UNSERIALIZE_SCALAR(nextPID); 373 unserializeSymtab(cp, section); 374 375 // also unserialize the memories in the system 376 physmem.unserialize(cp, csprintf("%s.physmem", name())); 377} 378 379void 380System::regStats() 381{ 382 for (uint32_t j = 0; j < numWorkIds ; j++) { 383 workItemStats[j] = new Stats::Histogram(); 384 stringstream namestr; 385 ccprintf(namestr, "work_item_type%d", j); 386 workItemStats[j]->init(20) 387 .name(name() + "." + namestr.str()) 388 .desc("Run time stat for" + namestr.str()) 389 .prereq(*workItemStats[j]); 390 } 391} 392 393void 394System::workItemEnd(uint32_t tid, uint32_t workid) 395{ 396 std::pair<uint32_t,uint32_t> p(tid, workid); 397 if (!lastWorkItemStarted.count(p)) 398 return; 399 400 Tick samp = curTick() - lastWorkItemStarted[p]; 401 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); 402 403 if (workid >= numWorkIds) 404 fatal("Got workid greater than specified in system configuration\n"); 405 406 workItemStats[workid]->sample(samp); 407 lastWorkItemStarted.erase(p); 408} 409 410void 411System::printSystems() 412{ 413 vector<System *>::iterator i = systemList.begin(); 414 vector<System *>::iterator end = systemList.end(); 415 for (; i != end; ++i) { 416 System *sys = *i; 417 cerr << "System " << sys->name() << ": " << hex << sys << endl; 418 } 419} 420 421void 422printSystems() 423{ 424 System::printSystems(); 425} 426 427MasterID 428System::getMasterId(std::string master_name) 429{ 430 // strip off system name if the string starts with it 431 if (startswith(master_name, name())) 432 master_name = master_name.erase(0, name().size() + 1); 433 434 // CPUs in switch_cpus ask for ids again after switching 435 for (int i = 0; i < masterIds.size(); i++) { 436 if (masterIds[i] == master_name) { 437 return i; 438 } 439 } 440 441 // Verify that the statistics haven't been enabled yet 442 // Otherwise objects will have sized their stat buckets and 443 // they will be too small 444 445 if (Stats::enabled()) 446 fatal("Can't request a masterId after regStats(). \ 447 You must do so in init().\n"); 448 449 masterIds.push_back(master_name); 450 451 return masterIds.size() - 1; 452} 453 454std::string 455System::getMasterName(MasterID master_id) 456{ 457 if (master_id >= masterIds.size()) 458 fatal("Invalid master_id passed to getMasterName()\n"); 459 460 return masterIds[master_id]; 461} 462 463const char *System::MemoryModeStrings[4] = {"invalid", "atomic", "timing", 464 "atomic_noncaching"}; 465 466System * 467SystemParams::create() 468{ 469 return new System(this); 470} | 82 loadAddrMask(p->load_addr_mask), 83 nextPID(0), 84 physmem(name() + ".physmem", p->memories), 85 memoryMode(p->mem_mode), 86 _cacheLineSize(p->cache_line_size), 87 workItemsBegin(0), 88 workItemsEnd(0), 89 numWorkIds(p->num_work_ids), 90 _params(p), 91 totalNumInsts(0), 92 instEventQueue("system instruction-based event queue") 93{ 94 // add self to global system list 95 systemList.push_back(this); 96 97 if (FullSystem) { 98 kernelSymtab = new SymbolTable; 99 if (!debugSymbolTable) 100 debugSymbolTable = new SymbolTable; 101 } 102 103 // check if the cache line size is a value known to work 104 if (!(_cacheLineSize == 16 || _cacheLineSize == 32 || 105 _cacheLineSize == 64 || _cacheLineSize == 128)) 106 warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n"); 107 108 // Get the generic system master IDs 109 MasterID tmp_id M5_VAR_USED; 110 tmp_id = getMasterId("writebacks"); 111 assert(tmp_id == Request::wbMasterId); 112 tmp_id = getMasterId("functional"); 113 assert(tmp_id == Request::funcMasterId); 114 tmp_id = getMasterId("interrupt"); 115 assert(tmp_id == Request::intMasterId); 116 117 if (FullSystem) { 118 if (params()->kernel == "") { 119 inform("No kernel set for full system simulation. " 120 "Assuming you know what you're doing\n"); 121 122 kernel = NULL; 123 } else { 124 // Get the kernel code 125 kernel = createObjectFile(params()->kernel); 126 inform("kernel located at: %s", params()->kernel); 127 128 if (kernel == NULL) 129 fatal("Could not load kernel file %s", params()->kernel); 130 131 // setup entry points 132 kernelStart = kernel->textBase(); 133 kernelEnd = kernel->bssBase() + kernel->bssSize(); 134 kernelEntry = kernel->entryPoint(); 135 136 // load symbols 137 if (!kernel->loadGlobalSymbols(kernelSymtab)) 138 fatal("could not load kernel symbols\n"); 139 140 if (!kernel->loadLocalSymbols(kernelSymtab)) 141 fatal("could not load kernel local symbols\n"); 142 143 if (!kernel->loadGlobalSymbols(debugSymbolTable)) 144 fatal("could not load kernel symbols\n"); 145 146 if (!kernel->loadLocalSymbols(debugSymbolTable)) 147 fatal("could not load kernel local symbols\n"); 148 149 // Loading only needs to happen once and after memory system is 150 // connected so it will happen in initState() 151 } 152 } 153 154 // increment the number of running systms 155 numSystemsRunning++; 156 157 // Set back pointers to the system in all memories 158 for (int x = 0; x < params()->memories.size(); x++) 159 params()->memories[x]->system(this); 160} 161 162System::~System() 163{ 164 delete kernelSymtab; 165 delete kernel; 166 167 for (uint32_t j = 0; j < numWorkIds; j++) 168 delete workItemStats[j]; 169} 170 171void 172System::init() 173{ 174 // check that the system port is connected 175 if (!_systemPort.isConnected()) 176 panic("System port on %s is not connected.\n", name()); 177} 178 179BaseMasterPort& 180System::getMasterPort(const std::string &if_name, PortID idx) 181{ 182 // no need to distinguish at the moment (besides checking) 183 return _systemPort; 184} 185 186void 187System::setMemoryMode(Enums::MemoryMode mode) 188{ 189 assert(getDrainState() == Drainable::Drained); 190 memoryMode = mode; 191} 192 193bool System::breakpoint() 194{ 195 if (remoteGDB.size()) 196 return remoteGDB[0]->breakpoint(); 197 return false; 198} 199 200/** 201 * Setting rgdb_wait to a positive integer waits for a remote debugger to 202 * connect to that context ID before continuing. This should really 203 be a parameter on the CPU object or something... 204 */ 205int rgdb_wait = -1; 206 207int 208System::registerThreadContext(ThreadContext *tc, int assigned) 209{ 210 int id; 211 if (assigned == -1) { 212 for (id = 0; id < threadContexts.size(); id++) { 213 if (!threadContexts[id]) 214 break; 215 } 216 217 if (threadContexts.size() <= id) 218 threadContexts.resize(id + 1); 219 } else { 220 if (threadContexts.size() <= assigned) 221 threadContexts.resize(assigned + 1); 222 id = assigned; 223 } 224 225 if (threadContexts[id]) 226 fatal("Cannot have two CPUs with the same id (%d)\n", id); 227 228 threadContexts[id] = tc; 229 _numContexts++; 230 231 int port = getRemoteGDBPort(); 232 if (port) { 233 RemoteGDB *rgdb = new RemoteGDB(this, tc); 234 GDBListener *gdbl = new GDBListener(rgdb, port + id); 235 gdbl->listen(); 236 237 if (rgdb_wait != -1 && rgdb_wait == id) 238 gdbl->accept(); 239 240 if (remoteGDB.size() <= id) { 241 remoteGDB.resize(id + 1); 242 } 243 244 remoteGDB[id] = rgdb; 245 } 246 247 activeCpus.push_back(false); 248 249 return id; 250} 251 252int 253System::numRunningContexts() 254{ 255 int running = 0; 256 for (int i = 0; i < _numContexts; ++i) { 257 if (threadContexts[i]->status() != ThreadContext::Halted) 258 ++running; 259 } 260 return running; 261} 262 263void 264System::initState() 265{ 266 if (FullSystem) { 267 for (int i = 0; i < threadContexts.size(); i++) 268 TheISA::startupCPU(threadContexts[i], i); 269 // Moved from the constructor to here since it relies on the 270 // address map being resolved in the interconnect 271 /** 272 * Load the kernel code into memory 273 */ 274 if (params()->kernel != "") { 275 // Validate kernel mapping before loading binary 276 if (!(isMemAddr(kernelStart & loadAddrMask) && 277 isMemAddr(kernelEnd & loadAddrMask))) { 278 fatal("Kernel is mapped to invalid location (not memory). " 279 "kernelStart 0x(%x) - kernelEnd 0x(%x)\n", kernelStart, 280 kernelEnd); 281 } 282 // Load program sections into memory 283 kernel->loadSections(physProxy, loadAddrMask); 284 285 DPRINTF(Loader, "Kernel start = %#x\n", kernelStart); 286 DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd); 287 DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry); 288 DPRINTF(Loader, "Kernel loaded...\n"); 289 } 290 } 291 292 activeCpus.clear(); 293} 294 295void 296System::replaceThreadContext(ThreadContext *tc, int context_id) 297{ 298 if (context_id >= threadContexts.size()) { 299 panic("replaceThreadContext: bad id, %d >= %d\n", 300 context_id, threadContexts.size()); 301 } 302 303 threadContexts[context_id] = tc; 304 if (context_id < remoteGDB.size()) 305 remoteGDB[context_id]->replaceThreadContext(tc); 306} 307 308Addr 309System::allocPhysPages(int npages) 310{ 311 Addr return_addr = pagePtr << LogVMPageSize; 312 pagePtr += npages; 313 if ((pagePtr << LogVMPageSize) > physmem.totalSize()) 314 fatal("Out of memory, please increase size of physical memory."); 315 return return_addr; 316} 317 318Addr 319System::memSize() const 320{ 321 return physmem.totalSize(); 322} 323 324Addr 325System::freeMemSize() const 326{ 327 return physmem.totalSize() - (pagePtr << LogVMPageSize); 328} 329 330bool 331System::isMemAddr(Addr addr) const 332{ 333 return physmem.isMemAddr(addr); 334} 335 336unsigned int 337System::drain(DrainManager *dm) 338{ 339 setDrainState(Drainable::Drained); 340 return 0; 341} 342 343void 344System::drainResume() 345{ 346 Drainable::drainResume(); 347 totalNumInsts = 0; 348} 349 350void 351System::serialize(ostream &os) 352{ 353 if (FullSystem) 354 kernelSymtab->serialize("kernel_symtab", os); 355 SERIALIZE_SCALAR(pagePtr); 356 SERIALIZE_SCALAR(nextPID); 357 serializeSymtab(os); 358 359 // also serialize the memories in the system 360 nameOut(os, csprintf("%s.physmem", name())); 361 physmem.serialize(os); 362} 363 364 365void 366System::unserialize(Checkpoint *cp, const string §ion) 367{ 368 if (FullSystem) 369 kernelSymtab->unserialize("kernel_symtab", cp, section); 370 UNSERIALIZE_SCALAR(pagePtr); 371 UNSERIALIZE_SCALAR(nextPID); 372 unserializeSymtab(cp, section); 373 374 // also unserialize the memories in the system 375 physmem.unserialize(cp, csprintf("%s.physmem", name())); 376} 377 378void 379System::regStats() 380{ 381 for (uint32_t j = 0; j < numWorkIds ; j++) { 382 workItemStats[j] = new Stats::Histogram(); 383 stringstream namestr; 384 ccprintf(namestr, "work_item_type%d", j); 385 workItemStats[j]->init(20) 386 .name(name() + "." + namestr.str()) 387 .desc("Run time stat for" + namestr.str()) 388 .prereq(*workItemStats[j]); 389 } 390} 391 392void 393System::workItemEnd(uint32_t tid, uint32_t workid) 394{ 395 std::pair<uint32_t,uint32_t> p(tid, workid); 396 if (!lastWorkItemStarted.count(p)) 397 return; 398 399 Tick samp = curTick() - lastWorkItemStarted[p]; 400 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); 401 402 if (workid >= numWorkIds) 403 fatal("Got workid greater than specified in system configuration\n"); 404 405 workItemStats[workid]->sample(samp); 406 lastWorkItemStarted.erase(p); 407} 408 409void 410System::printSystems() 411{ 412 vector<System *>::iterator i = systemList.begin(); 413 vector<System *>::iterator end = systemList.end(); 414 for (; i != end; ++i) { 415 System *sys = *i; 416 cerr << "System " << sys->name() << ": " << hex << sys << endl; 417 } 418} 419 420void 421printSystems() 422{ 423 System::printSystems(); 424} 425 426MasterID 427System::getMasterId(std::string master_name) 428{ 429 // strip off system name if the string starts with it 430 if (startswith(master_name, name())) 431 master_name = master_name.erase(0, name().size() + 1); 432 433 // CPUs in switch_cpus ask for ids again after switching 434 for (int i = 0; i < masterIds.size(); i++) { 435 if (masterIds[i] == master_name) { 436 return i; 437 } 438 } 439 440 // Verify that the statistics haven't been enabled yet 441 // Otherwise objects will have sized their stat buckets and 442 // they will be too small 443 444 if (Stats::enabled()) 445 fatal("Can't request a masterId after regStats(). \ 446 You must do so in init().\n"); 447 448 masterIds.push_back(master_name); 449 450 return masterIds.size() - 1; 451} 452 453std::string 454System::getMasterName(MasterID master_id) 455{ 456 if (master_id >= masterIds.size()) 457 fatal("Invalid master_id passed to getMasterName()\n"); 458 459 return masterIds[master_id]; 460} 461 462const char *System::MemoryModeStrings[4] = {"invalid", "atomic", "timing", 463 "atomic_noncaching"}; 464 465System * 466SystemParams::create() 467{ 468 return new System(this); 469} |