system.cc (9007:7100059f7bfd) system.cc (9053:9cad1c26c3b3)
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2006 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Steve Reinhardt
42 * Lisa Hsu
43 * Nathan Binkert
44 * Ali Saidi
45 * Rick Strong
46 */
47
48#include "arch/isa_traits.hh"
49#include "arch/remote_gdb.hh"
50#include "arch/utility.hh"
51#include "arch/vtophys.hh"
52#include "base/loader/object_file.hh"
53#include "base/loader/symtab.hh"
54#include "base/trace.hh"
55#include "config/the_isa.hh"
56#include "cpu/thread_context.hh"
57#include "debug/Loader.hh"
58#include "debug/WorkItems.hh"
59#include "kern/kernel_stats.hh"
60#include "mem/physical.hh"
61#include "params/System.hh"
62#include "sim/byteswap.hh"
63#include "sim/debug.hh"
64#include "sim/full_system.hh"
65#include "sim/system.hh"
66
67using namespace std;
68using namespace TheISA;
69
70vector<System *> System::systemList;
71
72int System::numSystemsRunning = 0;
73
74System::System(Params *p)
75 : MemObject(p), _systemPort("system_port", this),
76 _numContexts(0),
77 pagePtr(0),
78 init_param(p->init_param),
79 physProxy(_systemPort),
80 virtProxy(_systemPort),
81 loadAddrMask(p->load_addr_mask),
82 nextPID(0),
83 physmem(p->memories),
84 memoryMode(p->mem_mode),
85 workItemsBegin(0),
86 workItemsEnd(0),
87 numWorkIds(p->num_work_ids),
88 _params(p),
89 totalNumInsts(0),
90 instEventQueue("system instruction-based event queue")
91{
92 // add self to global system list
93 systemList.push_back(this);
94
95 if (FullSystem) {
96 kernelSymtab = new SymbolTable;
97 if (!debugSymbolTable)
98 debugSymbolTable = new SymbolTable;
99 }
100
101 // Get the generic system master IDs
102 MasterID tmp_id M5_VAR_USED;
103 tmp_id = getMasterId("writebacks");
104 assert(tmp_id == Request::wbMasterId);
105 tmp_id = getMasterId("functional");
106 assert(tmp_id == Request::funcMasterId);
107 tmp_id = getMasterId("interrupt");
108 assert(tmp_id == Request::intMasterId);
109
110 if (FullSystem) {
111 if (params()->kernel == "") {
112 inform("No kernel set for full system simulation. "
113 "Assuming you know what you're doing if not SPARC ISA\n");
114 } else {
115 // Get the kernel code
116 kernel = createObjectFile(params()->kernel);
117 inform("kernel located at: %s", params()->kernel);
118
119 if (kernel == NULL)
120 fatal("Could not load kernel file %s", params()->kernel);
121
122 // setup entry points
123 kernelStart = kernel->textBase();
124 kernelEnd = kernel->bssBase() + kernel->bssSize();
125 kernelEntry = kernel->entryPoint();
126
127 // load symbols
128 if (!kernel->loadGlobalSymbols(kernelSymtab))
129 fatal("could not load kernel symbols\n");
130
131 if (!kernel->loadLocalSymbols(kernelSymtab))
132 fatal("could not load kernel local symbols\n");
133
134 if (!kernel->loadGlobalSymbols(debugSymbolTable))
135 fatal("could not load kernel symbols\n");
136
137 if (!kernel->loadLocalSymbols(debugSymbolTable))
138 fatal("could not load kernel local symbols\n");
139
140 // Loading only needs to happen once and after memory system is
141 // connected so it will happen in initState()
142 }
143 }
144
145 // increment the number of running systms
146 numSystemsRunning++;
147
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2006 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Steve Reinhardt
42 * Lisa Hsu
43 * Nathan Binkert
44 * Ali Saidi
45 * Rick Strong
46 */
47
48#include "arch/isa_traits.hh"
49#include "arch/remote_gdb.hh"
50#include "arch/utility.hh"
51#include "arch/vtophys.hh"
52#include "base/loader/object_file.hh"
53#include "base/loader/symtab.hh"
54#include "base/trace.hh"
55#include "config/the_isa.hh"
56#include "cpu/thread_context.hh"
57#include "debug/Loader.hh"
58#include "debug/WorkItems.hh"
59#include "kern/kernel_stats.hh"
60#include "mem/physical.hh"
61#include "params/System.hh"
62#include "sim/byteswap.hh"
63#include "sim/debug.hh"
64#include "sim/full_system.hh"
65#include "sim/system.hh"
66
67using namespace std;
68using namespace TheISA;
69
70vector<System *> System::systemList;
71
72int System::numSystemsRunning = 0;
73
74System::System(Params *p)
75 : MemObject(p), _systemPort("system_port", this),
76 _numContexts(0),
77 pagePtr(0),
78 init_param(p->init_param),
79 physProxy(_systemPort),
80 virtProxy(_systemPort),
81 loadAddrMask(p->load_addr_mask),
82 nextPID(0),
83 physmem(p->memories),
84 memoryMode(p->mem_mode),
85 workItemsBegin(0),
86 workItemsEnd(0),
87 numWorkIds(p->num_work_ids),
88 _params(p),
89 totalNumInsts(0),
90 instEventQueue("system instruction-based event queue")
91{
92 // add self to global system list
93 systemList.push_back(this);
94
95 if (FullSystem) {
96 kernelSymtab = new SymbolTable;
97 if (!debugSymbolTable)
98 debugSymbolTable = new SymbolTable;
99 }
100
101 // Get the generic system master IDs
102 MasterID tmp_id M5_VAR_USED;
103 tmp_id = getMasterId("writebacks");
104 assert(tmp_id == Request::wbMasterId);
105 tmp_id = getMasterId("functional");
106 assert(tmp_id == Request::funcMasterId);
107 tmp_id = getMasterId("interrupt");
108 assert(tmp_id == Request::intMasterId);
109
110 if (FullSystem) {
111 if (params()->kernel == "") {
112 inform("No kernel set for full system simulation. "
113 "Assuming you know what you're doing if not SPARC ISA\n");
114 } else {
115 // Get the kernel code
116 kernel = createObjectFile(params()->kernel);
117 inform("kernel located at: %s", params()->kernel);
118
119 if (kernel == NULL)
120 fatal("Could not load kernel file %s", params()->kernel);
121
122 // setup entry points
123 kernelStart = kernel->textBase();
124 kernelEnd = kernel->bssBase() + kernel->bssSize();
125 kernelEntry = kernel->entryPoint();
126
127 // load symbols
128 if (!kernel->loadGlobalSymbols(kernelSymtab))
129 fatal("could not load kernel symbols\n");
130
131 if (!kernel->loadLocalSymbols(kernelSymtab))
132 fatal("could not load kernel local symbols\n");
133
134 if (!kernel->loadGlobalSymbols(debugSymbolTable))
135 fatal("could not load kernel symbols\n");
136
137 if (!kernel->loadLocalSymbols(debugSymbolTable))
138 fatal("could not load kernel local symbols\n");
139
140 // Loading only needs to happen once and after memory system is
141 // connected so it will happen in initState()
142 }
143 }
144
145 // increment the number of running systms
146 numSystemsRunning++;
147
148 // Set back pointers to the system in all memories
149 for (int x = 0; x < params()->memories.size(); x++)
150 params()->memories[x]->system(this);
148}
149
150System::~System()
151{
152 delete kernelSymtab;
153 delete kernel;
154
155 for (uint32_t j = 0; j < numWorkIds; j++)
156 delete workItemStats[j];
157}
158
159void
160System::init()
161{
162 // check that the system port is connected
163 if (!_systemPort.isConnected())
164 panic("System port on %s is not connected.\n", name());
165}
166
167MasterPort&
168System::getMasterPort(const std::string &if_name, int idx)
169{
170 // no need to distinguish at the moment (besides checking)
171 return _systemPort;
172}
173
174void
175System::setMemoryMode(Enums::MemoryMode mode)
176{
177 assert(getState() == Drained);
178 memoryMode = mode;
179}
180
181bool System::breakpoint()
182{
183 if (remoteGDB.size())
184 return remoteGDB[0]->breakpoint();
185 return false;
186}
187
188/**
189 * Setting rgdb_wait to a positive integer waits for a remote debugger to
190 * connect to that context ID before continuing. This should really
191 be a parameter on the CPU object or something...
192 */
193int rgdb_wait = -1;
194
195int
196System::registerThreadContext(ThreadContext *tc, int assigned)
197{
198 int id;
199 if (assigned == -1) {
200 for (id = 0; id < threadContexts.size(); id++) {
201 if (!threadContexts[id])
202 break;
203 }
204
205 if (threadContexts.size() <= id)
206 threadContexts.resize(id + 1);
207 } else {
208 if (threadContexts.size() <= assigned)
209 threadContexts.resize(assigned + 1);
210 id = assigned;
211 }
212
213 if (threadContexts[id])
214 fatal("Cannot have two CPUs with the same id (%d)\n", id);
215
216 threadContexts[id] = tc;
217 _numContexts++;
218
219 int port = getRemoteGDBPort();
220 if (port) {
221 RemoteGDB *rgdb = new RemoteGDB(this, tc);
222 GDBListener *gdbl = new GDBListener(rgdb, port + id);
223 gdbl->listen();
224
225 if (rgdb_wait != -1 && rgdb_wait == id)
226 gdbl->accept();
227
228 if (remoteGDB.size() <= id) {
229 remoteGDB.resize(id + 1);
230 }
231
232 remoteGDB[id] = rgdb;
233 }
234
235 activeCpus.push_back(false);
236
237 return id;
238}
239
240int
241System::numRunningContexts()
242{
243 int running = 0;
244 for (int i = 0; i < _numContexts; ++i) {
245 if (threadContexts[i]->status() != ThreadContext::Halted)
246 ++running;
247 }
248 return running;
249}
250
251void
252System::initState()
253{
254 int i;
255 if (FullSystem) {
256 for (i = 0; i < threadContexts.size(); i++)
257 TheISA::startupCPU(threadContexts[i], i);
258 // Moved from the constructor to here since it relies on the
259 // address map being resolved in the interconnect
260 /**
261 * Load the kernel code into memory
262 */
263 if (params()->kernel != "") {
264 // Load program sections into memory
265 kernel->loadSections(physProxy, loadAddrMask);
266
267 DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
268 DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
269 DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
270 DPRINTF(Loader, "Kernel loaded...\n");
271 }
272 }
273
274 activeCpus.clear();
275
276 if (!FullSystem)
277 return;
278
279 for (i = 0; i < threadContexts.size(); i++)
280 TheISA::startupCPU(threadContexts[i], i);
281}
282
283void
284System::replaceThreadContext(ThreadContext *tc, int context_id)
285{
286 if (context_id >= threadContexts.size()) {
287 panic("replaceThreadContext: bad id, %d >= %d\n",
288 context_id, threadContexts.size());
289 }
290
291 threadContexts[context_id] = tc;
292 if (context_id < remoteGDB.size())
293 remoteGDB[context_id]->replaceThreadContext(tc);
294}
295
296Addr
297System::allocPhysPages(int npages)
298{
299 Addr return_addr = pagePtr << LogVMPageSize;
300 pagePtr += npages;
301 if ((pagePtr << LogVMPageSize) > physmem.totalSize())
302 fatal("Out of memory, please increase size of physical memory.");
303 return return_addr;
304}
305
306Addr
307System::memSize() const
308{
309 return physmem.totalSize();
310}
311
312Addr
313System::freeMemSize() const
314{
315 return physmem.totalSize() - (pagePtr << LogVMPageSize);
316}
317
318bool
319System::isMemAddr(Addr addr) const
320{
321 return physmem.isMemAddr(addr);
322}
323
324void
325System::resume()
326{
327 SimObject::resume();
328 totalNumInsts = 0;
329}
330
331void
332System::serialize(ostream &os)
333{
334 if (FullSystem)
335 kernelSymtab->serialize("kernel_symtab", os);
336 SERIALIZE_SCALAR(pagePtr);
337 SERIALIZE_SCALAR(nextPID);
338}
339
340
341void
342System::unserialize(Checkpoint *cp, const string &section)
343{
344 if (FullSystem)
345 kernelSymtab->unserialize("kernel_symtab", cp, section);
346 UNSERIALIZE_SCALAR(pagePtr);
347 UNSERIALIZE_SCALAR(nextPID);
348}
349
350void
351System::regStats()
352{
353 for (uint32_t j = 0; j < numWorkIds ; j++) {
354 workItemStats[j] = new Stats::Histogram();
355 stringstream namestr;
356 ccprintf(namestr, "work_item_type%d", j);
357 workItemStats[j]->init(20)
358 .name(name() + "." + namestr.str())
359 .desc("Run time stat for" + namestr.str())
360 .prereq(*workItemStats[j]);
361 }
362}
363
364void
365System::workItemEnd(uint32_t tid, uint32_t workid)
366{
367 std::pair<uint32_t,uint32_t> p(tid, workid);
368 if (!lastWorkItemStarted.count(p))
369 return;
370
371 Tick samp = curTick() - lastWorkItemStarted[p];
372 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
373
374 if (workid >= numWorkIds)
375 fatal("Got workid greater than specified in system configuration\n");
376
377 workItemStats[workid]->sample(samp);
378 lastWorkItemStarted.erase(p);
379}
380
381void
382System::printSystems()
383{
384 vector<System *>::iterator i = systemList.begin();
385 vector<System *>::iterator end = systemList.end();
386 for (; i != end; ++i) {
387 System *sys = *i;
388 cerr << "System " << sys->name() << ": " << hex << sys << endl;
389 }
390}
391
392void
393printSystems()
394{
395 System::printSystems();
396}
397
398MasterID
399System::getMasterId(std::string master_name)
400{
401 // strip off system name if the string starts with it
402 if (master_name.size() > name().size() &&
403 master_name.compare(0, name().size(), name()) == 0)
404 master_name = master_name.erase(0, name().size() + 1);
405
406 // CPUs in switch_cpus ask for ids again after switching
407 for (int i = 0; i < masterIds.size(); i++) {
408 if (masterIds[i] == master_name) {
409 return i;
410 }
411 }
412
413 // Verify that the statistics haven't been enabled yet
414 // Otherwise objects will have sized their stat buckets and
415 // they will be too small
416
417 if (Stats::enabled())
418 fatal("Can't request a masterId after regStats(). \
419 You must do so in init().\n");
420
421 masterIds.push_back(master_name);
422
423 return masterIds.size() - 1;
424}
425
426std::string
427System::getMasterName(MasterID master_id)
428{
429 if (master_id >= masterIds.size())
430 fatal("Invalid master_id passed to getMasterName()\n");
431
432 return masterIds[master_id];
433}
434
435const char *System::MemoryModeStrings[3] = {"invalid", "atomic",
436 "timing"};
437
438System *
439SystemParams::create()
440{
441 return new System(this);
442}
151}
152
153System::~System()
154{
155 delete kernelSymtab;
156 delete kernel;
157
158 for (uint32_t j = 0; j < numWorkIds; j++)
159 delete workItemStats[j];
160}
161
162void
163System::init()
164{
165 // check that the system port is connected
166 if (!_systemPort.isConnected())
167 panic("System port on %s is not connected.\n", name());
168}
169
170MasterPort&
171System::getMasterPort(const std::string &if_name, int idx)
172{
173 // no need to distinguish at the moment (besides checking)
174 return _systemPort;
175}
176
177void
178System::setMemoryMode(Enums::MemoryMode mode)
179{
180 assert(getState() == Drained);
181 memoryMode = mode;
182}
183
184bool System::breakpoint()
185{
186 if (remoteGDB.size())
187 return remoteGDB[0]->breakpoint();
188 return false;
189}
190
191/**
192 * Setting rgdb_wait to a positive integer waits for a remote debugger to
193 * connect to that context ID before continuing. This should really
194 be a parameter on the CPU object or something...
195 */
196int rgdb_wait = -1;
197
198int
199System::registerThreadContext(ThreadContext *tc, int assigned)
200{
201 int id;
202 if (assigned == -1) {
203 for (id = 0; id < threadContexts.size(); id++) {
204 if (!threadContexts[id])
205 break;
206 }
207
208 if (threadContexts.size() <= id)
209 threadContexts.resize(id + 1);
210 } else {
211 if (threadContexts.size() <= assigned)
212 threadContexts.resize(assigned + 1);
213 id = assigned;
214 }
215
216 if (threadContexts[id])
217 fatal("Cannot have two CPUs with the same id (%d)\n", id);
218
219 threadContexts[id] = tc;
220 _numContexts++;
221
222 int port = getRemoteGDBPort();
223 if (port) {
224 RemoteGDB *rgdb = new RemoteGDB(this, tc);
225 GDBListener *gdbl = new GDBListener(rgdb, port + id);
226 gdbl->listen();
227
228 if (rgdb_wait != -1 && rgdb_wait == id)
229 gdbl->accept();
230
231 if (remoteGDB.size() <= id) {
232 remoteGDB.resize(id + 1);
233 }
234
235 remoteGDB[id] = rgdb;
236 }
237
238 activeCpus.push_back(false);
239
240 return id;
241}
242
243int
244System::numRunningContexts()
245{
246 int running = 0;
247 for (int i = 0; i < _numContexts; ++i) {
248 if (threadContexts[i]->status() != ThreadContext::Halted)
249 ++running;
250 }
251 return running;
252}
253
254void
255System::initState()
256{
257 int i;
258 if (FullSystem) {
259 for (i = 0; i < threadContexts.size(); i++)
260 TheISA::startupCPU(threadContexts[i], i);
261 // Moved from the constructor to here since it relies on the
262 // address map being resolved in the interconnect
263 /**
264 * Load the kernel code into memory
265 */
266 if (params()->kernel != "") {
267 // Load program sections into memory
268 kernel->loadSections(physProxy, loadAddrMask);
269
270 DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
271 DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
272 DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
273 DPRINTF(Loader, "Kernel loaded...\n");
274 }
275 }
276
277 activeCpus.clear();
278
279 if (!FullSystem)
280 return;
281
282 for (i = 0; i < threadContexts.size(); i++)
283 TheISA::startupCPU(threadContexts[i], i);
284}
285
286void
287System::replaceThreadContext(ThreadContext *tc, int context_id)
288{
289 if (context_id >= threadContexts.size()) {
290 panic("replaceThreadContext: bad id, %d >= %d\n",
291 context_id, threadContexts.size());
292 }
293
294 threadContexts[context_id] = tc;
295 if (context_id < remoteGDB.size())
296 remoteGDB[context_id]->replaceThreadContext(tc);
297}
298
299Addr
300System::allocPhysPages(int npages)
301{
302 Addr return_addr = pagePtr << LogVMPageSize;
303 pagePtr += npages;
304 if ((pagePtr << LogVMPageSize) > physmem.totalSize())
305 fatal("Out of memory, please increase size of physical memory.");
306 return return_addr;
307}
308
309Addr
310System::memSize() const
311{
312 return physmem.totalSize();
313}
314
315Addr
316System::freeMemSize() const
317{
318 return physmem.totalSize() - (pagePtr << LogVMPageSize);
319}
320
321bool
322System::isMemAddr(Addr addr) const
323{
324 return physmem.isMemAddr(addr);
325}
326
327void
328System::resume()
329{
330 SimObject::resume();
331 totalNumInsts = 0;
332}
333
334void
335System::serialize(ostream &os)
336{
337 if (FullSystem)
338 kernelSymtab->serialize("kernel_symtab", os);
339 SERIALIZE_SCALAR(pagePtr);
340 SERIALIZE_SCALAR(nextPID);
341}
342
343
344void
345System::unserialize(Checkpoint *cp, const string &section)
346{
347 if (FullSystem)
348 kernelSymtab->unserialize("kernel_symtab", cp, section);
349 UNSERIALIZE_SCALAR(pagePtr);
350 UNSERIALIZE_SCALAR(nextPID);
351}
352
353void
354System::regStats()
355{
356 for (uint32_t j = 0; j < numWorkIds ; j++) {
357 workItemStats[j] = new Stats::Histogram();
358 stringstream namestr;
359 ccprintf(namestr, "work_item_type%d", j);
360 workItemStats[j]->init(20)
361 .name(name() + "." + namestr.str())
362 .desc("Run time stat for" + namestr.str())
363 .prereq(*workItemStats[j]);
364 }
365}
366
367void
368System::workItemEnd(uint32_t tid, uint32_t workid)
369{
370 std::pair<uint32_t,uint32_t> p(tid, workid);
371 if (!lastWorkItemStarted.count(p))
372 return;
373
374 Tick samp = curTick() - lastWorkItemStarted[p];
375 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
376
377 if (workid >= numWorkIds)
378 fatal("Got workid greater than specified in system configuration\n");
379
380 workItemStats[workid]->sample(samp);
381 lastWorkItemStarted.erase(p);
382}
383
384void
385System::printSystems()
386{
387 vector<System *>::iterator i = systemList.begin();
388 vector<System *>::iterator end = systemList.end();
389 for (; i != end; ++i) {
390 System *sys = *i;
391 cerr << "System " << sys->name() << ": " << hex << sys << endl;
392 }
393}
394
395void
396printSystems()
397{
398 System::printSystems();
399}
400
401MasterID
402System::getMasterId(std::string master_name)
403{
404 // strip off system name if the string starts with it
405 if (master_name.size() > name().size() &&
406 master_name.compare(0, name().size(), name()) == 0)
407 master_name = master_name.erase(0, name().size() + 1);
408
409 // CPUs in switch_cpus ask for ids again after switching
410 for (int i = 0; i < masterIds.size(); i++) {
411 if (masterIds[i] == master_name) {
412 return i;
413 }
414 }
415
416 // Verify that the statistics haven't been enabled yet
417 // Otherwise objects will have sized their stat buckets and
418 // they will be too small
419
420 if (Stats::enabled())
421 fatal("Can't request a masterId after regStats(). \
422 You must do so in init().\n");
423
424 masterIds.push_back(master_name);
425
426 return masterIds.size() - 1;
427}
428
429std::string
430System::getMasterName(MasterID master_id)
431{
432 if (master_id >= masterIds.size())
433 fatal("Invalid master_id passed to getMasterName()\n");
434
435 return masterIds[master_id];
436}
437
438const char *System::MemoryModeStrings[3] = {"invalid", "atomic",
439 "timing"};
440
441System *
442SystemParams::create()
443{
444 return new System(this);
445}