pseudo_inst.cc (5505:90d6811d5ea6) | pseudo_inst.cc (5529:9ae69b9cd7fd) |
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1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 21 unchanged lines hidden (view full) --- 30 31#include <errno.h> 32#include <fcntl.h> 33#include <unistd.h> 34 35#include <fstream> 36#include <string> 37 | 1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 21 unchanged lines hidden (view full) --- 30 31#include <errno.h> 32#include <fcntl.h> 33#include <unistd.h> 34 35#include <fstream> 36#include <string> 37 |
38#include "arch/kernel_stats.hh" |
|
38#include "arch/vtophys.hh" 39#include "base/annotate.hh" 40#include "cpu/base.hh" 41#include "cpu/thread_context.hh" 42#include "cpu/quiesce_event.hh" | 39#include "arch/vtophys.hh" 40#include "base/annotate.hh" 41#include "cpu/base.hh" 42#include "cpu/thread_context.hh" 43#include "cpu/quiesce_event.hh" |
43#include "arch/kernel_stats.hh" | 44#include "params/BaseCPU.hh" |
44#include "sim/pseudo_inst.hh" 45#include "sim/serialize.hh" 46#include "sim/sim_exit.hh" 47#include "sim/stat_control.hh" 48#include "sim/stats.hh" 49#include "sim/system.hh" 50#include "sim/debug.hh" 51#include "sim/vptr.hh" --- 10 unchanged lines hidden (view full) --- 62{ 63 if (tc->getKernelStats()) 64 tc->getKernelStats()->arm(); 65} 66 67void 68quiesce(ThreadContext *tc) 69{ | 45#include "sim/pseudo_inst.hh" 46#include "sim/serialize.hh" 47#include "sim/sim_exit.hh" 48#include "sim/stat_control.hh" 49#include "sim/stats.hh" 50#include "sim/system.hh" 51#include "sim/debug.hh" 52#include "sim/vptr.hh" --- 10 unchanged lines hidden (view full) --- 63{ 64 if (tc->getKernelStats()) 65 tc->getKernelStats()->arm(); 66} 67 68void 69quiesce(ThreadContext *tc) 70{ |
70 if (!tc->getCpuPtr()->params->do_quiesce) | 71 if (!tc->getCpuPtr()->params()->do_quiesce) |
71 return; 72 73 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name()); 74 75 tc->suspend(); 76 if (tc->getKernelStats()) 77 tc->getKernelStats()->quiesce(); 78} 79 80void 81quiesceNs(ThreadContext *tc, uint64_t ns) 82{ | 72 return; 73 74 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name()); 75 76 tc->suspend(); 77 if (tc->getKernelStats()) 78 tc->getKernelStats()->quiesce(); 79} 80 81void 82quiesceNs(ThreadContext *tc, uint64_t ns) 83{ |
83 if (!tc->getCpuPtr()->params->do_quiesce || ns == 0) | 84 if (!tc->getCpuPtr()->params()->do_quiesce || ns == 0) |
84 return; 85 86 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 87 88 Tick resume = curTick + Clock::Int::ns * ns; 89 90 quiesceEvent->reschedule(resume, true); 91 92 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n", 93 tc->getCpuPtr()->name(), ns, resume); 94 95 tc->suspend(); 96 if (tc->getKernelStats()) 97 tc->getKernelStats()->quiesce(); 98} 99 100void 101quiesceCycles(ThreadContext *tc, uint64_t cycles) 102{ | 85 return; 86 87 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 88 89 Tick resume = curTick + Clock::Int::ns * ns; 90 91 quiesceEvent->reschedule(resume, true); 92 93 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n", 94 tc->getCpuPtr()->name(), ns, resume); 95 96 tc->suspend(); 97 if (tc->getKernelStats()) 98 tc->getKernelStats()->quiesce(); 99} 100 101void 102quiesceCycles(ThreadContext *tc, uint64_t cycles) 103{ |
103 if (!tc->getCpuPtr()->params->do_quiesce || cycles == 0) | 104 if (!tc->getCpuPtr()->params()->do_quiesce || cycles == 0) |
104 return; 105 106 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 107 108 Tick resume = curTick + tc->getCpuPtr()->ticks(cycles); 109 110 quiesceEvent->reschedule(resume, true); 111 --- 64 unchanged lines hidden (view full) --- 176 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 177 } 178 file.close(); 179} 180 181void 182resetstats(ThreadContext *tc, Tick delay, Tick period) 183{ | 105 return; 106 107 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 108 109 Tick resume = curTick + tc->getCpuPtr()->ticks(cycles); 110 111 quiesceEvent->reschedule(resume, true); 112 --- 64 unchanged lines hidden (view full) --- 177 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 178 } 179 file.close(); 180} 181 182void 183resetstats(ThreadContext *tc, Tick delay, Tick period) 184{ |
184 if (!tc->getCpuPtr()->params->do_statistics_insts) | 185 if (!tc->getCpuPtr()->params()->do_statistics_insts) |
185 return; 186 187 188 Tick when = curTick + delay * Clock::Int::ns; 189 Tick repeat = period * Clock::Int::ns; 190 191 Stats::StatEvent(false, true, when, repeat); 192} 193 194void 195dumpstats(ThreadContext *tc, Tick delay, Tick period) 196{ | 186 return; 187 188 189 Tick when = curTick + delay * Clock::Int::ns; 190 Tick repeat = period * Clock::Int::ns; 191 192 Stats::StatEvent(false, true, when, repeat); 193} 194 195void 196dumpstats(ThreadContext *tc, Tick delay, Tick period) 197{ |
197 if (!tc->getCpuPtr()->params->do_statistics_insts) | 198 if (!tc->getCpuPtr()->params()->do_statistics_insts) |
198 return; 199 200 201 Tick when = curTick + delay * Clock::Int::ns; 202 Tick repeat = period * Clock::Int::ns; 203 204 Stats::StatEvent(true, false, when, repeat); 205} --- 8 unchanged lines hidden (view full) --- 214 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 215 216 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 217} 218 219void 220dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 221{ | 199 return; 200 201 202 Tick when = curTick + delay * Clock::Int::ns; 203 Tick repeat = period * Clock::Int::ns; 204 205 Stats::StatEvent(true, false, when, repeat); 206} --- 8 unchanged lines hidden (view full) --- 215 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 216 217 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 218} 219 220void 221dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 222{ |
222 if (!tc->getCpuPtr()->params->do_statistics_insts) | 223 if (!tc->getCpuPtr()->params()->do_statistics_insts) |
223 return; 224 225 226 Tick when = curTick + delay * Clock::Int::ns; 227 Tick repeat = period * Clock::Int::ns; 228 229 Stats::StatEvent(true, true, when, repeat); 230} 231 232void 233m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 234{ | 224 return; 225 226 227 Tick when = curTick + delay * Clock::Int::ns; 228 Tick repeat = period * Clock::Int::ns; 229 230 Stats::StatEvent(true, true, when, repeat); 231} 232 233void 234m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 235{ |
235 if (!tc->getCpuPtr()->params->do_checkpoint_insts) | 236 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) |
236 return; 237 238 Tick when = curTick + delay * Clock::Int::ns; 239 Tick repeat = period * Clock::Int::ns; 240 241 schedExitSimLoop("checkpoint", when, repeat); 242} 243 --- 48 unchanged lines hidden --- | 237 return; 238 239 Tick when = curTick + delay * Clock::Int::ns; 240 Tick repeat = period * Clock::Int::ns; 241 242 schedExitSimLoop("checkpoint", when, repeat); 243} 244 --- 48 unchanged lines hidden --- |