pseudo_inst.cc (2840:227f7c4f8c81) | pseudo_inst.cc (2841:d874ac38161c) |
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1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 193 unchanged lines hidden (view full) --- 202 SetupEvent(Dump|Reset, when, repeat); 203 } 204 205 void 206 m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 207 { 208 if (!doCheckpointInsts) 209 return; | 1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 193 unchanged lines hidden (view full) --- 202 SetupEvent(Dump|Reset, when, repeat); 203 } 204 205 void 206 m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 207 { 208 if (!doCheckpointInsts) 209 return; |
210 exitSimLoop("checkpoint"); |
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210 } 211 212 uint64_t 213 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 214 { 215 const string &file = tc->getCpuPtr()->system->params()->readfile; 216 if (file.empty()) { 217 return ULL(0); --- 55 unchanged lines hidden (view full) --- 273 274 void debugbreak(ThreadContext *tc) 275 { 276 debug_break(); 277 } 278 279 void switchcpu(ThreadContext *tc) 280 { | 211 } 212 213 uint64_t 214 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 215 { 216 const string &file = tc->getCpuPtr()->system->params()->readfile; 217 if (file.empty()) { 218 return ULL(0); --- 55 unchanged lines hidden (view full) --- 274 275 void debugbreak(ThreadContext *tc) 276 { 277 debug_break(); 278 } 279 280 void switchcpu(ThreadContext *tc) 281 { |
282 exitSimLoop("switchcpu"); |
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281 } 282} | 283 } 284} |