pseudo_inst.cc (12145:9079b93ac9d4) pseudo_inst.cc (12158:c66cf095928d)
1/*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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46#include <fcntl.h>
47#include <unistd.h>
48
49#include <cerrno>
50#include <fstream>
51#include <string>
52#include <vector>
53
1/*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 37 unchanged lines hidden (view full) ---

46#include <fcntl.h>
47#include <unistd.h>
48
49#include <cerrno>
50#include <fstream>
51#include <string>
52#include <vector>
53
54#include <gem5/asm/generic/m5ops.h>
55
54#include "arch/kernel_stats.hh"
55#include "arch/pseudo_inst.hh"
56#include "arch/utility.hh"
57#include "arch/vtophys.hh"
58#include "base/debug.hh"
59#include "base/output.hh"
60#include "config/the_isa.hh"
61#include "cpu/base.hh"

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104 // from getArgument, it'd most likely break.
105 int arg_num(0);
106 for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) {
107 args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false);
108 ++arg_num;
109 }
110
111 switch (func) {
56#include "arch/kernel_stats.hh"
57#include "arch/pseudo_inst.hh"
58#include "arch/utility.hh"
59#include "arch/vtophys.hh"
60#include "base/debug.hh"
61#include "base/output.hh"
62#include "config/the_isa.hh"
63#include "cpu/base.hh"

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106 // from getArgument, it'd most likely break.
107 int arg_num(0);
108 for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) {
109 args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false);
110 ++arg_num;
111 }
112
113 switch (func) {
112 case 0x00: // arm_func
114 case M5OP_ARM:
113 arm(tc);
114 break;
115
115 arm(tc);
116 break;
117
116 case 0x01: // quiesce_func
118 case M5OP_QUIESCE:
117 quiesce(tc);
118 break;
119
119 quiesce(tc);
120 break;
121
120 case 0x02: // quiescens_func
121 quiesceSkip(tc);
122 case M5OP_QUIESCE_NS:
123 quiesceNs(tc, args[0]);
122 break;
123
124 break;
125
124 case 0x03: // quiescecycle_func
125 quiesceNs(tc, args[0]);
126 case M5OP_QUIESCE_CYCLE:
127 quiesceCycles(tc, args[0]);
126 break;
127
128 break;
129
128 case 0x04: // quiescetime_func
130 case M5OP_QUIESCE_TIME:
129 return quiesceTime(tc);
130
131 return quiesceTime(tc);
132
131 case 0x07: // rpns_func
133 case M5OP_RPNS:
132 return rpns(tc);
133
134 return rpns(tc);
135
134 case 0x09: // wakecpu_func
136 case M5OP_WAKE_CPU:
135 wakeCPU(tc, args[0]);
136 break;
137
137 wakeCPU(tc, args[0]);
138 break;
139
138 case 0x21: // exit_func
140 case M5OP_EXIT:
139 m5exit(tc, args[0]);
140 break;
141
141 m5exit(tc, args[0]);
142 break;
143
142 case 0x22:
144 case M5OP_FAIL:
143 m5fail(tc, args[0], args[1]);
144 break;
145
145 m5fail(tc, args[0], args[1]);
146 break;
147
146 case 0x30: // initparam_func
148 case M5OP_INIT_PARAM:
147 return initParam(tc, args[0], args[1]);
148
149 return initParam(tc, args[0], args[1]);
150
149 case 0x31: // loadsymbol_func
151 case M5OP_LOAD_SYMBOL:
150 loadsymbol(tc);
151 break;
152
152 loadsymbol(tc);
153 break;
154
153 case 0x40: // resetstats_func
155 case M5OP_RESET_STATS:
154 resetstats(tc, args[0], args[1]);
155 break;
156
156 resetstats(tc, args[0], args[1]);
157 break;
158
157 case 0x41: // dumpstats_func
159 case M5OP_DUMP_STATS:
158 dumpstats(tc, args[0], args[1]);
159 break;
160
160 dumpstats(tc, args[0], args[1]);
161 break;
162
161 case 0x42: // dumprststats_func
163 case M5OP_DUMP_RESET_STATS:
162 dumpresetstats(tc, args[0], args[1]);
163 break;
164
164 dumpresetstats(tc, args[0], args[1]);
165 break;
166
165 case 0x43: // ckpt_func
167 case M5OP_CHECKPOINT:
166 m5checkpoint(tc, args[0], args[1]);
167 break;
168
168 m5checkpoint(tc, args[0], args[1]);
169 break;
170
169 case 0x4f: // writefile_func
171 case M5OP_WRITE_FILE:
170 return writefile(tc, args[0], args[1], args[2], args[3]);
171
172 return writefile(tc, args[0], args[1], args[2], args[3]);
173
172 case 0x50: // readfile_func
174 case M5OP_READ_FILE:
173 return readfile(tc, args[0], args[1], args[2]);
174
175 return readfile(tc, args[0], args[1], args[2]);
176
175 case 0x51: // debugbreak_func
177 case M5OP_DEBUG_BREAK:
176 debugbreak(tc);
177 break;
178
178 debugbreak(tc);
179 break;
180
179 case 0x52: // switchcpu_func
181 case M5OP_SWITCH_CPU:
180 switchcpu(tc);
181 break;
182
182 switchcpu(tc);
183 break;
184
183 case 0x53: // addsymbol_func
185 case M5OP_ADD_SYMBOL:
184 addsymbol(tc, args[0], args[1]);
185 break;
186
186 addsymbol(tc, args[0], args[1]);
187 break;
188
187 case 0x54: // panic_func
189 case M5OP_PANIC:
188 panic("M5 panic instruction called at %s\n", tc->pcState());
189
190 panic("M5 panic instruction called at %s\n", tc->pcState());
191
190 case 0x5a: // work_begin_func
192 case M5OP_WORK_BEGIN:
191 workbegin(tc, args[0], args[1]);
192 break;
193
193 workbegin(tc, args[0], args[1]);
194 break;
195
194 case 0x5b: // work_end_func
196 case M5OP_WORK_END:
195 workend(tc, args[0], args[1]);
196 break;
197
197 workend(tc, args[0], args[1]);
198 break;
199
198 case 0x55: // annotate_func
199 case 0x56: // reserved2_func
200 case 0x57: // reserved3_func
201 case 0x58: // reserved4_func
202 case 0x59: // reserved5_func
200 case M5OP_ANNOTATE:
201 case M5OP_RESERVED2:
202 case M5OP_RESERVED3:
203 case M5OP_RESERVED4:
204 case M5OP_RESERVED5:
203 warn("Unimplemented m5 op (0x%x)\n", func);
204 break;
205
206 /* SE mode functions */
205 warn("Unimplemented m5 op (0x%x)\n", func);
206 break;
207
208 /* SE mode functions */
207 case 0x60: // syscall_func
209 case M5OP_SE_SYSCALL:
208 m5Syscall(tc);
209 break;
210
210 m5Syscall(tc);
211 break;
212
211 case 0x61: // pagefault_func
213 case M5OP_SE_PAGE_FAULT:
212 m5PageFault(tc);
213 break;
214
215 /* dist-gem5 functions */
214 m5PageFault(tc);
215 break;
216
217 /* dist-gem5 functions */
216 case 0x62: // distToggleSync_func
218 case M5OP_DIST_TOGGLE_SYNC:
217 togglesync(tc);
218 break;
219
220 default:
221 warn("Unhandled m5 op: 0x%x\n", func);
222 break;
223 }
224

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219 togglesync(tc);
220 break;
221
222 default:
223 warn("Unhandled m5 op: 0x%x\n", func);
224 break;
225 }
226

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