1/* 2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 39 unchanged lines hidden (view full) --- 48 49#include <cerrno> 50#include <fstream> 51#include <string> 52#include <vector> 53 54#include <gem5/asm/generic/m5ops.h> 55 |
56#include "arch/pseudo_inst.hh" 57#include "arch/utility.hh" 58#include "arch/vtophys.hh" 59#include "base/debug.hh" 60#include "base/output.hh" 61#include "config/the_isa.hh" 62#include "cpu/base.hh" 63#include "cpu/quiesce_event.hh" 64#include "cpu/thread_context.hh" 65#include "debug/Loader.hh" 66#include "debug/PseudoInst.hh" 67#include "debug/Quiesce.hh" 68#include "debug/WorkItems.hh" 69#include "dev/net/dist_iface.hh" |
70#include "kern/kernel_stats.hh" |
71#include "params/BaseCPU.hh" 72#include "sim/full_system.hh" 73#include "sim/initparam_keys.hh" 74#include "sim/process.hh" 75#include "sim/serialize.hh" 76#include "sim/sim_events.hh" 77#include "sim/sim_exit.hh" 78#include "sim/stat_control.hh" --- 641 unchanged lines hidden --- |