1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31#include <errno.h>
32#include <fcntl.h>
33#include <unistd.h>
34
35#include <fstream>
36#include <string>
37
38#include "arch/kernel_stats.hh"
39#include "arch/vtophys.hh"
40#include "base/annotate.hh"
41#include "cpu/base.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/quiesce_event.hh"
44#include "params/BaseCPU.hh"
45#include "sim/pseudo_inst.hh"
46#include "sim/serialize.hh"
47#include "sim/sim_events.hh"
48#include "sim/sim_exit.hh"
49#include "sim/stat_control.hh"
50#include "sim/stats.hh"
51#include "sim/system.hh"
52#include "sim/debug.hh"
| 1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31#include <errno.h>
32#include <fcntl.h>
33#include <unistd.h>
34
35#include <fstream>
36#include <string>
37
38#include "arch/kernel_stats.hh"
39#include "arch/vtophys.hh"
40#include "base/annotate.hh"
41#include "cpu/base.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/quiesce_event.hh"
44#include "params/BaseCPU.hh"
45#include "sim/pseudo_inst.hh"
46#include "sim/serialize.hh"
47#include "sim/sim_events.hh"
48#include "sim/sim_exit.hh"
49#include "sim/stat_control.hh"
50#include "sim/stats.hh"
51#include "sim/system.hh"
52#include "sim/debug.hh"
|
| 53#if FULL_SYSTEM
|
53#include "sim/vptr.hh"
| 54#include "sim/vptr.hh"
|
| 55#endif
|
54
55using namespace std;
56
57using namespace Stats;
58using namespace TheISA;
59
60namespace PseudoInst {
61
| 56
57using namespace std;
58
59using namespace Stats;
60using namespace TheISA;
61
62namespace PseudoInst {
63
|
| 64#if FULL_SYSTEM
65
|
62void
63arm(ThreadContext *tc)
64{
65 if (tc->getKernelStats())
66 tc->getKernelStats()->arm();
67}
68
69void
70quiesce(ThreadContext *tc)
71{
72 if (!tc->getCpuPtr()->params()->do_quiesce)
73 return;
74
75 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
76
77 tc->suspend();
78 if (tc->getKernelStats())
79 tc->getKernelStats()->quiesce();
80}
81
82void
83quiesceNs(ThreadContext *tc, uint64_t ns)
84{
85 if (!tc->getCpuPtr()->params()->do_quiesce || ns == 0)
86 return;
87
88 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
89
90 Tick resume = curTick + Clock::Int::ns * ns;
91
92 mainEventQueue.reschedule(quiesceEvent, resume, true);
93
94 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
95 tc->getCpuPtr()->name(), ns, resume);
96
97 tc->suspend();
98 if (tc->getKernelStats())
99 tc->getKernelStats()->quiesce();
100}
101
102void
103quiesceCycles(ThreadContext *tc, uint64_t cycles)
104{
105 if (!tc->getCpuPtr()->params()->do_quiesce || cycles == 0)
106 return;
107
108 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
109
110 Tick resume = curTick + tc->getCpuPtr()->ticks(cycles);
111
112 mainEventQueue.reschedule(quiesceEvent, resume, true);
113
114 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
115 tc->getCpuPtr()->name(), cycles, resume);
116
117 tc->suspend();
118 if (tc->getKernelStats())
119 tc->getKernelStats()->quiesce();
120}
121
122uint64_t
123quiesceTime(ThreadContext *tc)
124{
125 return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns;
126}
127
| 66void
67arm(ThreadContext *tc)
68{
69 if (tc->getKernelStats())
70 tc->getKernelStats()->arm();
71}
72
73void
74quiesce(ThreadContext *tc)
75{
76 if (!tc->getCpuPtr()->params()->do_quiesce)
77 return;
78
79 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
80
81 tc->suspend();
82 if (tc->getKernelStats())
83 tc->getKernelStats()->quiesce();
84}
85
86void
87quiesceNs(ThreadContext *tc, uint64_t ns)
88{
89 if (!tc->getCpuPtr()->params()->do_quiesce || ns == 0)
90 return;
91
92 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
93
94 Tick resume = curTick + Clock::Int::ns * ns;
95
96 mainEventQueue.reschedule(quiesceEvent, resume, true);
97
98 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
99 tc->getCpuPtr()->name(), ns, resume);
100
101 tc->suspend();
102 if (tc->getKernelStats())
103 tc->getKernelStats()->quiesce();
104}
105
106void
107quiesceCycles(ThreadContext *tc, uint64_t cycles)
108{
109 if (!tc->getCpuPtr()->params()->do_quiesce || cycles == 0)
110 return;
111
112 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
113
114 Tick resume = curTick + tc->getCpuPtr()->ticks(cycles);
115
116 mainEventQueue.reschedule(quiesceEvent, resume, true);
117
118 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
119 tc->getCpuPtr()->name(), cycles, resume);
120
121 tc->suspend();
122 if (tc->getKernelStats())
123 tc->getKernelStats()->quiesce();
124}
125
126uint64_t
127quiesceTime(ThreadContext *tc)
128{
129 return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns;
130}
131
|
| 132#endif
133
|
128uint64_t
129rpns(ThreadContext *tc)
130{
131 return curTick / Clock::Int::ns;
132}
133
134void
135m5exit(ThreadContext *tc, Tick delay)
136{
137 Tick when = curTick + delay * Clock::Int::ns;
138 Event *event = new SimLoopExitEvent("m5_exit instruction encountered", 0);
139 mainEventQueue.schedule(event, when);
140}
141
| 134uint64_t
135rpns(ThreadContext *tc)
136{
137 return curTick / Clock::Int::ns;
138}
139
140void
141m5exit(ThreadContext *tc, Tick delay)
142{
143 Tick when = curTick + delay * Clock::Int::ns;
144 Event *event = new SimLoopExitEvent("m5_exit instruction encountered", 0);
145 mainEventQueue.schedule(event, when);
146}
147
|
| 148#if FULL_SYSTEM
149
|
142void
143loadsymbol(ThreadContext *tc)
144{
145 const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
146 if (filename.empty()) {
147 return;
148 }
149
150 std::string buffer;
151 ifstream file(filename.c_str());
152
153 if (!file)
154 fatal("file error: Can't open symbol table file %s\n", filename);
155
156 while (!file.eof()) {
157 getline(file, buffer);
158
159 if (buffer.empty())
160 continue;
161
162 int idx = buffer.find(' ');
163 if (idx == string::npos)
164 continue;
165
166 string address = "0x" + buffer.substr(0, idx);
167 eat_white(address);
168 if (address.empty())
169 continue;
170
171 // Skip over letter and space
172 string symbol = buffer.substr(idx + 3);
173 eat_white(symbol);
174 if (symbol.empty())
175 continue;
176
177 Addr addr;
178 if (!to_number(address, addr))
179 continue;
180
181 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
182 continue;
183
184
185 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
186 }
187 file.close();
188}
189
190void
| 150void
151loadsymbol(ThreadContext *tc)
152{
153 const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
154 if (filename.empty()) {
155 return;
156 }
157
158 std::string buffer;
159 ifstream file(filename.c_str());
160
161 if (!file)
162 fatal("file error: Can't open symbol table file %s\n", filename);
163
164 while (!file.eof()) {
165 getline(file, buffer);
166
167 if (buffer.empty())
168 continue;
169
170 int idx = buffer.find(' ');
171 if (idx == string::npos)
172 continue;
173
174 string address = "0x" + buffer.substr(0, idx);
175 eat_white(address);
176 if (address.empty())
177 continue;
178
179 // Skip over letter and space
180 string symbol = buffer.substr(idx + 3);
181 eat_white(symbol);
182 if (symbol.empty())
183 continue;
184
185 Addr addr;
186 if (!to_number(address, addr))
187 continue;
188
189 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
190 continue;
191
192
193 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
194 }
195 file.close();
196}
197
198void
|
| 199addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
200{
201 char symb[100];
202 CopyStringOut(tc, symb, symbolAddr, 100);
203 std::string symbol(symb);
204
205 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
206
207 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
208}
209
210#endif
211
212
213void
|
191resetstats(ThreadContext *tc, Tick delay, Tick period)
192{
193 if (!tc->getCpuPtr()->params()->do_statistics_insts)
194 return;
195
196
197 Tick when = curTick + delay * Clock::Int::ns;
198 Tick repeat = period * Clock::Int::ns;
199
200 Stats::StatEvent(false, true, when, repeat);
201}
202
203void
204dumpstats(ThreadContext *tc, Tick delay, Tick period)
205{
206 if (!tc->getCpuPtr()->params()->do_statistics_insts)
207 return;
208
209
210 Tick when = curTick + delay * Clock::Int::ns;
211 Tick repeat = period * Clock::Int::ns;
212
213 Stats::StatEvent(true, false, when, repeat);
214}
215
216void
| 214resetstats(ThreadContext *tc, Tick delay, Tick period)
215{
216 if (!tc->getCpuPtr()->params()->do_statistics_insts)
217 return;
218
219
220 Tick when = curTick + delay * Clock::Int::ns;
221 Tick repeat = period * Clock::Int::ns;
222
223 Stats::StatEvent(false, true, when, repeat);
224}
225
226void
227dumpstats(ThreadContext *tc, Tick delay, Tick period)
228{
229 if (!tc->getCpuPtr()->params()->do_statistics_insts)
230 return;
231
232
233 Tick when = curTick + delay * Clock::Int::ns;
234 Tick repeat = period * Clock::Int::ns;
235
236 Stats::StatEvent(true, false, when, repeat);
237}
238
239void
|
217addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
218{
219 char symb[100];
220 CopyStringOut(tc, symb, symbolAddr, 100);
221 std::string symbol(symb);
222
223 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
224
225 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
226}
227
228void
| |
229dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
230{
231 if (!tc->getCpuPtr()->params()->do_statistics_insts)
232 return;
233
234
235 Tick when = curTick + delay * Clock::Int::ns;
236 Tick repeat = period * Clock::Int::ns;
237
238 Stats::StatEvent(true, true, when, repeat);
239}
240
241void
242m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
243{
244 if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
245 return;
246
247 Tick when = curTick + delay * Clock::Int::ns;
248 Tick repeat = period * Clock::Int::ns;
249
250 Event *event = new SimLoopExitEvent("checkpoint", 0, repeat);
251 mainEventQueue.schedule(event, when);
252}
253
| 240dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
241{
242 if (!tc->getCpuPtr()->params()->do_statistics_insts)
243 return;
244
245
246 Tick when = curTick + delay * Clock::Int::ns;
247 Tick repeat = period * Clock::Int::ns;
248
249 Stats::StatEvent(true, true, when, repeat);
250}
251
252void
253m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
254{
255 if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
256 return;
257
258 Tick when = curTick + delay * Clock::Int::ns;
259 Tick repeat = period * Clock::Int::ns;
260
261 Event *event = new SimLoopExitEvent("checkpoint", 0, repeat);
262 mainEventQueue.schedule(event, when);
263}
264
|
| 265#if FULL_SYSTEM
266
|
254uint64_t
255readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
256{
257 const string &file = tc->getSystemPtr()->params()->readfile;
258 if (file.empty()) {
259 return ULL(0);
260 }
261
262 uint64_t result = 0;
263
264 int fd = ::open(file.c_str(), O_RDONLY, 0);
265 if (fd < 0)
266 panic("could not open file %s\n", file);
267
268 if (::lseek(fd, offset, SEEK_SET) < 0)
269 panic("could not seek: %s", strerror(errno));
270
271 char *buf = new char[len];
272 char *p = buf;
273 while (len > 0) {
274 int bytes = ::read(fd, p, len);
275 if (bytes <= 0)
276 break;
277
278 p += bytes;
279 result += bytes;
280 len -= bytes;
281 }
282
283 close(fd);
284 CopyIn(tc, vaddr, buf, result);
285 delete [] buf;
286 return result;
287}
288
| 267uint64_t
268readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
269{
270 const string &file = tc->getSystemPtr()->params()->readfile;
271 if (file.empty()) {
272 return ULL(0);
273 }
274
275 uint64_t result = 0;
276
277 int fd = ::open(file.c_str(), O_RDONLY, 0);
278 if (fd < 0)
279 panic("could not open file %s\n", file);
280
281 if (::lseek(fd, offset, SEEK_SET) < 0)
282 panic("could not seek: %s", strerror(errno));
283
284 char *buf = new char[len];
285 char *p = buf;
286 while (len > 0) {
287 int bytes = ::read(fd, p, len);
288 if (bytes <= 0)
289 break;
290
291 p += bytes;
292 result += bytes;
293 len -= bytes;
294 }
295
296 close(fd);
297 CopyIn(tc, vaddr, buf, result);
298 delete [] buf;
299 return result;
300}
301
|
| 302#endif
303
|
289void
290debugbreak(ThreadContext *tc)
291{
292 debug_break();
293}
294
295void
296switchcpu(ThreadContext *tc)
297{
298 exitSimLoop("switchcpu");
299}
300
301/* namespace PseudoInst */ }
| 304void
305debugbreak(ThreadContext *tc)
306{
307 debug_break();
308}
309
310void
311switchcpu(ThreadContext *tc)
312{
313 exitSimLoop("switchcpu");
314}
315
316/* namespace PseudoInst */ }
|