1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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45#include "sim/pseudo_inst.hh"
46#include "sim/serialize.hh"
47#include "sim/sim_events.hh"
48#include "sim/sim_exit.hh"
49#include "sim/stat_control.hh"
50#include "sim/stats.hh"
51#include "sim/system.hh"
52#include "sim/debug.hh"
53#if FULL_SYSTEM
54#include "sim/vptr.hh"
55#endif
56
57using namespace std;
58
59using namespace Stats;
60using namespace TheISA;
61
62namespace PseudoInst {
63
64#if FULL_SYSTEM
65
66void
67arm(ThreadContext *tc)
68{
69 if (tc->getKernelStats())
70 tc->getKernelStats()->arm();
71}
72
73void

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124}
125
126uint64_t
127quiesceTime(ThreadContext *tc)
128{
129 return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns;
130}
131
132#endif
133
134uint64_t
135rpns(ThreadContext *tc)
136{
137 return curTick / Clock::Int::ns;
138}
139
140void
141m5exit(ThreadContext *tc, Tick delay)
142{
143 Tick when = curTick + delay * Clock::Int::ns;
144 Event *event = new SimLoopExitEvent("m5_exit instruction encountered", 0);
145 mainEventQueue.schedule(event, when);
146}
147
148#if FULL_SYSTEM
149
150void
151loadsymbol(ThreadContext *tc)
152{
153 const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
154 if (filename.empty()) {
155 return;
156 }
157

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191
192
193 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
194 }
195 file.close();
196}
197
198void
199addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
200{
201 char symb[100];
202 CopyStringOut(tc, symb, symbolAddr, 100);
203 std::string symbol(symb);
204
205 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
206
207 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
208}
209
210#endif
211
212
213void
214resetstats(ThreadContext *tc, Tick delay, Tick period)
215{
216 if (!tc->getCpuPtr()->params()->do_statistics_insts)
217 return;
218
219
220 Tick when = curTick + delay * Clock::Int::ns;
221 Tick repeat = period * Clock::Int::ns;

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232
233 Tick when = curTick + delay * Clock::Int::ns;
234 Tick repeat = period * Clock::Int::ns;
235
236 Stats::StatEvent(true, false, when, repeat);
237}
238
239void
240dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
241{
242 if (!tc->getCpuPtr()->params()->do_statistics_insts)
243 return;
244
245
246 Tick when = curTick + delay * Clock::Int::ns;
247 Tick repeat = period * Clock::Int::ns;

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257
258 Tick when = curTick + delay * Clock::Int::ns;
259 Tick repeat = period * Clock::Int::ns;
260
261 Event *event = new SimLoopExitEvent("checkpoint", 0, repeat);
262 mainEventQueue.schedule(event, when);
263}
264
265#if FULL_SYSTEM
266
267uint64_t
268readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
269{
270 const string &file = tc->getSystemPtr()->params()->readfile;
271 if (file.empty()) {
272 return ULL(0);
273 }
274

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294 }
295
296 close(fd);
297 CopyIn(tc, vaddr, buf, result);
298 delete [] buf;
299 return result;
300}
301
302#endif
303
304void
305debugbreak(ThreadContext *tc)
306{
307 debug_break();
308}
309
310void
311switchcpu(ThreadContext *tc)
312{
313 exitSimLoop("switchcpu");
314}
315
316/* namespace PseudoInst */ }