SConscript (11854:0e94e16e26ea) SConscript (11856:103e2f92c965)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 64 unchanged lines hidden (view full) ---

73Source('mathexpr.cc')
74
75if env['TARGET_ISA'] != 'null':
76 SimObject('InstTracer.py')
77 SimObject('Process.py')
78 Source('aux_vector.cc')
79 Source('faults.cc')
80 Source('process.cc')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 64 unchanged lines hidden (view full) ---

73Source('mathexpr.cc')
74
75if env['TARGET_ISA'] != 'null':
76 SimObject('InstTracer.py')
77 SimObject('Process.py')
78 Source('aux_vector.cc')
79 Source('faults.cc')
80 Source('process.cc')
81 Source('fd_array.cc')
81 Source('fd_entry.cc')
82 Source('pseudo_inst.cc')
83 Source('syscall_emul.cc')
84 Source('syscall_desc.cc')
85
86if env['TARGET_ISA'] != 'x86':
87 Source('microcode_rom.cc')
88

--- 25 unchanged lines hidden --- 		82 Source('fd_entry.cc')
83 Source('pseudo_inst.cc')
84 Source('syscall_emul.cc')
85 Source('syscall_desc.cc')
86
87if env['TARGET_ISA'] != 'x86':
88 Source('microcode_rom.cc')
89

--- 25 unchanged lines hidden ---