SConscript (11800:54436a1784dc) | SConscript (11854:0e94e16e26ea) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 61 unchanged lines hidden (view full) --- 70Source('system.cc') 71Source('dvfs_handler.cc') 72Source('clocked_object.cc') 73Source('mathexpr.cc') 74 75if env['TARGET_ISA'] != 'null': 76 SimObject('InstTracer.py') 77 SimObject('Process.py') | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 61 unchanged lines hidden (view full) --- 70Source('system.cc') 71Source('dvfs_handler.cc') 72Source('clocked_object.cc') 73Source('mathexpr.cc') 74 75if env['TARGET_ISA'] != 'null': 76 SimObject('InstTracer.py') 77 SimObject('Process.py') |
78 Source('aux_vector.cc') |
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78 Source('faults.cc') 79 Source('process.cc') 80 Source('fd_entry.cc') 81 Source('pseudo_inst.cc') 82 Source('syscall_emul.cc') 83 Source('syscall_desc.cc') 84 85if env['TARGET_ISA'] != 'x86': --- 27 unchanged lines hidden --- | 79 Source('faults.cc') 80 Source('process.cc') 81 Source('fd_entry.cc') 82 Source('pseudo_inst.cc') 83 Source('syscall_emul.cc') 84 Source('syscall_desc.cc') 85 86if env['TARGET_ISA'] != 'x86': --- 27 unchanged lines hidden --- |