SConscript (11524:3101ce98c55c) | SConscript (11527:9007a9729815) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 56 unchanged lines hidden (view full) --- 65Source('stat_control.cc') 66Source('stat_register.cc', skip_no_python=True) 67Source('clock_domain.cc') 68Source('voltage_domain.cc') 69Source('linear_solver.cc') 70Source('system.cc') 71Source('dvfs_handler.cc') 72Source('clocked_object.cc') | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 56 unchanged lines hidden (view full) --- 65Source('stat_control.cc') 66Source('stat_register.cc', skip_no_python=True) 67Source('clock_domain.cc') 68Source('voltage_domain.cc') 69Source('linear_solver.cc') 70Source('system.cc') 71Source('dvfs_handler.cc') 72Source('clocked_object.cc') |
73Source('mathexpr.cc') |
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73 74if env['TARGET_ISA'] != 'null': 75 SimObject('InstTracer.py') 76 SimObject('Process.py') 77 Source('faults.cc') 78 Source('process.cc') 79 Source('fd_entry.cc') 80 Source('pseudo_inst.cc') --- 27 unchanged lines hidden --- | 74 75if env['TARGET_ISA'] != 'null': 76 SimObject('InstTracer.py') 77 SimObject('Process.py') 78 Source('faults.cc') 79 Source('process.cc') 80 Source('fd_entry.cc') 81 Source('pseudo_inst.cc') --- 27 unchanged lines hidden --- |