1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 20 unchanged lines hidden (view full) --- 29# Authors: Nathan Binkert 30 31Import('*') 32 33SimObject('BaseTLB.py') 34SimObject('ClockedObject.py') 35SimObject('Root.py') 36SimObject('InstTracer.py') |
37SimObject('ClockDomain.py') |
38 39Source('arguments.cc') 40Source('async.cc') 41Source('core.cc') 42Source('debug.cc') 43Source('eventq.cc') 44Source('init.cc') 45Source('main.cc', main=True, skip_lib=True) 46Source('root.cc') 47Source('serialize.cc') 48Source('drain.cc') 49Source('sim_events.cc') 50Source('sim_object.cc') 51Source('simulate.cc') 52Source('stat_control.cc') 53Source('syscall_emul.cc') |
54Source('clock_domain.cc') |
55 56if env['TARGET_ISA'] != 'no': 57 SimObject('Process.py') 58 SimObject('System.py') 59 Source('faults.cc') 60 Source('process.cc') 61 Source('pseudo_inst.cc') 62 Source('system.cc') --- 15 unchanged lines hidden (view full) --- 78DebugFlag('Stack') 79DebugFlag('SyscallVerbose') 80DebugFlag('TimeSync') 81DebugFlag('TLB') 82DebugFlag('Thread') 83DebugFlag('Timer') 84DebugFlag('VtoPhys') 85DebugFlag('WorkItems') |
86DebugFlag('ClockDomain') |