1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 24 unchanged lines hidden (view full) --- 33SimObject('BaseTLB.py') 34SimObject('ClockedObject.py') 35SimObject('TickedObject.py') 36SimObject('Root.py') 37SimObject('ClockDomain.py') 38SimObject('VoltageDomain.py') 39SimObject('System.py') 40SimObject('DVFSHandler.py') |
41SimObject('SubSystem.py') |
42 43Source('arguments.cc') 44Source('async.cc') 45Source('core.cc') 46Source('debug.cc') 47Source('eventq.cc') 48Source('global_event.cc') 49Source('init.cc') 50Source('main.cc', main=True, skip_lib=True) 51Source('root.cc') 52Source('serialize.cc') 53Source('drain.cc') 54Source('sim_events.cc') 55Source('sim_object.cc') |
56Source('sub_system.cc') |
57Source('ticked_object.cc') 58Source('simulate.cc') 59Source('stat_control.cc') 60Source('clock_domain.cc') 61Source('voltage_domain.cc') 62Source('system.cc') 63Source('dvfs_handler.cc') 64 --- 31 unchanged lines hidden --- |