RubyPort.hh (6899:f8057af86bf7) RubyPort.hh (6922:1620cffaa3b6)
1
2/*
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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32
33#include "mem/ruby/libruby.hh"
34#include <string>
35#include <assert.h>
36
37#include "mem/mem_object.hh"
38#include "mem/tport.hh"
39#include "mem/physical.hh"
1
2/*
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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32
33#include "mem/ruby/libruby.hh"
34#include <string>
35#include <assert.h>
36
37#include "mem/mem_object.hh"
38#include "mem/tport.hh"
39#include "mem/physical.hh"
40#include "mem/protocol/RequestStatus.hh"
40
41#include "params/RubyPort.hh"
42
43using namespace std;
44
45class MessageBuffer;
46class AbstractController;
47

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100 typedef RubyPortParams Params;
101 RubyPort(const Params *p);
102 virtual ~RubyPort() {}
103
104 void init();
105
106 Port *getPort(const std::string &if_name, int idx);
107
41
42#include "params/RubyPort.hh"
43
44using namespace std;
45
46class MessageBuffer;
47class AbstractController;
48

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101 typedef RubyPortParams Params;
102 RubyPort(const Params *p);
103 virtual ~RubyPort() {}
104
105 void init();
106
107 Port *getPort(const std::string &if_name, int idx);
108
108 virtual int64_t makeRequest(const RubyRequest & request) = 0;
109 virtual RequestStatus makeRequest(const RubyRequest & request) = 0;
109
110
110 void registerHitCallback(void (*hit_callback)(int64_t request_id)) {
111 //
112 // Can't assign hit_callback twice and by default it is set to the
113 // RubyPort's default callback function.
114 //
115 assert(m_hit_callback == ruby_hit_callback);
116 m_hit_callback = hit_callback;
117 }
118
119 //
120 // Called by the controller to give the sequencer a pointer.
121 // A pointer to the controller is needed for atomic support.
122 //
123 void setController(AbstractController* _cntrl) { m_controller = _cntrl; }
124
125protected:
126 const string m_name;
111 //
112 // Called by the controller to give the sequencer a pointer.
113 // A pointer to the controller is needed for atomic support.
114 //
115 void setController(AbstractController* _cntrl) { m_controller = _cntrl; }
116
117protected:
118 const string m_name;
127 void (*m_hit_callback)(int64_t);
119 void ruby_hit_callback(PacketPtr pkt);
120 void hit(PacketPtr pkt);
128
121
129 int64_t makeUniqueRequestID() {
130 // The request ID is generated by combining the port ID with a request count
131 // so that request IDs can be formed concurrently by multiple threads.
132 // IDs are formed as follows:
133 //
134 //
135 // 0 PortID Request Count
136 // +----+---------------+-----------------------------------------------------+
137 // | 63 | 62-48 | 47-0 |
138 // +----+---------------+-----------------------------------------------------+
139 //
140 //
141 // This limits the system to a maximum of 2^11 == 2048 components
142 // and 2^48 ~= 3x10^14 requests per component
143
144 int64_t id = (static_cast<uint64_t>(m_port_id) << 48) | m_request_cnt;
145 m_request_cnt++;
146 // assert((m_request_cnt & (1<<48)) == 0);
147 return id;
148 }
149
150 int m_version;
151 AbstractController* m_controller;
152 MessageBuffer* m_mandatory_q_ptr;
153 PioPort* pio_port;
154
122 int m_version;
123 AbstractController* m_controller;
124 MessageBuffer* m_mandatory_q_ptr;
125 PioPort* pio_port;
126
155 //
156 // The pending request map is protected so that the Sequencer can access it.
157 // This is a temporary fix until the libruby inteface is cleaned
158 //
159 struct RequestCookie {
160 Packet *pkt;
161 M5Port *m5Port;
162 RequestCookie(Packet *p, M5Port *m5p)
163 : pkt(p), m5Port(m5p)
164 {}
165 };
166
167 typedef std::map<int64_t, RequestCookie*> RequestMap;
168 static RequestMap pending_cpu_requests;
169
170private:
127private:
171 static uint16_t m_num_ports;
172 uint16_t m_port_id;
173 uint64_t m_request_cnt;
128 uint16_t m_port_id;
129 uint64_t m_request_cnt;
174
130
175 static void ruby_hit_callback(int64_t req_id);
176
177 M5Port* physMemPort;
178
179 PhysicalMemory* physmem;
180};
181
182#endif
131 M5Port* physMemPort;
132
133 PhysicalMemory* physmem;
134};
135
136#endif