RubyPort.hh (10875:60eb3fef9c2d) RubyPort.hh (10912:b99a6662d7c2)
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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188 private:
189 void addToRetryList(MemSlavePort * port)
190 {
191 if (std::find(retryList.begin(), retryList.end(), port) !=
192 retryList.end()) return;
193 retryList.push_back(port);
194 }
195
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 179 unchanged lines hidden (view full) ---

188 private:
189 void addToRetryList(MemSlavePort * port)
190 {
191 if (std::find(retryList.begin(), retryList.end(), port) !=
192 retryList.end()) return;
193 retryList.push_back(port);
194 }
195
196 unsigned int getChildDrainCount(DrainManager *dm);
197
198 PioMasterPort pioMasterPort;
199 PioSlavePort pioSlavePort;
200 MemMasterPort memMasterPort;
201 MemSlavePort memSlavePort;
202 unsigned int gotAddrRanges;
203
204 /** Vector of M5 Ports attached to this Ruby port. */
205 typedef std::vector<MemSlavePort *>::iterator CpuPortIter;

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196 PioMasterPort pioMasterPort;
197 PioSlavePort pioSlavePort;
198 MemMasterPort memMasterPort;
199 MemSlavePort memSlavePort;
200 unsigned int gotAddrRanges;
201
202 /** Vector of M5 Ports attached to this Ruby port. */
203 typedef std::vector<MemSlavePort *>::iterator CpuPortIter;

--- 13 unchanged lines hidden ---