RubyPort.cc (8532:8f27cf8971fe) | RubyPort.cc (8615:e66a566f2cfa) |
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1/* 2 * Copyright (c) 2009 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 12 unchanged lines hidden (view full) --- 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 | 1/* 2 * Copyright (c) 2009 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 12 unchanged lines hidden (view full) --- 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 |
29#include "config/the_isa.hh" 30#if THE_ISA == X86_ISA 31#include "arch/x86/insts/microldstop.hh" 32#endif // X86_ISA | |
33#include "cpu/testers/rubytest/RubyTester.hh" 34#include "debug/Ruby.hh" 35#include "mem/protocol/AccessPermission.hh" 36#include "mem/ruby/slicc_interface/AbstractController.hh" 37#include "mem/ruby/system/RubyPort.hh" 38#include "mem/physical.hh" 39 40RubyPort::RubyPort(const Params *p) --- 153 unchanged lines hidden (view full) --- 194 assert(ruby_port->pio_port != NULL); 195 DPRINTF(RubyPort, 196 "Request for address 0x%#x is assumed to be a pio request\n", 197 pkt->getAddr()); 198 199 return ruby_port->pio_port->sendTiming(pkt); 200 } 201 | 29#include "cpu/testers/rubytest/RubyTester.hh" 30#include "debug/Ruby.hh" 31#include "mem/protocol/AccessPermission.hh" 32#include "mem/ruby/slicc_interface/AbstractController.hh" 33#include "mem/ruby/system/RubyPort.hh" 34#include "mem/physical.hh" 35 36RubyPort::RubyPort(const Params *p) --- 153 unchanged lines hidden (view full) --- 190 assert(ruby_port->pio_port != NULL); 191 DPRINTF(RubyPort, 192 "Request for address 0x%#x is assumed to be a pio request\n", 193 pkt->getAddr()); 194 195 return ruby_port->pio_port->sendTiming(pkt); 196 } 197 |
202 // For DMA and CPU requests, translate them to ruby requests before 203 // sending them to our assigned ruby port. 204 RubyRequestType type = RubyRequestType_NULL; | 198 assert(Address(pkt->getAddr()).getOffset() + pkt->getSize() <= 199 RubySystem::getBlockSizeBytes()); |
205 | 200 |
206 // If valid, copy the pc to the ruby request 207 Addr pc = 0; 208 if (pkt->req->hasPC()) { 209 pc = pkt->req->getPC(); 210 } 211 212 if (pkt->isLLSC()) { 213 if (pkt->isWrite()) { 214 DPRINTF(RubyPort, "Issuing SC\n"); 215 type = RubyRequestType_Store_Conditional; 216 } else { 217 DPRINTF(RubyPort, "Issuing LL\n"); 218 assert(pkt->isRead()); 219 type = RubyRequestType_Load_Linked; 220 } 221 } else if (pkt->req->isLocked()) { 222 if (pkt->isWrite()) { 223 DPRINTF(RubyPort, "Issuing Locked RMW Write\n"); 224 type = RubyRequestType_Locked_RMW_Write; 225 } else { 226 DPRINTF(RubyPort, "Issuing Locked RMW Read\n"); 227 assert(pkt->isRead()); 228 type = RubyRequestType_Locked_RMW_Read; 229 } 230 } else { 231 if (pkt->isRead()) { 232 if (pkt->req->isInstFetch()) { 233 type = RubyRequestType_IFETCH; 234 } else { 235#if THE_ISA == X86_ISA 236 uint32_t flags = pkt->req->getFlags(); 237 bool storeCheck = flags & 238 (TheISA::StoreCheck << TheISA::FlagShift); 239#else 240 bool storeCheck = false; 241#endif // X86_ISA 242 if (storeCheck) { 243 type = RubyRequestType_RMW_Read; 244 } else { 245 type = RubyRequestType_LD; 246 } 247 } 248 } else if (pkt->isWrite()) { 249 // 250 // Note: M5 packets do not differentiate ST from RMW_Write 251 // 252 type = RubyRequestType_ST; 253 } else if (pkt->isFlush()) { 254 type = RubyRequestType_FLUSH; 255 } else { 256 panic("Unsupported ruby packet type\n"); 257 } 258 } 259 260 RubyRequest ruby_request(pkt->getAddr(), pkt->getPtr<uint8_t>(true), 261 pkt->getSize(), pc, type, 262 RubyAccessMode_Supervisor, pkt); 263 264 assert(ruby_request.m_PhysicalAddress.getOffset() + ruby_request.m_Size <= 265 RubySystem::getBlockSizeBytes()); 266 | |
267 // Submit the ruby request | 201 // Submit the ruby request |
268 RequestStatus requestStatus = ruby_port->makeRequest(ruby_request); | 202 RequestStatus requestStatus = ruby_port->makeRequest(pkt); |
269 270 // If the request successfully issued then we should return true. 271 // Otherwise, we need to delete the senderStatus we just created and return 272 // false. 273 if (requestStatus == RequestStatus_Issued) { 274 DPRINTF(RubyPort, "Request %#x issued\n", pkt->getAddr()); 275 return true; 276 } --- 400 unchanged lines hidden --- | 203 204 // If the request successfully issued then we should return true. 205 // Otherwise, we need to delete the senderStatus we just created and return 206 // false. 207 if (requestStatus == RequestStatus_Issued) { 208 DPRINTF(RubyPort, "Request %#x issued\n", pkt->getAddr()); 209 return true; 210 } --- 400 unchanged lines hidden --- |