RubyPort.cc (7632:acf43d6bbc18) RubyPort.cc (7823:dac01f14f20f)
1/*
2 * Copyright (c) 2009 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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313 }
314 DPRINTF(MemoryAccess, "Hit callback done!\n");
315}
316
317bool
318RubyPort::M5Port::sendTiming(PacketPtr pkt)
319{
320 //minimum latency, must be > 0
1/*
2 * Copyright (c) 2009 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 304 unchanged lines hidden (view full) ---

313 }
314 DPRINTF(MemoryAccess, "Hit callback done!\n");
315}
316
317bool
318RubyPort::M5Port::sendTiming(PacketPtr pkt)
319{
320 //minimum latency, must be > 0
321 schedSendTiming(pkt, curTick + (1 * g_eventQueue_ptr->getClock()));
321 schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock()));
322 return true;
323}
324
325bool
326RubyPort::PioPort::sendTiming(PacketPtr pkt)
327{
328 //minimum latency, must be > 0
322 return true;
323}
324
325bool
326RubyPort::PioPort::sendTiming(PacketPtr pkt)
327{
328 //minimum latency, must be > 0
329 schedSendTiming(pkt, curTick + (1 * g_eventQueue_ptr->getClock()));
329 schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock()));
330 return true;
331}
332
333bool
334RubyPort::M5Port::isPhysMemAddress(Addr addr)
335{
336 AddrRangeList physMemAddrList;
337 bool snoop = false;

--- 12 unchanged lines hidden --- 		330 return true;
331}
332
333bool
334RubyPort::M5Port::isPhysMemAddress(Addr addr)
335{
336 AddrRangeList physMemAddrList;
337 bool snoop = false;

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