RubyPort.cc (7039:bc0b6ea676b5) RubyPort.cc (7550:7d97cec15818)
1/*
2 * Copyright (c) 2009 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 215 unchanged lines hidden (view full) ---

224
225 RubyRequest ruby_request(pkt->getAddr(), pkt->getPtr<uint8_t>(),
226 pkt->getSize(), pc, type,
227 RubyAccessMode_Supervisor, pkt);
228
229 // Submit the ruby request
230 RequestStatus requestStatus = ruby_port->makeRequest(ruby_request);
231
1/*
2 * Copyright (c) 2009 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 215 unchanged lines hidden (view full) ---

224
225 RubyRequest ruby_request(pkt->getAddr(), pkt->getPtr<uint8_t>(),
226 pkt->getSize(), pc, type,
227 RubyAccessMode_Supervisor, pkt);
228
229 // Submit the ruby request
230 RequestStatus requestStatus = ruby_port->makeRequest(ruby_request);
231
232 // If the request successfully issued or the SC request completed because
233 // exclusive permission was lost, then we should return true.
232 // If the request successfully issued then we should return true.
234 // Otherwise, we need to delete the senderStatus we just created and return
235 // false.
233 // Otherwise, we need to delete the senderStatus we just created and return
234 // false.
236 if ((requestStatus == RequestStatus_Issued) ||
237 (requestStatus == RequestStatus_LlscFailed)) {
238
239 // The communicate to M5 whether the SC command succeeded by seting the
240 // packet's extra data.
241 if (pkt->isLLSC() && pkt->isWrite()) {
242 if (requestStatus == RequestStatus_LlscFailed) {
243 DPRINTF(MemoryAccess, "SC failed and request completed\n");
244 pkt->req->setExtraData(0);
245 } else {
246 pkt->req->setExtraData(1);
247 }
248 }
235 if (requestStatus == RequestStatus_Issued) {
249 return true;
250 }
251
252 DPRINTF(MemoryAccess,
253 "Request for address #x did not issue because %s\n",
254 pkt->getAddr(), RequestStatus_to_string(requestStatus));
255
256 SenderState* senderState = safe_cast<SenderState*>(pkt->senderState);

--- 18 unchanged lines hidden (view full) ---

275 port->hitCallback(pkt);
276}
277
278void
279RubyPort::M5Port::hitCallback(PacketPtr pkt)
280{
281 bool needsResponse = pkt->needsResponse();
282
236 return true;
237 }
238
239 DPRINTF(MemoryAccess,
240 "Request for address #x did not issue because %s\n",
241 pkt->getAddr(), RequestStatus_to_string(requestStatus));
242
243 SenderState* senderState = safe_cast<SenderState*>(pkt->senderState);

--- 18 unchanged lines hidden (view full) ---

262 port->hitCallback(pkt);
263}
264
265void
266RubyPort::M5Port::hitCallback(PacketPtr pkt)
267{
268 bool needsResponse = pkt->needsResponse();
269
270 //
271 // All responses except failed SC operations access M5 physical memory
272 //
273 bool accessPhysMem = true;
274
275 if (pkt->isLLSC()) {
276 if (pkt->isWrite()) {
277 if (pkt->req->getExtraData() != 0) {
278 //
279 // Successful SC packets convert to normal writes
280 //
281 pkt->convertScToWrite();
282 } else {
283 //
284 // Failed SC packets don't access physical memory and thus
285 // the RubyPort itself must convert it to a response.
286 //
287 accessPhysMem = false;
288 pkt->makeAtomicResponse();
289 }
290 } else {
291 //
292 // All LL packets convert to normal loads so that M5 PhysMem does
293 // not lock the blocks.
294 //
295 pkt->convertLlToRead();
296 }
297 }
283 DPRINTF(MemoryAccess, "Hit callback needs response %d\n", needsResponse);
284
298 DPRINTF(MemoryAccess, "Hit callback needs response %d\n", needsResponse);
299
285 ruby_port->physMemPort->sendAtomic(pkt);
300 if (accessPhysMem) {
301 ruby_port->physMemPort->sendAtomic(pkt);
302 }
286
287 // turn packet around to go back to requester if response expected
288 if (needsResponse) {
289 // sendAtomic() should already have turned packet into
290 // atomic response
291 assert(pkt->isResponse());
292 DPRINTF(MemoryAccess, "Sending packet back over port\n");
293 sendTiming(pkt);

--- 37 unchanged lines hidden --- 		303
304 // turn packet around to go back to requester if response expected
305 if (needsResponse) {
306 // sendAtomic() should already have turned packet into
307 // atomic response
308 assert(pkt->isResponse());
309 DPRINTF(MemoryAccess, "Sending packet back over port\n");
310 sendTiming(pkt);

--- 37 unchanged lines hidden ---