1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 127 unchanged lines hidden (view full) --- 136RubyPort::M5Port::recvAtomic(PacketPtr pkt) 137{ 138 panic("RubyPort::M5Port::recvAtomic() not implemented!\n"); 139 return 0; 140} 141 142 143bool |
144RubyPort::PioPort::recvTimingResp(PacketPtr pkt) |
145{ 146 // In FS mode, ruby memory will receive pio responses from devices 147 // and it must forward these responses back to the particular CPU. 148 DPRINTF(RubyPort, "Pio response for address %#x\n", pkt->getAddr()); 149 |
150 // First we must retrieve the request port from the sender State 151 RubyPort::SenderState *senderState = 152 safe_cast<RubyPort::SenderState *>(pkt->senderState); 153 M5Port *port = senderState->port; 154 assert(port != NULL); 155 156 // pop the sender state from the packet 157 pkt->senderState = senderState->saved; 158 delete senderState; 159 |
160 port->sendTimingResp(pkt); |
161 162 return true; 163} 164 165bool |
166RubyPort::M5Port::recvTimingReq(PacketPtr pkt) |
167{ 168 DPRINTF(RubyPort, 169 "Timing access caught for address %#x\n", pkt->getAddr()); 170 |
171 //dsm: based on SimpleTimingPort::recvTimingReq(pkt); |
172 173 // The received packets should only be M5 requests, which should never 174 // get nacked. There used to be code to hanldle nacks here, but 175 // I'm pretty sure it didn't work correctly with the drain code, 176 // so that would need to be fixed if we ever added it back. |
177 178 if (pkt->memInhibitAsserted()) { 179 warn("memInhibitAsserted???"); 180 // snooper will supply based on copy of packet 181 // still target's responsibility to delete packet 182 delete pkt; 183 return true; 184 } --- 520 unchanged lines hidden --- |