1 2/* 3 * Copyright (c) 2009 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 22 unchanged lines hidden (view full) --- 31#include "mem/ruby/system/RubyPort.hh" 32#include "mem/ruby/slicc_interface/AbstractController.hh" 33 34uint16_t RubyPort::m_num_ports = 0; 35 36RubyPort::RequestMap RubyPort::pending_cpu_requests; 37 38RubyPort::RubyPort(const Params *p) |
39 : MemObject(p) |
40{ 41 m_version = p->version; 42 assert(m_version != -1); 43 |
44 physmem = p->physmem; 45 |
46 m_controller = NULL; 47 m_mandatory_q_ptr = NULL; 48 49 m_port_id = m_num_ports++; 50 m_request_cnt = 0; 51 m_hit_callback = ruby_hit_callback; 52 pio_port = NULL; |
53 physMemPort = NULL; |
54 assert(m_num_ports <= 2048); // see below for reason 55} 56 57void RubyPort::init() 58{ 59 assert(m_controller != NULL); 60 m_mandatory_q_ptr = m_controller->getMandatoryQueue(); 61} --- 8 unchanged lines hidden (view full) --- 70 // ensure there is only one pio port 71 // 72 assert(pio_port == NULL); 73 74 pio_port = new PioPort(csprintf("%s-pio-port%d", name(), idx), 75 this); 76 77 return pio_port; |
78 } else if (if_name == "physMemPort") { 79 // 80 // RubyPort should only have one port to physical memory 81 // 82 assert (physMemPort == NULL); 83 84 physMemPort = new M5Port(csprintf("%s-physMemPort", name()), 85 this); 86 87 return physMemPort; 88 } else if (if_name == "functional") { 89 // 90 // Calls for the functional port only want to access functional memory. 91 // Therefore, directly pass these calls ports to physmem. 92 // 93 assert(physmem != NULL); 94 return physmem->getPort(if_name, idx); |
95 } 96 return NULL; 97} 98 99RubyPort::PioPort::PioPort(const std::string &_name, 100 RubyPort *_port) 101 : SimpleTimingPort(_name, _port) 102{ --- 157 unchanged lines hidden (view full) --- 260RubyPort::M5Port::hitCallback(PacketPtr pkt) 261{ 262 263 bool needsResponse = pkt->needsResponse(); 264 265 DPRINTF(MemoryAccess, "Hit callback needs response %d\n", 266 needsResponse); 267 |
268 ruby_port->physMemPort->sendAtomic(pkt); |
269 270 // turn packet around to go back to requester if response expected 271 if (needsResponse) { |
272 // sendAtomic() should already have turned packet into |
273 // atomic response 274 assert(pkt->isResponse()); 275 DPRINTF(MemoryAccess, "Sending packet back over port\n"); 276 sendTiming(pkt); 277 } else { 278 delete pkt; 279 } 280 DPRINTF(MemoryAccess, "Hit callback done!\n"); --- 13 unchanged lines hidden (view full) --- 294 return true; 295} 296 297bool 298RubyPort::M5Port::isPhysMemAddress(Addr addr) 299{ 300 AddrRangeList physMemAddrList; 301 bool snoop = false; |
302 ruby_port->physMemPort->getPeerAddressRanges(physMemAddrList, snoop); |
303 for(AddrRangeIter iter = physMemAddrList.begin(); 304 iter != physMemAddrList.end(); 305 iter++) { 306 if (addr >= iter->start && addr <= iter->end) { 307 DPRINTF(MemoryAccess, "Request found in %#llx - %#llx range\n", 308 iter->start, iter->end); 309 return true; 310 } 311 } |
312 return false; 313} |