1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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136RubyPort::M5Port::recvAtomic(PacketPtr pkt)
137{
138 panic("RubyPort::M5Port::recvAtomic() not implemented!\n");
139 return 0;
140}
141
142
143bool
144RubyPort::PioPort::recvTiming(PacketPtr pkt)
145{
146 // In FS mode, ruby memory will receive pio responses from devices
147 // and it must forward these responses back to the particular CPU.
148 DPRINTF(RubyPort, "Pio response for address %#x\n", pkt->getAddr());
149
150 assert(pkt->isResponse());
151
152 // First we must retrieve the request port from the sender State
153 RubyPort::SenderState *senderState =
154 safe_cast<RubyPort::SenderState *>(pkt->senderState);
155 M5Port *port = senderState->port;
156 assert(port != NULL);
157
158 // pop the sender state from the packet
159 pkt->senderState = senderState->saved;
160 delete senderState;
161
162 port->sendTiming(pkt);
163
164 return true;
165}
166
167bool
168RubyPort::M5Port::recvTiming(PacketPtr pkt)
169{
170 DPRINTF(RubyPort,
171 "Timing access caught for address %#x\n", pkt->getAddr());
172
173 //dsm: based on SimpleTimingPort::recvTiming(pkt);
174
175 // The received packets should only be M5 requests, which should never
176 // get nacked. There used to be code to hanldle nacks here, but
177 // I'm pretty sure it didn't work correctly with the drain code,
178 // so that would need to be fixed if we ever added it back.
179 assert(pkt->isRequest());
180
181 if (pkt->memInhibitAsserted()) {
182 warn("memInhibitAsserted???");
183 // snooper will supply based on copy of packet
184 // still target's responsibility to delete packet
185 delete pkt;
186 return true;
187 }

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