1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 119 unchanged lines hidden (view full) ---

128 : QueuedSlavePort(_name, _port, queue), queue(*_port, *this),
129 ruby_port(_port), ruby_system(_system),
130 _onRetryList(false), access_phys_mem(_access_phys_mem)
131{
132 DPRINTF(RubyPort, "creating slave port on ruby sequencer %s\n", _name);
133}
134
135Tick
136RubyPort::PioPort::recvAtomic(PacketPtr pkt)
137{
138 panic("RubyPort::PioPort::recvAtomic() not implemented!\n");
139 return 0;
140}
141
142Tick
143RubyPort::M5Port::recvAtomic(PacketPtr pkt)
144{
145 panic("RubyPort::M5Port::recvAtomic() not implemented!\n");
146 return 0;
147}
148
149
150bool

--- 506 unchanged lines hidden (view full) ---

657 sendNextCycle(pkt);
658 } else {
659 delete pkt;
660 }
661 DPRINTF(RubyPort, "Hit callback done!\n");
662}
663
664bool
665RubyPort::M5Port::sendNextCycle(PacketPtr pkt)
666{
667 //minimum latency, must be > 0
668 queue.schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock()));
669 return true;
670}
671
672bool
673RubyPort::PioPort::sendNextCycle(PacketPtr pkt)
674{
675 //minimum latency, must be > 0
676 queue.schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock()));

--- 24 unchanged lines hidden (view full) ---

701RubyPort::ruby_eviction_callback(const Address& address)
702{
703 DPRINTF(RubyPort, "Sending invalidations.\n");
704 // should this really be using funcMasterId?
705 Request req(address.getAddress(), 0, 0, Request::funcMasterId);
706 for (CpuPortIter p = slave_ports.begin(); p != slave_ports.end(); ++p) {
707 if ((*p)->getMasterPort().isSnooping()) {
708 Packet *pkt = new Packet(&req, MemCmd::InvalidationReq, -1);
709 (*p)->sendNextCycle(pkt);
710 }
711 }
712}