1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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41
42#include "cpu/testers/rubytest/RubyTester.hh"
43#include "debug/Config.hh"
44#include "debug/Drain.hh"
45#include "debug/Ruby.hh"
46#include "mem/protocol/AccessPermission.hh"
47#include "mem/ruby/slicc_interface/AbstractController.hh"
48#include "mem/ruby/system/RubyPort.hh"
49#include "sim/full_system.hh"
50#include "sim/system.hh"
51
52RubyPort::RubyPort(const Params *p)
53 : MemObject(p), m_version(p->version), m_controller(NULL),
54 m_mandatory_q_ptr(NULL), m_usingRubyTester(p->using_ruby_tester),
55 pioMasterPort(csprintf("%s.pio-master-port", name()), this),
56 pioSlavePort(csprintf("%s.pio-slave-port", name()), this),
57 memMasterPort(csprintf("%s.mem-master-port", name()), this),

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554 }
555}
556
557void
558RubyPort::PioMasterPort::recvRangeChange()
559{
560 RubyPort &r = static_cast<RubyPort &>(owner);
561 r.gotAddrRanges--;
562 if (r.gotAddrRanges == 0 && FullSystem) {
563 r.pioSlavePort.sendRangeChange();
564 }
565}