PerfectSwitch.hh (7002:48a19d52d939) PerfectSwitch.hh (7054:7d6862b80049)
1
2/*
3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;

--- 13 unchanged lines hidden (view full) ---

23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/*
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 13 unchanged lines hidden (view full) ---

22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
31 * $Id$
32 *
33 * Description: Perfect switch, of course it is perfect and no latency or what
34 * so ever. Every cycle it is woke up and perform all the
35 * necessary routings that must be done. Note, this switch also
36 * has number of input ports/output ports and has a routing table
37 * as well.
38 *
30 * Perfect switch, of course it is perfect and no latency or what so
31 * ever. Every cycle it is woke up and perform all the necessary
32 * routings that must be done. Note, this switch also has number of
33 * input ports/output ports and has a routing table as well.
39 */
40
34 */
35
41#ifndef PerfectSwitch_H
42#define PerfectSwitch_H
36#ifndef __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
37#define __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
43
44#include <iostream>
45
38
39#include <iostream>
40
46#include "mem/ruby/common/Global.hh"
47#include "mem/gems_common/Vector.hh"
48#include "mem/ruby/common/Consumer.hh"
41#include "mem/gems_common/Vector.hh"
42#include "mem/ruby/common/Consumer.hh"
43#include "mem/ruby/common/Global.hh"
49#include "mem/ruby/system/NodeID.hh"
50
51class MessageBuffer;
52class NetDest;
53class SimpleNetwork;
54
44#include "mem/ruby/system/NodeID.hh"
45
46class MessageBuffer;
47class NetDest;
48class SimpleNetwork;
49
55class LinkOrder {
56public:
57 int m_link;
58 int m_value;
50struct LinkOrder
51{
52 int m_link;
53 int m_value;
59};
60
54};
55
61class PerfectSwitch : public Consumer {
62public:
63 // Constructors
56class PerfectSwitch : public Consumer
57{
58 public:
59 PerfectSwitch(SwitchID sid, SimpleNetwork* network_ptr);
60 ~PerfectSwitch();
64
61
65 // constructor specifying the number of ports
66 PerfectSwitch(SwitchID sid, SimpleNetwork* network_ptr);
67 void addInPort(const Vector<MessageBuffer*>& in);
68 void addOutPort(const Vector<MessageBuffer*>& out, const NetDest& routing_table_entry);
69 void clearRoutingTables();
70 void clearBuffers();
71 void reconfigureOutPort(const NetDest& routing_table_entry);
72 int getInLinks() const { return m_in.size(); }
73 int getOutLinks() const { return m_out.size(); }
62 void addInPort(const Vector<MessageBuffer*>& in);
63 void addOutPort(const Vector<MessageBuffer*>& out,
64 const NetDest& routing_table_entry);
65 void clearRoutingTables();
66 void clearBuffers();
67 void reconfigureOutPort(const NetDest& routing_table_entry);
68 int getInLinks() const { return m_in.size(); }
69 int getOutLinks() const { return m_out.size(); }
74
70
75 // Destructor
76 ~PerfectSwitch();
71 void wakeup();
77
72
78 // Public Methods
79 void wakeup();
73 void printStats(std::ostream& out) const;
74 void clearStats();
75 void printConfig(std::ostream& out) const;
80
76
81 void printStats(std::ostream& out) const;
82 void clearStats();
83 void printConfig(std::ostream& out) const;
77 void print(std::ostream& out) const;
84
78
85 void print(std::ostream& out) const;
86private:
79 private:
80 // Private copy constructor and assignment operator
81 PerfectSwitch(const PerfectSwitch& obj);
82 PerfectSwitch& operator=(const PerfectSwitch& obj);
87
83
88 // Private copy constructor and assignment operator
89 PerfectSwitch(const PerfectSwitch& obj);
90 PerfectSwitch& operator=(const PerfectSwitch& obj);
84 SwitchID m_switch_id;
91
85
92 // Data Members (m_ prefix)
93 SwitchID m_switch_id;
94
95 // vector of queues from the components
96 Vector<Vector<MessageBuffer*> > m_in;
97 Vector<Vector<MessageBuffer*> > m_out;
98 Vector<NetDest> m_routing_table;
99 Vector<LinkOrder> m_link_order;
100 int m_virtual_networks;
101 int m_round_robin_start;
102 int m_wakeups_wo_switch;
103 SimpleNetwork* m_network_ptr;
86 // vector of queues from the components
87 Vector<Vector<MessageBuffer*> > m_in;
88 Vector<Vector<MessageBuffer*> > m_out;
89 Vector<NetDest> m_routing_table;
90 Vector<LinkOrder> m_link_order;
91 int m_virtual_networks;
92 int m_round_robin_start;
93 int m_wakeups_wo_switch;
94 SimpleNetwork* m_network_ptr;
104};
105
95};
96
106// Output operator declaration
107std::ostream& operator<<(std::ostream& out, const PerfectSwitch& obj);
108
109// ******************* Definitions *******************
110
111// Output operator definition
112extern inline
113std::ostream& operator<<(std::ostream& out, const PerfectSwitch& obj)
97inline std::ostream&
98operator<<(std::ostream& out, const PerfectSwitch& obj)
114{
99{
115 obj.print(out);
116 out << std::flush;
117 return out;
100 obj.print(out);
101 out << std::flush;
102 return out;
118}
119
103}
104
120#endif //PerfectSwitch_H
105#endif // __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__