PerfectSwitch.hh (9554:406fbcf60223) PerfectSwitch.hh (9863:9483739f83ee)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 * Perfect switch, of course it is perfect and no latency or what so
31 * ever. Every cycle it is woke up and perform all the necessary
32 * routings that must be done. Note, this switch also has number of
33 * input ports/output ports and has a routing table as well.
34 */
35
36#ifndef __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
37#define __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
38
39#include <iostream>
40#include <string>
41#include <vector>
42
43#include "mem/ruby/common/Consumer.hh"
44
45class MessageBuffer;
46class NetDest;
47class SimpleNetwork;
48class Switch;
49
50struct LinkOrder
51{
52 int m_link;
53 int m_value;
54};
55
56bool operator<(const LinkOrder& l1, const LinkOrder& l2);
57
58class PerfectSwitch : public Consumer
59{
60 public:
61 PerfectSwitch(SwitchID sid, Switch *, uint32_t);
62 ~PerfectSwitch();
63
64 std::string name()
65 { return csprintf("PerfectSwitch-%i", m_switch_id); }
66
67 void init(SimpleNetwork *);
68 void addInPort(const std::vector<MessageBuffer*>& in);
69 void addOutPort(const std::vector<MessageBuffer*>& out,
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 * Perfect switch, of course it is perfect and no latency or what so
31 * ever. Every cycle it is woke up and perform all the necessary
32 * routings that must be done. Note, this switch also has number of
33 * input ports/output ports and has a routing table as well.
34 */
35
36#ifndef __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
37#define __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
38
39#include <iostream>
40#include <string>
41#include <vector>
42
43#include "mem/ruby/common/Consumer.hh"
44
45class MessageBuffer;
46class NetDest;
47class SimpleNetwork;
48class Switch;
49
50struct LinkOrder
51{
52 int m_link;
53 int m_value;
54};
55
56bool operator<(const LinkOrder& l1, const LinkOrder& l2);
57
58class PerfectSwitch : public Consumer
59{
60 public:
61 PerfectSwitch(SwitchID sid, Switch *, uint32_t);
62 ~PerfectSwitch();
63
64 std::string name()
65 { return csprintf("PerfectSwitch-%i", m_switch_id); }
66
67 void init(SimpleNetwork *);
68 void addInPort(const std::vector<MessageBuffer*>& in);
69 void addOutPort(const std::vector<MessageBuffer*>& out,
70 const NetDest& routing_table_entry);
71 void clearRoutingTables();
72 void clearBuffers();
73 void reconfigureOutPort(const NetDest& routing_table_entry);
70 const NetDest& routing_table_entry);
74 int getInLinks() const { return m_in.size(); }
75 int getOutLinks() const { return m_out.size(); }
76
77 void wakeup();
78 void storeEventInfo(int info);
79
71 int getInLinks() const { return m_in.size(); }
72 int getOutLinks() const { return m_out.size(); }
73
74 void wakeup();
75 void storeEventInfo(int info);
76
80 void printStats(std::ostream& out) const;
81 void clearStats();
77 void clearStats();
78 void collateStats();
82 void print(std::ostream& out) const;
83
84 private:
85 // Private copy constructor and assignment operator
86 PerfectSwitch(const PerfectSwitch& obj);
87 PerfectSwitch& operator=(const PerfectSwitch& obj);
88
89 SwitchID m_switch_id;
90
91 // vector of queues from the components
92 std::vector<std::vector<MessageBuffer*> > m_in;
93 std::vector<std::vector<MessageBuffer*> > m_out;
94 std::vector<NetDest> m_routing_table;
95 std::vector<LinkOrder> m_link_order;
96
97 uint32_t m_virtual_networks;
98 int m_round_robin_start;
99 int m_wakeups_wo_switch;
100
101 SimpleNetwork* m_network_ptr;
102 std::vector<int> m_pending_message_count;
103};
104
105inline std::ostream&
106operator<<(std::ostream& out, const PerfectSwitch& obj)
107{
108 obj.print(out);
109 out << std::flush;
110 return out;
111}
112
113#endif // __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
79 void print(std::ostream& out) const;
80
81 private:
82 // Private copy constructor and assignment operator
83 PerfectSwitch(const PerfectSwitch& obj);
84 PerfectSwitch& operator=(const PerfectSwitch& obj);
85
86 SwitchID m_switch_id;
87
88 // vector of queues from the components
89 std::vector<std::vector<MessageBuffer*> > m_in;
90 std::vector<std::vector<MessageBuffer*> > m_out;
91 std::vector<NetDest> m_routing_table;
92 std::vector<LinkOrder> m_link_order;
93
94 uint32_t m_virtual_networks;
95 int m_round_robin_start;
96 int m_wakeups_wo_switch;
97
98 SimpleNetwork* m_network_ptr;
99 std::vector<int> m_pending_message_count;
100};
101
102inline std::ostream&
103operator<<(std::ostream& out, const PerfectSwitch& obj)
104{
105 obj.print(out);
106 out << std::flush;
107 return out;
108}
109
110#endif // __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__