1# Copyright (c) 2009 Advanced Micro Devices, Inc. 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 25 unchanged lines hidden (view full) --- 34class RubyNetwork(ClockedObject): 35 type = 'RubyNetwork' 36 cxx_class = 'Network' 37 cxx_header = "mem/ruby/network/Network.hh" 38 abstract = True 39 topology = Param.String("Not Specified", 40 "the name of the imported topology module") 41 |
42 number_of_virtual_networks = Param.Unsigned("Number of virtual networks " 43 "used by the coherence protocol in use. The on-chip network " 44 "assumes the protocol numbers vnets starting from 0. Therefore, " 45 "the number of virtual networks should be one more than the " 46 "highest numbered vnet in use.") |
47 control_msg_size = Param.Int(8, "") 48 ruby_system = Param.RubySystem("") 49 50 routers = VectorParam.BasicRouter("Network routers") 51 netifs = VectorParam.ClockedObject("Network Interfaces") 52 ext_links = VectorParam.BasicExtLink("Links to external nodes") 53 int_links = VectorParam.BasicIntLink("Links between internal nodes") 54 55 slave = VectorSlavePort("CPU slave port") 56 master = VectorMasterPort("CPU master port") |