1# Copyright (c) 2009 Advanced Micro Devices, Inc.
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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34class RubyNetwork(ClockedObject):
35 type = 'RubyNetwork'
36 cxx_class = 'Network'
37 cxx_header = "mem/ruby/network/Network.hh"
38 abstract = True
39 topology = Param.String("Not Specified",
40 "the name of the imported topology module")
41
42 number_of_virtual_networks = Param.Int(10, "")
43 control_msg_size = Param.Int(8, "")
44 ruby_system = Param.RubySystem("")
45
46 routers = VectorParam.BasicRouter("Network routers")
47 netifs = VectorParam.ClockedObject("Network Interfaces")
48 ext_links = VectorParam.BasicExtLink("Links to external nodes")
49 int_links = VectorParam.BasicIntLink("Links between internal nodes")
50
51 slave = VectorSlavePort("CPU slave port")
52 master = VectorMasterPort("CPU master port")