request.hh (7823:dac01f14f20f) request.hh (8105:906864dd0937)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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65 static const FlagsType PHYSICAL = 0x00000200;
66 /** The request is an ALPHA VPTE pal access (hw_ld). */
67 static const FlagsType VPTE = 0x00000400;
68 /** Use the alternate mode bits in ALPHA. */
69 static const FlagsType ALTMODE = 0x00000800;
70 /** The request is to an uncacheable address. */
71 static const FlagsType UNCACHEABLE = 0x00001000;
72 /** This request is to a memory mapped register. */
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 56 unchanged lines hidden (view full) ---

65 static const FlagsType PHYSICAL = 0x00000200;
66 /** The request is an ALPHA VPTE pal access (hw_ld). */
67 static const FlagsType VPTE = 0x00000400;
68 /** Use the alternate mode bits in ALPHA. */
69 static const FlagsType ALTMODE = 0x00000800;
70 /** The request is to an uncacheable address. */
71 static const FlagsType UNCACHEABLE = 0x00001000;
72 /** This request is to a memory mapped register. */
73 static const FlagsType MMAPED_IPR = 0x00002000;
73 static const FlagsType MMAPPED_IPR = 0x00002000;
74 /** This request is a clear exclusive. */
75 static const FlagsType CLEAR_LL = 0x00004000;
76
77 /** The request should not cause a memory access. */
78 static const FlagsType NO_ACCESS = 0x00080000;
79 /** This request will lock or unlock the accessed memory. When used with
80 * a load, the access locks the particular chunk of memory. When used
81 * with a store, it unlocks. The rule is that locked accesses have to be

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448 only; setting flags should be done via setFlags(). */
449 bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
450 bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
451 bool isPrefetch() const { return _flags.isSet(PREFETCH); }
452 bool isLLSC() const { return _flags.isSet(LLSC); }
453 bool isLocked() const { return _flags.isSet(LOCKED); }
454 bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
455 bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
74 /** This request is a clear exclusive. */
75 static const FlagsType CLEAR_LL = 0x00004000;
76
77 /** The request should not cause a memory access. */
78 static const FlagsType NO_ACCESS = 0x00080000;
79 /** This request will lock or unlock the accessed memory. When used with
80 * a load, the access locks the particular chunk of memory. When used
81 * with a store, it unlocks. The rule is that locked accesses have to be

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448 only; setting flags should be done via setFlags(). */
449 bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
450 bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
451 bool isPrefetch() const { return _flags.isSet(PREFETCH); }
452 bool isLLSC() const { return _flags.isSet(LLSC); }
453 bool isLocked() const { return _flags.isSet(LOCKED); }
454 bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
455 bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
456 bool isMmapedIpr() const { return _flags.isSet(MMAPED_IPR); }
456 bool isMmappedIpr() const { return _flags.isSet(MMAPPED_IPR); }
457 bool isClearLL() const { return _flags.isSet(CLEAR_LL); }
458};
459
460#endif // __MEM_REQUEST_HH__
457 bool isClearLL() const { return _flags.isSet(CLEAR_LL); }
458};
459
460#endif // __MEM_REQUEST_HH__