1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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58/** The request should not cause a page fault. */
59const unsigned NO_FAULT = 0x020;
60/** The request should be prefetched into the exclusive state. */
61const unsigned PF_EXCLUSIVE = 0x100;
62/** The request should be marked as LRU. */
63const unsigned EVICT_NEXT = 0x200;
64/** The request should ignore unaligned access faults */
65const unsigned NO_ALIGN_FAULT = 0x400;
66/** The request was an instruction read. */
67const unsigned INST_READ = 0x800;
68
69class Request
70{
71 private:
72 /**
73 * The physical address of the request. Valid only if validPaddr
74 * is set. */
75 Addr paddr;

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225 int getThreadNum() { assert(validCpuAndThreadNums); return threadNum; }
226
227 /** Accessor function for pc.*/
228 Addr getPC() { assert(validPC); return pc; }
229
230 /** Accessor Function to Check Cacheability. */
231 bool isUncacheable() { return getFlags() & UNCACHEABLE; }
232
233 bool isInstRead() { return getFlags() & INST_READ; }
234
235 friend class Packet;
236};
237
238#endif // __MEM_REQUEST_HH__