41a42,43
> #include <cassert>
>
42a45
> #include "base/flags.hh"
46,47d48
< #include <cassert>
<
51a53,57
> class Request : public FastAlloc
> {
> public:
> typedef uint32_t FlagsType;
> typedef ::Flags<FlagsType> Flags;
53,79c59,87
< /** ASI information for this request if it exsits. */
< const uint32_t ASI_BITS = 0x000FF;
< /** The request is a Load locked/store conditional. */
< const uint32_t LOCKED = 0x00100;
< /** The virtual address is also the physical address. */
< const uint32_t PHYSICAL = 0x00200;
< /** The request is an ALPHA VPTE pal access (hw_ld). */
< const uint32_t VPTE = 0x00400;
< /** Use the alternate mode bits in ALPHA. */
< const uint32_t ALTMODE = 0x00800;
< /** The request is to an uncacheable address. */
< const uint32_t UNCACHEABLE = 0x01000;
< /** The request should not cause a page fault. */
< const uint32_t NO_FAULT = 0x02000;
< /** The request should be prefetched into the exclusive state. */
< const uint32_t PF_EXCLUSIVE = 0x10000;
< /** The request should be marked as LRU. */
< const uint32_t EVICT_NEXT = 0x20000;
< /** The request should ignore unaligned access faults */
< const uint32_t NO_ALIGN_FAULT = 0x40000;
< /** The request was an instruction read. */
< const uint32_t INST_READ = 0x80000;
< /** This request is for a memory swap. */
< const uint32_t MEM_SWAP = 0x100000;
< const uint32_t MEM_SWAP_COND = 0x200000;
< /** The request should ignore unaligned access faults */
< const uint32_t NO_HALF_WORD_ALIGN_FAULT = 0x400000;
---
> /** ASI information for this request if it exists. */
> static const FlagsType ASI_BITS = 0x000000FF;
> /** The request is a Load locked/store conditional. */
> static const FlagsType LOCKED = 0x00000100;
> /** The virtual address is also the physical address. */
> static const FlagsType PHYSICAL = 0x00000200;
> /** The request is an ALPHA VPTE pal access (hw_ld). */
> static const FlagsType VPTE = 0x00000400;
> /** Use the alternate mode bits in ALPHA. */
> static const FlagsType ALTMODE = 0x00000800;
> /** The request is to an uncacheable address. */
> static const FlagsType UNCACHEABLE = 0x00001000;
> /** The request should not cause a page fault. */
> static const FlagsType NO_FAULT = 0x00002000;
> /** The request should be prefetched into the exclusive state. */
> static const FlagsType PF_EXCLUSIVE = 0x00010000;
> /** The request should be marked as LRU. */
> static const FlagsType EVICT_NEXT = 0x00020000;
> /** The request should ignore unaligned access faults */
> static const FlagsType NO_ALIGN_FAULT = 0x00040000;
> /** The request was an instruction read. */
> static const FlagsType INST_READ = 0x00080000;
> /** This request is for a memory swap. */
> static const FlagsType MEM_SWAP = 0x00100000;
> static const FlagsType MEM_SWAP_COND = 0x00200000;
> /** The request should ignore unaligned access faults */
> static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000;
> /** This request is to a memory mapped register. */
> static const FlagsType MMAPED_IPR = 0x00800000;
80a89,91
> private:
> static const FlagsType PUBLIC_FLAGS = 0x00FF3FFF;
> static const FlagsType PRIVATE_FLAGS = 0xFF000000;
82,83c93,106
< class Request : public FastAlloc
< {
---
> /** Whether or not the size is valid. */
> static const FlagsType VALID_SIZE = 0x01000000;
> /** Whether or not paddr is valid (has been written yet). */
> static const FlagsType VALID_PADDR = 0x02000000;
> /** Whether or not the vaddr & asid are valid. */
> static const FlagsType VALID_VADDR = 0x04000000;
> /** Whether or not the pc is valid. */
> static const FlagsType VALID_PC = 0x10000000;
> /** Whether or not the context ID is valid. */
> static const FlagsType VALID_CONTEXT_ID = 0x20000000;
> static const FlagsType VALID_THREAD_ID = 0x40000000;
> /** Whether or not the sc result is valid. */
> static const FlagsType VALID_EXTRA_DATA = 0x80000000;
>
87c110,111
< * is set. */
---
> * is set.
> */
93c117,118
< * valid as long as one of the address fields is valid. */
---
> * valid as long as one of the address fields is valid.
> */
97c122
< uint32_t flags;
---
> Flags flags;
102c127,128
< * is written. */
---
> * is written.
> */
108,110d133
< /** This request is to a memory mapped register. */
< bool mmapedIpr;
<
114c137,138
< /** Extra data for the request, such as the return value of
---
> /**
> * Extra data for the request, such as the return value of
126,136d149
< /** Whether or not paddr is valid (has been written yet). */
< bool validPaddr;
< /** Whether or not the asid & vaddr are valid. */
< bool validAsidVaddr;
< /** Whether or not the sc result is valid. */
< bool validExData;
< /** Whether or not the context ID is valid. */
< bool validContextAndThreadIds;
< /** Whether or not the pc is valid. */
< bool validPC;
<
140,141d152
< : validPaddr(false), validAsidVaddr(false),
< validExData(false), validContextAndThreadIds(false), validPC(false)
147,150c158,163
< * These fields are adequate to perform a request. */
< Request(Addr _paddr, int _size, int _flags)
< : validContextAndThreadIds(false)
< { setPhys(_paddr, _size, _flags); }
---
> * These fields are adequate to perform a request.
> */
> Request(Addr paddr, int size, Flags flags)
> {
> setPhys(paddr, size, flags);
> }
152,153c165,166
< Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
< int _context_id, int _thread_id)
---
> Request(int asid, Addr vaddr, int size, Flags flags, Addr pc,
> int cid, int tid)
155,156c168,169
< setThreadContext(_context_id, _thread_id);
< setVirt(_asid, _vaddr, _size, _flags, _pc);
---
> setThreadContext(cid, tid);
> setVirt(asid, vaddr, size, flags, pc);
162,163c175,178
< * Set up CPU and thread numbers. */
< void setThreadContext(int _context_id, int _thread_id)
---
> * Set up CPU and thread numbers.
> */
> void
> setThreadContext(int context_id, int thread_id)
165,167c180,182
< _contextId = _context_id;
< _threadId = _thread_id;
< validContextAndThreadIds = true;
---
> _contextId = context_id;
> _threadId = thread_id;
> flags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
172,173c187,190
< * allocated Request object. */
< void setPhys(Addr _paddr, int _size, int _flags)
---
> * allocated Request object.
> */
> void
> setPhys(Addr _paddr, int _size, Flags _flags)
178d194
< flags = _flags;
180,184c196,199
< validPaddr = true;
< validAsidVaddr = false;
< validPC = false;
< validExData = false;
< mmapedIpr = false;
---
>
> flags.set(VALID_PADDR|VALID_SIZE);
> flags.clear(VALID_VADDR|VALID_PC|VALID_EXTRA_DATA|MMAPED_IPR);
> flags.update(_flags, PUBLIC_FLAGS);
189,190c204,207
< * allocated Request object. */
< void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
---
> * allocated Request object.
> */
> void
> setVirt(int _asid, Addr _vaddr, int _size, Flags _flags, Addr _pc)
196d212
< flags = _flags;
199,203c215,218
< validPaddr = false;
< validAsidVaddr = true;
< validPC = true;
< validExData = false;
< mmapedIpr = false;
---
>
> flags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
> flags.clear(VALID_PADDR|VALID_EXTRA_DATA|MMAPED_IPR);
> flags.update(_flags, PUBLIC_FLAGS);
206c221,222
< /** Set just the physical address. This should only be used to
---
> /**
> * Set just the physical address. This should only be used to
211c227,228
< void setPaddr(Addr _paddr)
---
> void
> setPaddr(Addr _paddr)
213c230
< assert(validAsidVaddr);
---
> assert(flags.any(VALID_VADDR));
215c232
< validPaddr = true;
---
> flags.set(VALID_PADDR);
218,219c235,243
< /** Accessor for paddr. */
< Addr getPaddr() { assert(validPaddr); return paddr; }
---
> /**
> * Accessor for paddr.
> */
> Addr
> getPaddr()
> {
> assert(flags.any(VALID_PADDR));
> return paddr;
> }
221,222c245,254
< /** Accessor for size. */
< int getSize() { assert(validPaddr || validAsidVaddr); return size; }
---
> /**
> * Accessor for size.
> */
> int
> getSize()
> {
> assert(flags.any(VALID_SIZE));
> return size;
> }
>
224,225c256,262
< Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
< void resetTime() { assert(validPaddr || validAsidVaddr); time = curTick; }
---
> Tick
> getTime()
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> return time;
> }
>
229c266
< assert(validPaddr || validAsidVaddr);
---
> assert(flags.any(VALID_PADDR|VALID_VADDR));
232a270,271
> void resetTime() { setTime(curTick); }
>
234,237c273,278
< uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
< /** Accessor for paddr. */
< void setFlags(uint32_t _flags)
< { assert(validPaddr || validAsidVaddr); flags = _flags; }
---
> Flags
> getFlags()
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> return flags & PUBLIC_FLAGS;
> }
238a280,319
> Flags
> anyFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> return flags.any(_flags);
> }
>
> Flags
> allFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> return flags.all(_flags);
> }
>
> /** Accessor for flags. */
> void
> setFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> flags.set(_flags);
> }
>
> void
> clearFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> flags.clear(_flags);
> }
>
> void
> clearFlags()
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> flags.clear(PUBLIC_FLAGS);
> }
>
240c321,326
< Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
---
> Addr
> getVaddr()
> {
> assert(flags.any(VALID_VADDR));
> return vaddr;
> }
243c329,334
< int getAsid() { assert(validAsidVaddr); return asid; }
---
> int
> getAsid()
> {
> assert(flags.any(VALID_VADDR));
> return asid;
> }
246c337,342
< uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
---
> uint8_t
> getAsi()
> {
> assert(flags.any(VALID_VADDR));
> return flags & ASI_BITS;
> }
249,250c345,350
< void setAsi(uint8_t a)
< { assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
---
> void
> setAsi(uint8_t a)
> {
> assert(flags.any(VALID_VADDR));
> flags.update(a, ASI_BITS);
> }
253c353,358
< bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
---
> bool
> isMmapedIpr()
> {
> assert(flags.any(VALID_PADDR));
> return flags.any(MMAPED_IPR);
> }
256c361,366
< void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
---
> void
> setMmapedIpr(bool r)
> {
> assert(VALID_VADDR);
> flags.set(MMAPED_IPR);
> }
259c369,374
< bool extraDataValid() { return validExData; }
---
> bool
> extraDataValid()
> {
> return flags.any(VALID_EXTRA_DATA);
> }
>
261c376,382
< uint64_t getExtraData() { assert(validExData); return extraData; }
---
> uint64_t
> getExtraData() const
> {
> assert(flags.any(VALID_EXTRA_DATA));
> return extraData;
> }
>
263,264c384,389
< void setExtraData(uint64_t _extraData)
< { extraData = _extraData; validExData = true; }
---
> void
> setExtraData(uint64_t _extraData)
> {
> extraData = _extraData;
> flags.set(VALID_EXTRA_DATA);
> }
267c392,398
< int contextId() { assert(validContextAndThreadIds); return _contextId; }
---
> int
> contextId() const
> {
> assert(flags.any(VALID_CONTEXT_ID));
> return _contextId;
> }
>
269c400,405
< int threadId() { assert(validContextAndThreadIds); return _threadId; }
---
> int
> threadId() const
> {
> assert(flags.any(VALID_THREAD_ID));
> return _threadId;
> }
272c408,413
< Addr getPC() { assert(validPC); return pc; }
---
> Addr
> getPC() const
> {
> assert(flags.any(VALID_PC));
> return pc;
> }
275c416,420
< bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
---
> bool isUncacheable() const { return flags.any(UNCACHEABLE); }
> bool isInstRead() const { return flags.any(INST_READ); }
> bool isLocked() const { return flags.any(LOCKED); }
> bool isSwap() const { return flags.any(MEM_SWAP|MEM_SWAP_COND); }
> bool isCondSwap() const { return flags.any(MEM_SWAP_COND); }
277c422,426
< bool isInstRead() { return (getFlags() & INST_READ) != 0; }
---
> bool
> isMisaligned() const
> {
> if (flags.any(NO_ALIGN_FAULT))
> return false;
279c428,429
< bool isLocked() { return (getFlags() & LOCKED) != 0; }
---
> if ((vaddr & 0x1))
> return true;
281,282c431,432
< bool isSwap() { return (getFlags() & MEM_SWAP ||
< getFlags() & MEM_SWAP_COND); }
---
> if (flags.any(NO_HALF_WORD_ALIGN_FAULT))
> return false;
284c434,435
< bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
---
> if ((vaddr & 0x2))
> return true;
286,289c437,438
< bool inline isMisaligned() {return (!(getFlags() & NO_ALIGN_FAULT) &&
< ((vaddr & 1) ||
< (!(getFlags() & NO_HALF_WORD_ALIGN_FAULT)
< && (vaddr & 0x2))));}
---
> return false;
> }
> #include <cassert>
>
42a45
> #include "base/flags.hh"
46,47d48
< #include <cassert>
<
51a53,57
> class Request : public FastAlloc
> {
> public:
> typedef uint32_t FlagsType;
> typedef ::Flags<FlagsType> Flags;
53,79c59,87
< /** ASI information for this request if it exsits. */
< const uint32_t ASI_BITS = 0x000FF;
< /** The request is a Load locked/store conditional. */
< const uint32_t LOCKED = 0x00100;
< /** The virtual address is also the physical address. */
< const uint32_t PHYSICAL = 0x00200;
< /** The request is an ALPHA VPTE pal access (hw_ld). */
< const uint32_t VPTE = 0x00400;
< /** Use the alternate mode bits in ALPHA. */
< const uint32_t ALTMODE = 0x00800;
< /** The request is to an uncacheable address. */
< const uint32_t UNCACHEABLE = 0x01000;
< /** The request should not cause a page fault. */
< const uint32_t NO_FAULT = 0x02000;
< /** The request should be prefetched into the exclusive state. */
< const uint32_t PF_EXCLUSIVE = 0x10000;
< /** The request should be marked as LRU. */
< const uint32_t EVICT_NEXT = 0x20000;
< /** The request should ignore unaligned access faults */
< const uint32_t NO_ALIGN_FAULT = 0x40000;
< /** The request was an instruction read. */
< const uint32_t INST_READ = 0x80000;
< /** This request is for a memory swap. */
< const uint32_t MEM_SWAP = 0x100000;
< const uint32_t MEM_SWAP_COND = 0x200000;
< /** The request should ignore unaligned access faults */
< const uint32_t NO_HALF_WORD_ALIGN_FAULT = 0x400000;
---
> /** ASI information for this request if it exists. */
> static const FlagsType ASI_BITS = 0x000000FF;
> /** The request is a Load locked/store conditional. */
> static const FlagsType LOCKED = 0x00000100;
> /** The virtual address is also the physical address. */
> static const FlagsType PHYSICAL = 0x00000200;
> /** The request is an ALPHA VPTE pal access (hw_ld). */
> static const FlagsType VPTE = 0x00000400;
> /** Use the alternate mode bits in ALPHA. */
> static const FlagsType ALTMODE = 0x00000800;
> /** The request is to an uncacheable address. */
> static const FlagsType UNCACHEABLE = 0x00001000;
> /** The request should not cause a page fault. */
> static const FlagsType NO_FAULT = 0x00002000;
> /** The request should be prefetched into the exclusive state. */
> static const FlagsType PF_EXCLUSIVE = 0x00010000;
> /** The request should be marked as LRU. */
> static const FlagsType EVICT_NEXT = 0x00020000;
> /** The request should ignore unaligned access faults */
> static const FlagsType NO_ALIGN_FAULT = 0x00040000;
> /** The request was an instruction read. */
> static const FlagsType INST_READ = 0x00080000;
> /** This request is for a memory swap. */
> static const FlagsType MEM_SWAP = 0x00100000;
> static const FlagsType MEM_SWAP_COND = 0x00200000;
> /** The request should ignore unaligned access faults */
> static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000;
> /** This request is to a memory mapped register. */
> static const FlagsType MMAPED_IPR = 0x00800000;
80a89,91
> private:
> static const FlagsType PUBLIC_FLAGS = 0x00FF3FFF;
> static const FlagsType PRIVATE_FLAGS = 0xFF000000;
82,83c93,106
< class Request : public FastAlloc
< {
---
> /** Whether or not the size is valid. */
> static const FlagsType VALID_SIZE = 0x01000000;
> /** Whether or not paddr is valid (has been written yet). */
> static const FlagsType VALID_PADDR = 0x02000000;
> /** Whether or not the vaddr & asid are valid. */
> static const FlagsType VALID_VADDR = 0x04000000;
> /** Whether or not the pc is valid. */
> static const FlagsType VALID_PC = 0x10000000;
> /** Whether or not the context ID is valid. */
> static const FlagsType VALID_CONTEXT_ID = 0x20000000;
> static const FlagsType VALID_THREAD_ID = 0x40000000;
> /** Whether or not the sc result is valid. */
> static const FlagsType VALID_EXTRA_DATA = 0x80000000;
>
87c110,111
< * is set. */
---
> * is set.
> */
93c117,118
< * valid as long as one of the address fields is valid. */
---
> * valid as long as one of the address fields is valid.
> */
97c122
< uint32_t flags;
---
> Flags flags;
102c127,128
< * is written. */
---
> * is written.
> */
108,110d133
< /** This request is to a memory mapped register. */
< bool mmapedIpr;
<
114c137,138
< /** Extra data for the request, such as the return value of
---
> /**
> * Extra data for the request, such as the return value of
126,136d149
< /** Whether or not paddr is valid (has been written yet). */
< bool validPaddr;
< /** Whether or not the asid & vaddr are valid. */
< bool validAsidVaddr;
< /** Whether or not the sc result is valid. */
< bool validExData;
< /** Whether or not the context ID is valid. */
< bool validContextAndThreadIds;
< /** Whether or not the pc is valid. */
< bool validPC;
<
140,141d152
< : validPaddr(false), validAsidVaddr(false),
< validExData(false), validContextAndThreadIds(false), validPC(false)
147,150c158,163
< * These fields are adequate to perform a request. */
< Request(Addr _paddr, int _size, int _flags)
< : validContextAndThreadIds(false)
< { setPhys(_paddr, _size, _flags); }
---
> * These fields are adequate to perform a request.
> */
> Request(Addr paddr, int size, Flags flags)
> {
> setPhys(paddr, size, flags);
> }
152,153c165,166
< Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
< int _context_id, int _thread_id)
---
> Request(int asid, Addr vaddr, int size, Flags flags, Addr pc,
> int cid, int tid)
155,156c168,169
< setThreadContext(_context_id, _thread_id);
< setVirt(_asid, _vaddr, _size, _flags, _pc);
---
> setThreadContext(cid, tid);
> setVirt(asid, vaddr, size, flags, pc);
162,163c175,178
< * Set up CPU and thread numbers. */
< void setThreadContext(int _context_id, int _thread_id)
---
> * Set up CPU and thread numbers.
> */
> void
> setThreadContext(int context_id, int thread_id)
165,167c180,182
< _contextId = _context_id;
< _threadId = _thread_id;
< validContextAndThreadIds = true;
---
> _contextId = context_id;
> _threadId = thread_id;
> flags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
172,173c187,190
< * allocated Request object. */
< void setPhys(Addr _paddr, int _size, int _flags)
---
> * allocated Request object.
> */
> void
> setPhys(Addr _paddr, int _size, Flags _flags)
178d194
< flags = _flags;
180,184c196,199
< validPaddr = true;
< validAsidVaddr = false;
< validPC = false;
< validExData = false;
< mmapedIpr = false;
---
>
> flags.set(VALID_PADDR|VALID_SIZE);
> flags.clear(VALID_VADDR|VALID_PC|VALID_EXTRA_DATA|MMAPED_IPR);
> flags.update(_flags, PUBLIC_FLAGS);
189,190c204,207
< * allocated Request object. */
< void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
---
> * allocated Request object.
> */
> void
> setVirt(int _asid, Addr _vaddr, int _size, Flags _flags, Addr _pc)
196d212
< flags = _flags;
199,203c215,218
< validPaddr = false;
< validAsidVaddr = true;
< validPC = true;
< validExData = false;
< mmapedIpr = false;
---
>
> flags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
> flags.clear(VALID_PADDR|VALID_EXTRA_DATA|MMAPED_IPR);
> flags.update(_flags, PUBLIC_FLAGS);
206c221,222
< /** Set just the physical address. This should only be used to
---
> /**
> * Set just the physical address. This should only be used to
211c227,228
< void setPaddr(Addr _paddr)
---
> void
> setPaddr(Addr _paddr)
213c230
< assert(validAsidVaddr);
---
> assert(flags.any(VALID_VADDR));
215c232
< validPaddr = true;
---
> flags.set(VALID_PADDR);
218,219c235,243
< /** Accessor for paddr. */
< Addr getPaddr() { assert(validPaddr); return paddr; }
---
> /**
> * Accessor for paddr.
> */
> Addr
> getPaddr()
> {
> assert(flags.any(VALID_PADDR));
> return paddr;
> }
221,222c245,254
< /** Accessor for size. */
< int getSize() { assert(validPaddr || validAsidVaddr); return size; }
---
> /**
> * Accessor for size.
> */
> int
> getSize()
> {
> assert(flags.any(VALID_SIZE));
> return size;
> }
>
224,225c256,262
< Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
< void resetTime() { assert(validPaddr || validAsidVaddr); time = curTick; }
---
> Tick
> getTime()
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> return time;
> }
>
229c266
< assert(validPaddr || validAsidVaddr);
---
> assert(flags.any(VALID_PADDR|VALID_VADDR));
232a270,271
> void resetTime() { setTime(curTick); }
>
234,237c273,278
< uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
< /** Accessor for paddr. */
< void setFlags(uint32_t _flags)
< { assert(validPaddr || validAsidVaddr); flags = _flags; }
---
> Flags
> getFlags()
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> return flags & PUBLIC_FLAGS;
> }
238a280,319
> Flags
> anyFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> return flags.any(_flags);
> }
>
> Flags
> allFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> return flags.all(_flags);
> }
>
> /** Accessor for flags. */
> void
> setFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> flags.set(_flags);
> }
>
> void
> clearFlags(Flags _flags)
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> assert(_flags.none(~PUBLIC_FLAGS));
> flags.clear(_flags);
> }
>
> void
> clearFlags()
> {
> assert(flags.any(VALID_PADDR|VALID_VADDR));
> flags.clear(PUBLIC_FLAGS);
> }
>
240c321,326
< Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
---
> Addr
> getVaddr()
> {
> assert(flags.any(VALID_VADDR));
> return vaddr;
> }
243c329,334
< int getAsid() { assert(validAsidVaddr); return asid; }
---
> int
> getAsid()
> {
> assert(flags.any(VALID_VADDR));
> return asid;
> }
246c337,342
< uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
---
> uint8_t
> getAsi()
> {
> assert(flags.any(VALID_VADDR));
> return flags & ASI_BITS;
> }
249,250c345,350
< void setAsi(uint8_t a)
< { assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
---
> void
> setAsi(uint8_t a)
> {
> assert(flags.any(VALID_VADDR));
> flags.update(a, ASI_BITS);
> }
253c353,358
< bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
---
> bool
> isMmapedIpr()
> {
> assert(flags.any(VALID_PADDR));
> return flags.any(MMAPED_IPR);
> }
256c361,366
< void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
---
> void
> setMmapedIpr(bool r)
> {
> assert(VALID_VADDR);
> flags.set(MMAPED_IPR);
> }
259c369,374
< bool extraDataValid() { return validExData; }
---
> bool
> extraDataValid()
> {
> return flags.any(VALID_EXTRA_DATA);
> }
>
261c376,382
< uint64_t getExtraData() { assert(validExData); return extraData; }
---
> uint64_t
> getExtraData() const
> {
> assert(flags.any(VALID_EXTRA_DATA));
> return extraData;
> }
>
263,264c384,389
< void setExtraData(uint64_t _extraData)
< { extraData = _extraData; validExData = true; }
---
> void
> setExtraData(uint64_t _extraData)
> {
> extraData = _extraData;
> flags.set(VALID_EXTRA_DATA);
> }
267c392,398
< int contextId() { assert(validContextAndThreadIds); return _contextId; }
---
> int
> contextId() const
> {
> assert(flags.any(VALID_CONTEXT_ID));
> return _contextId;
> }
>
269c400,405
< int threadId() { assert(validContextAndThreadIds); return _threadId; }
---
> int
> threadId() const
> {
> assert(flags.any(VALID_THREAD_ID));
> return _threadId;
> }
272c408,413
< Addr getPC() { assert(validPC); return pc; }
---
> Addr
> getPC() const
> {
> assert(flags.any(VALID_PC));
> return pc;
> }
275c416,420
< bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
---
> bool isUncacheable() const { return flags.any(UNCACHEABLE); }
> bool isInstRead() const { return flags.any(INST_READ); }
> bool isLocked() const { return flags.any(LOCKED); }
> bool isSwap() const { return flags.any(MEM_SWAP|MEM_SWAP_COND); }
> bool isCondSwap() const { return flags.any(MEM_SWAP_COND); }
277c422,426
< bool isInstRead() { return (getFlags() & INST_READ) != 0; }
---
> bool
> isMisaligned() const
> {
> if (flags.any(NO_ALIGN_FAULT))
> return false;
279c428,429
< bool isLocked() { return (getFlags() & LOCKED) != 0; }
---
> if ((vaddr & 0x1))
> return true;
281,282c431,432
< bool isSwap() { return (getFlags() & MEM_SWAP ||
< getFlags() & MEM_SWAP_COND); }
---
> if (flags.any(NO_HALF_WORD_ALIGN_FAULT))
> return false;
284c434,435
< bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
---
> if ((vaddr & 0x2))
> return true;
286,289c437,438
< bool inline isMisaligned() {return (!(getFlags() & NO_ALIGN_FAULT) &&
< ((vaddr & 1) ||
< (!(getFlags() & NO_HALF_WORD_ALIGN_FAULT)
< && (vaddr & 0x2))));}
---
> return false;
> }