1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include <cassert>
43
44#include "base/fast_alloc.hh"
45#include "base/flags.hh"
46#include "base/misc.hh"
47#include "sim/host.hh"
48#include "sim/core.hh"
49
50class Request;
51
52typedef Request* RequestPtr;
53
54class Request : public FastAlloc
55{
| 1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include <cassert>
43
44#include "base/fast_alloc.hh"
45#include "base/flags.hh"
46#include "base/misc.hh"
47#include "sim/host.hh"
48#include "sim/core.hh"
49
50class Request;
51
52typedef Request* RequestPtr;
53
54class Request : public FastAlloc
55{
|
56 friend class Packet;
57
| |
58 public:
59 typedef uint32_t FlagsType;
60 typedef ::Flags<FlagsType> Flags;
61
62 /** ASI information for this request if it exists. */
63 static const FlagsType ASI_BITS = 0x000000FF;
64 /** The request is a Load locked/store conditional. */
65 static const FlagsType LLSC = 0x00000100;
66 /** The virtual address is also the physical address. */
67 static const FlagsType PHYSICAL = 0x00000200;
68 /** The request is an ALPHA VPTE pal access (hw_ld). */
69 static const FlagsType VPTE = 0x00000400;
70 /** Use the alternate mode bits in ALPHA. */
71 static const FlagsType ALTMODE = 0x00000800;
72 /** The request is to an uncacheable address. */
73 static const FlagsType UNCACHEABLE = 0x00001000;
74 /** The request should not cause a page fault. */
75 static const FlagsType NO_FAULT = 0x00002000;
76 /** The request should not cause a memory access. */
77 static const FlagsType NO_ACCESS = 0x00004000;
78 /** This request will lock or unlock the accessed memory. When used with
79 * a load, the access locks the particular chunk of memory. When used
80 * with a store, it unlocks. The rule is that locked accesses have to be
81 * made up of a locked load, some operation on the data, and then a locked
82 * store.
83 */
84 static const FlagsType LOCKED = 0x00008000;
85 /** The request should be prefetched into the exclusive state. */
86 static const FlagsType PF_EXCLUSIVE = 0x00010000;
87 /** The request should be marked as LRU. */
88 static const FlagsType EVICT_NEXT = 0x00020000;
89 /** The request should ignore unaligned access faults */
90 static const FlagsType NO_ALIGN_FAULT = 0x00040000;
91 /** The request was an instruction read. */
92 static const FlagsType INST_READ = 0x00080000;
93 /** This request is for a memory swap. */
94 static const FlagsType MEM_SWAP = 0x00100000;
95 static const FlagsType MEM_SWAP_COND = 0x00200000;
96 /** The request should ignore unaligned access faults */
97 static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000;
98 /** This request is to a memory mapped register. */
99 static const FlagsType MMAPED_IPR = 0x00800000;
100
| 56 public:
57 typedef uint32_t FlagsType;
58 typedef ::Flags<FlagsType> Flags;
59
60 /** ASI information for this request if it exists. */
61 static const FlagsType ASI_BITS = 0x000000FF;
62 /** The request is a Load locked/store conditional. */
63 static const FlagsType LLSC = 0x00000100;
64 /** The virtual address is also the physical address. */
65 static const FlagsType PHYSICAL = 0x00000200;
66 /** The request is an ALPHA VPTE pal access (hw_ld). */
67 static const FlagsType VPTE = 0x00000400;
68 /** Use the alternate mode bits in ALPHA. */
69 static const FlagsType ALTMODE = 0x00000800;
70 /** The request is to an uncacheable address. */
71 static const FlagsType UNCACHEABLE = 0x00001000;
72 /** The request should not cause a page fault. */
73 static const FlagsType NO_FAULT = 0x00002000;
74 /** The request should not cause a memory access. */
75 static const FlagsType NO_ACCESS = 0x00004000;
76 /** This request will lock or unlock the accessed memory. When used with
77 * a load, the access locks the particular chunk of memory. When used
78 * with a store, it unlocks. The rule is that locked accesses have to be
79 * made up of a locked load, some operation on the data, and then a locked
80 * store.
81 */
82 static const FlagsType LOCKED = 0x00008000;
83 /** The request should be prefetched into the exclusive state. */
84 static const FlagsType PF_EXCLUSIVE = 0x00010000;
85 /** The request should be marked as LRU. */
86 static const FlagsType EVICT_NEXT = 0x00020000;
87 /** The request should ignore unaligned access faults */
88 static const FlagsType NO_ALIGN_FAULT = 0x00040000;
89 /** The request was an instruction read. */
90 static const FlagsType INST_READ = 0x00080000;
91 /** This request is for a memory swap. */
92 static const FlagsType MEM_SWAP = 0x00100000;
93 static const FlagsType MEM_SWAP_COND = 0x00200000;
94 /** The request should ignore unaligned access faults */
95 static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000;
96 /** This request is to a memory mapped register. */
97 static const FlagsType MMAPED_IPR = 0x00800000;
98
|
| 99 /** These flags are *not* cleared when a Request object is reused
100 (assigned a new address). */
101 static const FlagsType STICKY_FLAGS = INST_READ;
102
|
101 private:
| 103 private:
|
102 static const FlagsType PUBLIC_FLAGS = 0x00FFFFFF;
103 static const FlagsType PRIVATE_FLAGS = 0xFF000000;
| 104 typedef uint8_t PrivateFlagsType;
105 typedef ::Flags<PrivateFlagsType> PrivateFlags;
|
104
105 /** Whether or not the size is valid. */
| 106
107 /** Whether or not the size is valid. */
|
106 static const FlagsType VALID_SIZE = 0x01000000;
| 108 static const PrivateFlagsType VALID_SIZE = 0x00000001;
|
107 /** Whether or not paddr is valid (has been written yet). */
| 109 /** Whether or not paddr is valid (has been written yet). */
|
108 static const FlagsType VALID_PADDR = 0x02000000;
| 110 static const PrivateFlagsType VALID_PADDR = 0x00000002;
|
109 /** Whether or not the vaddr & asid are valid. */
| 111 /** Whether or not the vaddr & asid are valid. */
|
110 static const FlagsType VALID_VADDR = 0x04000000;
| 112 static const PrivateFlagsType VALID_VADDR = 0x00000004;
|
111 /** Whether or not the pc is valid. */
| 113 /** Whether or not the pc is valid. */
|
112 static const FlagsType VALID_PC = 0x10000000;
| 114 static const PrivateFlagsType VALID_PC = 0x00000010;
|
113 /** Whether or not the context ID is valid. */
| 115 /** Whether or not the context ID is valid. */
|
114 static const FlagsType VALID_CONTEXT_ID = 0x20000000;
115 static const FlagsType VALID_THREAD_ID = 0x40000000;
| 116 static const PrivateFlagsType VALID_CONTEXT_ID = 0x00000020;
117 static const PrivateFlagsType VALID_THREAD_ID = 0x00000040;
|
116 /** Whether or not the sc result is valid. */
| 118 /** Whether or not the sc result is valid. */
|
117 static const FlagsType VALID_EXTRA_DATA = 0x80000000;
| 119 static const PrivateFlagsType VALID_EXTRA_DATA = 0x00000080;
|
118
| 120
|
| 121 /** These flags are *not* cleared when a Request object is reused
122 (assigned a new address). */
123 static const PrivateFlagsType STICKY_PRIVATE_FLAGS =
124 VALID_CONTEXT_ID | VALID_THREAD_ID;
125
|
119 private:
120 /**
121 * The physical address of the request. Valid only if validPaddr
122 * is set.
123 */
124 Addr paddr;
125
126 /**
127 * The size of the request. This field must be set when vaddr or
128 * paddr is written via setVirt() or setPhys(), so it is always
129 * valid as long as one of the address fields is valid.
130 */
131 int size;
132
133 /** Flag structure for the request. */
134 Flags flags;
135
| 126 private:
127 /**
128 * The physical address of the request. Valid only if validPaddr
129 * is set.
130 */
131 Addr paddr;
132
133 /**
134 * The size of the request. This field must be set when vaddr or
135 * paddr is written via setVirt() or setPhys(), so it is always
136 * valid as long as one of the address fields is valid.
137 */
138 int size;
139
140 /** Flag structure for the request. */
141 Flags flags;
142
|
| 143 /** Private flags for field validity checking. */
144 PrivateFlags privateFlags;
145
|
136 /**
137 * The time this request was started. Used to calculate
138 * latencies. This field is set to curTick any time paddr or vaddr
139 * is written.
140 */
141 Tick time;
142
143 /** The address space ID. */
144 int asid;
145
146 /** The virtual address of the request. */
147 Addr vaddr;
148
149 /**
150 * Extra data for the request, such as the return value of
151 * store conditional or the compare value for a CAS. */
152 uint64_t extraData;
153
154 /** The context ID (for statistics, typically). */
155 int _contextId;
156 /** The thread ID (id within this CPU) */
157 int _threadId;
158
159 /** program counter of initiating access; for tracing/debugging */
160 Addr pc;
161
162 public:
163 /** Minimal constructor. No fields are initialized. */
164 Request()
165 {}
166
167 /**
168 * Constructor for physical (e.g. device) requests. Initializes
169 * just physical address, size, flags, and timestamp (to curTick).
170 * These fields are adequate to perform a request.
171 */
172 Request(Addr paddr, int size, Flags flags)
173 {
174 setPhys(paddr, size, flags);
175 }
176
177 Request(int asid, Addr vaddr, int size, Flags flags, Addr pc,
178 int cid, int tid)
179 {
| 146 /**
147 * The time this request was started. Used to calculate
148 * latencies. This field is set to curTick any time paddr or vaddr
149 * is written.
150 */
151 Tick time;
152
153 /** The address space ID. */
154 int asid;
155
156 /** The virtual address of the request. */
157 Addr vaddr;
158
159 /**
160 * Extra data for the request, such as the return value of
161 * store conditional or the compare value for a CAS. */
162 uint64_t extraData;
163
164 /** The context ID (for statistics, typically). */
165 int _contextId;
166 /** The thread ID (id within this CPU) */
167 int _threadId;
168
169 /** program counter of initiating access; for tracing/debugging */
170 Addr pc;
171
172 public:
173 /** Minimal constructor. No fields are initialized. */
174 Request()
175 {}
176
177 /**
178 * Constructor for physical (e.g. device) requests. Initializes
179 * just physical address, size, flags, and timestamp (to curTick).
180 * These fields are adequate to perform a request.
181 */
182 Request(Addr paddr, int size, Flags flags)
183 {
184 setPhys(paddr, size, flags);
185 }
186
187 Request(int asid, Addr vaddr, int size, Flags flags, Addr pc,
188 int cid, int tid)
189 {
|
180 setThreadContext(cid, tid);
| |
181 setVirt(asid, vaddr, size, flags, pc);
| 190 setVirt(asid, vaddr, size, flags, pc);
|
| 191 setThreadContext(cid, tid);
|
182 }
183
184 ~Request() {} // for FastAlloc
185
186 /**
187 * Set up CPU and thread numbers.
188 */
189 void
190 setThreadContext(int context_id, int thread_id)
191 {
192 _contextId = context_id;
193 _threadId = thread_id;
| 192 }
193
194 ~Request() {} // for FastAlloc
195
196 /**
197 * Set up CPU and thread numbers.
198 */
199 void
200 setThreadContext(int context_id, int thread_id)
201 {
202 _contextId = context_id;
203 _threadId = thread_id;
|
194 flags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
| 204 privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
|
195 }
196
197 /**
198 * Set up a physical (e.g. device) request in a previously
199 * allocated Request object.
200 */
201 void
202 setPhys(Addr _paddr, int _size, Flags _flags)
203 {
204 assert(_size >= 0);
205 paddr = _paddr;
206 size = _size;
207 time = curTick;
208
| 205 }
206
207 /**
208 * Set up a physical (e.g. device) request in a previously
209 * allocated Request object.
210 */
211 void
212 setPhys(Addr _paddr, int _size, Flags _flags)
213 {
214 assert(_size >= 0);
215 paddr = _paddr;
216 size = _size;
217 time = curTick;
218
|
209 flags.set(VALID_PADDR|VALID_SIZE);
210 flags.clear(VALID_VADDR|VALID_PC|VALID_EXTRA_DATA|MMAPED_IPR);
211 flags.update(_flags, PUBLIC_FLAGS);
| 219 flags.clear(~STICKY_FLAGS);
220 flags.set(_flags);
221 privateFlags.clear(~STICKY_PRIVATE_FLAGS);
222 privateFlags.set(VALID_PADDR|VALID_SIZE);
|
212 }
213
214 /**
215 * Set up a virtual (e.g., CPU) request in a previously
216 * allocated Request object.
217 */
218 void
219 setVirt(int _asid, Addr _vaddr, int _size, Flags _flags, Addr _pc)
220 {
221 assert(_size >= 0);
222 asid = _asid;
223 vaddr = _vaddr;
224 size = _size;
| 223 }
224
225 /**
226 * Set up a virtual (e.g., CPU) request in a previously
227 * allocated Request object.
228 */
229 void
230 setVirt(int _asid, Addr _vaddr, int _size, Flags _flags, Addr _pc)
231 {
232 assert(_size >= 0);
233 asid = _asid;
234 vaddr = _vaddr;
235 size = _size;
|
| 236 flags = _flags;
|
225 pc = _pc;
226 time = curTick;
227
| 237 pc = _pc;
238 time = curTick;
239
|
228 flags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
229 flags.clear(VALID_PADDR|VALID_EXTRA_DATA|MMAPED_IPR);
230 flags.update(_flags, PUBLIC_FLAGS);
| 240 flags.clear(~STICKY_FLAGS);
241 flags.set(_flags);
242 privateFlags.clear(~STICKY_PRIVATE_FLAGS);
243 privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
|
231 }
232
233 /**
234 * Set just the physical address. This should only be used to
235 * record the result of a translation, and thus the vaddr must be
236 * valid before this method is called. Otherwise, use setPhys()
237 * to guarantee that the size and flags are also set.
238 */
239 void
240 setPaddr(Addr _paddr)
241 {
| 244 }
245
246 /**
247 * Set just the physical address. This should only be used to
248 * record the result of a translation, and thus the vaddr must be
249 * valid before this method is called. Otherwise, use setPhys()
250 * to guarantee that the size and flags are also set.
251 */
252 void
253 setPaddr(Addr _paddr)
254 {
|
242 assert(flags.isSet(VALID_VADDR));
| 255 assert(privateFlags.isSet(VALID_VADDR));
|
243 paddr = _paddr;
| 256 paddr = _paddr;
|
244 flags.set(VALID_PADDR);
| 257 privateFlags.set(VALID_PADDR);
|
245 }
246
247 /**
248 * Generate two requests as if this request had been split into two
249 * pieces. The original request can't have been translated already.
250 */
251 void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2)
252 {
| 258 }
259
260 /**
261 * Generate two requests as if this request had been split into two
262 * pieces. The original request can't have been translated already.
263 */
264 void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2)
265 {
|
253 assert(flags.isSet(VALID_VADDR));
254 assert(flags.noneSet(VALID_PADDR));
| 266 assert(privateFlags.isSet(VALID_VADDR));
267 assert(privateFlags.noneSet(VALID_PADDR));
|
255 assert(split_addr > vaddr && split_addr < vaddr + size);
256 req1 = new Request;
257 *req1 = *this;
258 req2 = new Request;
259 *req2 = *this;
260 req1->size = split_addr - vaddr;
261 req2->vaddr = split_addr;
262 req2->size = size - req1->size;
263 }
264
265 /**
266 * Accessor for paddr.
267 */
| 268 assert(split_addr > vaddr && split_addr < vaddr + size);
269 req1 = new Request;
270 *req1 = *this;
271 req2 = new Request;
272 *req2 = *this;
273 req1->size = split_addr - vaddr;
274 req2->vaddr = split_addr;
275 req2->size = size - req1->size;
276 }
277
278 /**
279 * Accessor for paddr.
280 */
|
| 281 bool
282 hasPaddr()
283 {
284 return privateFlags.isSet(VALID_PADDR);
285 }
286
|
268 Addr
269 getPaddr()
270 {
| 287 Addr
288 getPaddr()
289 {
|
271 assert(flags.isSet(VALID_PADDR));
| 290 assert(privateFlags.isSet(VALID_PADDR));
|
272 return paddr;
273 }
274
275 /**
276 * Accessor for size.
277 */
| 291 return paddr;
292 }
293
294 /**
295 * Accessor for size.
296 */
|
| 297 bool
298 hasSize()
299 {
300 return privateFlags.isSet(VALID_SIZE);
301 }
302
|
278 int
279 getSize()
280 {
| 303 int
304 getSize()
305 {
|
281 assert(flags.isSet(VALID_SIZE));
| 306 assert(privateFlags.isSet(VALID_SIZE));
|
282 return size;
283 }
284
285 /** Accessor for time. */
286 Tick
287 getTime()
288 {
| 307 return size;
308 }
309
310 /** Accessor for time. */
311 Tick
312 getTime()
313 {
|
289 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
| 314 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
|
290 return time;
291 }
292
| 315 return time;
316 }
317
|
293 void
294 setTime(Tick when)
295 {
296 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
297 time = when;
298 }
299
| |
300 /** Accessor for flags. */
301 Flags
302 getFlags()
303 {
| 318 /** Accessor for flags. */
319 Flags
320 getFlags()
321 {
|
304 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
305 return flags & PUBLIC_FLAGS;
| 322 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
323 return flags;
|
306 }
307
| 324 }
325
|
308 Flags
309 anyFlags(Flags _flags)
310 {
311 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
312 assert(_flags.noneSet(~PUBLIC_FLAGS));
313 return flags.isSet(_flags);
314 }
315
316 Flags
317 allFlags(Flags _flags)
318 {
319 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
320 assert(_flags.noneSet(~PUBLIC_FLAGS));
321 return flags.allSet(_flags);
322 }
323
324 /** Accessor for flags. */
| |
325 void
326 setFlags(Flags _flags)
327 {
| 326 void
327 setFlags(Flags _flags)
328 {
|
328 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
329 assert(_flags.noneSet(~PUBLIC_FLAGS));
| 329 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
|
330 flags.set(_flags);
331 }
332
| 330 flags.set(_flags);
331 }
332
|
333 void
334 clearFlags(Flags _flags)
335 {
336 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
337 assert(_flags.noneSet(~PUBLIC_FLAGS));
338 flags.clear(_flags);
339 }
340
341 void
342 clearFlags()
343 {
344 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
345 flags.clear(PUBLIC_FLAGS);
346 }
347
| |
348 /** Accessor function for vaddr.*/
349 Addr
350 getVaddr()
351 {
| 333 /** Accessor function for vaddr.*/
334 Addr
335 getVaddr()
336 {
|
352 assert(flags.isSet(VALID_VADDR));
| 337 assert(privateFlags.isSet(VALID_VADDR));
|
353 return vaddr;
354 }
355
356 /** Accessor function for asid.*/
357 int
358 getAsid()
359 {
| 338 return vaddr;
339 }
340
341 /** Accessor function for asid.*/
342 int
343 getAsid()
344 {
|
360 assert(flags.isSet(VALID_VADDR));
| 345 assert(privateFlags.isSet(VALID_VADDR));
|
361 return asid;
362 }
363
364 /** Accessor function for asi.*/
365 uint8_t
366 getAsi()
367 {
| 346 return asid;
347 }
348
349 /** Accessor function for asi.*/
350 uint8_t
351 getAsi()
352 {
|
368 assert(flags.isSet(VALID_VADDR));
| 353 assert(privateFlags.isSet(VALID_VADDR));
|
369 return flags & ASI_BITS;
370 }
371
| 354 return flags & ASI_BITS;
355 }
356
|
372 /** Accessor function for asi.*/
373 void
374 setAsi(uint8_t a)
375 {
376 assert(flags.isSet(VALID_VADDR));
377 flags.update(a, ASI_BITS);
378 }
379
380 /** Accessor function for asi.*/
| 357 /** Accessor function for MMAPED_IPR flag. */
|
381 bool
382 isMmapedIpr()
383 {
| 358 bool
359 isMmapedIpr()
360 {
|
384 assert(flags.isSet(VALID_PADDR));
| 361 assert(privateFlags.isSet(VALID_PADDR));
|
385 return flags.isSet(MMAPED_IPR);
386 }
387
| 362 return flags.isSet(MMAPED_IPR);
363 }
364
|
388 /** Accessor function for asi.*/
| |
389 void
390 setMmapedIpr(bool r)
391 {
392 assert(VALID_VADDR);
393 flags.set(MMAPED_IPR);
394 }
395
396 /** Accessor function to check if sc result is valid. */
397 bool
398 extraDataValid()
399 {
| 365 void
366 setMmapedIpr(bool r)
367 {
368 assert(VALID_VADDR);
369 flags.set(MMAPED_IPR);
370 }
371
372 /** Accessor function to check if sc result is valid. */
373 bool
374 extraDataValid()
375 {
|
400 return flags.isSet(VALID_EXTRA_DATA);
| 376 return privateFlags.isSet(VALID_EXTRA_DATA);
|
401 }
402
403 /** Accessor function for store conditional return value.*/
404 uint64_t
405 getExtraData() const
406 {
| 377 }
378
379 /** Accessor function for store conditional return value.*/
380 uint64_t
381 getExtraData() const
382 {
|
407 assert(flags.isSet(VALID_EXTRA_DATA));
| 383 assert(privateFlags.isSet(VALID_EXTRA_DATA));
|
408 return extraData;
409 }
410
411 /** Accessor function for store conditional return value.*/
412 void
413 setExtraData(uint64_t _extraData)
414 {
415 extraData = _extraData;
| 384 return extraData;
385 }
386
387 /** Accessor function for store conditional return value.*/
388 void
389 setExtraData(uint64_t _extraData)
390 {
391 extraData = _extraData;
|
416 flags.set(VALID_EXTRA_DATA);
| 392 privateFlags.set(VALID_EXTRA_DATA);
|
417 }
418
419 bool
420 hasContextId() const
421 {
| 393 }
394
395 bool
396 hasContextId() const
397 {
|
422 return flags.isSet(VALID_CONTEXT_ID);
| 398 return privateFlags.isSet(VALID_CONTEXT_ID);
|
423 }
424
425 /** Accessor function for context ID.*/
426 int
427 contextId() const
428 {
| 399 }
400
401 /** Accessor function for context ID.*/
402 int
403 contextId() const
404 {
|
429 assert(flags.isSet(VALID_CONTEXT_ID));
| 405 assert(privateFlags.isSet(VALID_CONTEXT_ID));
|
430 return _contextId;
431 }
432
433 /** Accessor function for thread ID. */
434 int
435 threadId() const
436 {
| 406 return _contextId;
407 }
408
409 /** Accessor function for thread ID. */
410 int
411 threadId() const
412 {
|
437 assert(flags.isSet(VALID_THREAD_ID));
| 413 assert(privateFlags.isSet(VALID_THREAD_ID));
|
438 return _threadId;
439 }
440
441 bool
442 hasPC() const
443 {
| 414 return _threadId;
415 }
416
417 bool
418 hasPC() const
419 {
|
444 return flags.isSet(VALID_PC);
| 420 return privateFlags.isSet(VALID_PC);
|
445 }
446
447 /** Accessor function for pc.*/
448 Addr
449 getPC() const
450 {
| 421 }
422
423 /** Accessor function for pc.*/
424 Addr
425 getPC() const
426 {
|
451 assert(flags.isSet(VALID_PC));
| 427 assert(privateFlags.isSet(VALID_PC));
|
452 return pc;
453 }
454
455 /** Accessor Function to Check Cacheability. */
456 bool isUncacheable() const { return flags.isSet(UNCACHEABLE); }
457 bool isInstRead() const { return flags.isSet(INST_READ); }
458 bool isLLSC() const { return flags.isSet(LLSC); }
459 bool isLocked() const { return flags.isSet(LOCKED); }
460 bool isSwap() const { return flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
461 bool isCondSwap() const { return flags.isSet(MEM_SWAP_COND); }
462
463 bool
464 isMisaligned() const
465 {
466 if (flags.isSet(NO_ALIGN_FAULT))
467 return false;
468
469 if ((vaddr & 0x1))
470 return true;
471
472 if (flags.isSet(NO_HALF_WORD_ALIGN_FAULT))
473 return false;
474
475 if ((vaddr & 0x2))
476 return true;
477
478 return false;
479 }
480};
481
482#endif // __MEM_REQUEST_HH__
| 428 return pc;
429 }
430
431 /** Accessor Function to Check Cacheability. */
432 bool isUncacheable() const { return flags.isSet(UNCACHEABLE); }
433 bool isInstRead() const { return flags.isSet(INST_READ); }
434 bool isLLSC() const { return flags.isSet(LLSC); }
435 bool isLocked() const { return flags.isSet(LOCKED); }
436 bool isSwap() const { return flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
437 bool isCondSwap() const { return flags.isSet(MEM_SWAP_COND); }
438
439 bool
440 isMisaligned() const
441 {
442 if (flags.isSet(NO_ALIGN_FAULT))
443 return false;
444
445 if ((vaddr & 0x1))
446 return true;
447
448 if (flags.isSet(NO_HALF_WORD_ALIGN_FAULT))
449 return false;
450
451 if ((vaddr & 0x2))
452 return true;
453
454 return false;
455 }
456};
457
458#endif // __MEM_REQUEST_HH__
|