1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ron Dreslinski 29 * Steve Reinhardt 30 * Ali Saidi 31 */ 32 33/** 34 * @file 35 * Declaration of a request, the overall memory request consisting of 36 the parts of the request that are persistent throughout the transaction. 37 */ 38 39#ifndef __MEM_REQUEST_HH__ 40#define __MEM_REQUEST_HH__ 41
| 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ron Dreslinski 29 * Steve Reinhardt 30 * Ali Saidi 31 */ 32 33/** 34 * @file 35 * Declaration of a request, the overall memory request consisting of 36 the parts of the request that are persistent throughout the transaction. 37 */ 38 39#ifndef __MEM_REQUEST_HH__ 40#define __MEM_REQUEST_HH__ 41
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| 42#include <cassert> 43
|
42#include "base/fast_alloc.hh"
| 44#include "base/fast_alloc.hh"
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| 45#include "base/flags.hh"
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43#include "sim/host.hh" 44#include "sim/core.hh" 45
| 46#include "sim/host.hh" 47#include "sim/core.hh" 48
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46#include <cassert> 47
| |
48class Request; 49 50typedef Request* RequestPtr; 51
| 49class Request; 50 51typedef Request* RequestPtr; 52
|
| 53class Request : public FastAlloc 54{ 55 public: 56 typedef uint32_t FlagsType; 57 typedef ::Flags<FlagsType> Flags;
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52
| 58
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53/** ASI information for this request if it exsits. */ 54const uint32_t ASI_BITS = 0x000FF; 55/** The request is a Load locked/store conditional. */ 56const uint32_t LOCKED = 0x00100; 57/** The virtual address is also the physical address. */ 58const uint32_t PHYSICAL = 0x00200; 59/** The request is an ALPHA VPTE pal access (hw_ld). */ 60const uint32_t VPTE = 0x00400; 61/** Use the alternate mode bits in ALPHA. */ 62const uint32_t ALTMODE = 0x00800; 63/** The request is to an uncacheable address. */ 64const uint32_t UNCACHEABLE = 0x01000; 65/** The request should not cause a page fault. */ 66const uint32_t NO_FAULT = 0x02000; 67/** The request should be prefetched into the exclusive state. */ 68const uint32_t PF_EXCLUSIVE = 0x10000; 69/** The request should be marked as LRU. */ 70const uint32_t EVICT_NEXT = 0x20000; 71/** The request should ignore unaligned access faults */ 72const uint32_t NO_ALIGN_FAULT = 0x40000; 73/** The request was an instruction read. */ 74const uint32_t INST_READ = 0x80000; 75/** This request is for a memory swap. */ 76const uint32_t MEM_SWAP = 0x100000; 77const uint32_t MEM_SWAP_COND = 0x200000; 78/** The request should ignore unaligned access faults */ 79const uint32_t NO_HALF_WORD_ALIGN_FAULT = 0x400000;
| 59 /** ASI information for this request if it exists. */ 60 static const FlagsType ASI_BITS = 0x000000FF; 61 /** The request is a Load locked/store conditional. */ 62 static const FlagsType LOCKED = 0x00000100; 63 /** The virtual address is also the physical address. */ 64 static const FlagsType PHYSICAL = 0x00000200; 65 /** The request is an ALPHA VPTE pal access (hw_ld). */ 66 static const FlagsType VPTE = 0x00000400; 67 /** Use the alternate mode bits in ALPHA. */ 68 static const FlagsType ALTMODE = 0x00000800; 69 /** The request is to an uncacheable address. */ 70 static const FlagsType UNCACHEABLE = 0x00001000; 71 /** The request should not cause a page fault. */ 72 static const FlagsType NO_FAULT = 0x00002000; 73 /** The request should be prefetched into the exclusive state. */ 74 static const FlagsType PF_EXCLUSIVE = 0x00010000; 75 /** The request should be marked as LRU. */ 76 static const FlagsType EVICT_NEXT = 0x00020000; 77 /** The request should ignore unaligned access faults */ 78 static const FlagsType NO_ALIGN_FAULT = 0x00040000; 79 /** The request was an instruction read. */ 80 static const FlagsType INST_READ = 0x00080000; 81 /** This request is for a memory swap. */ 82 static const FlagsType MEM_SWAP = 0x00100000; 83 static const FlagsType MEM_SWAP_COND = 0x00200000; 84 /** The request should ignore unaligned access faults */ 85 static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000; 86 /** This request is to a memory mapped register. */ 87 static const FlagsType MMAPED_IPR = 0x00800000;
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80
| 88
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| 89 private: 90 static const FlagsType PUBLIC_FLAGS = 0x00FF3FFF; 91 static const FlagsType PRIVATE_FLAGS = 0xFF000000;
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81
| 92
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82class Request : public FastAlloc 83{
| 93 /** Whether or not the size is valid. */ 94 static const FlagsType VALID_SIZE = 0x01000000; 95 /** Whether or not paddr is valid (has been written yet). */ 96 static const FlagsType VALID_PADDR = 0x02000000; 97 /** Whether or not the vaddr & asid are valid. */ 98 static const FlagsType VALID_VADDR = 0x04000000; 99 /** Whether or not the pc is valid. */ 100 static const FlagsType VALID_PC = 0x10000000; 101 /** Whether or not the context ID is valid. */ 102 static const FlagsType VALID_CONTEXT_ID = 0x20000000; 103 static const FlagsType VALID_THREAD_ID = 0x40000000; 104 /** Whether or not the sc result is valid. */ 105 static const FlagsType VALID_EXTRA_DATA = 0x80000000; 106
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84 private: 85 /** 86 * The physical address of the request. Valid only if validPaddr
| 107 private: 108 /** 109 * The physical address of the request. Valid only if validPaddr
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87 * is set. */
| 110 * is set. 111 */
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88 Addr paddr; 89 90 /** 91 * The size of the request. This field must be set when vaddr or 92 * paddr is written via setVirt() or setPhys(), so it is always
| 112 Addr paddr; 113 114 /** 115 * The size of the request. This field must be set when vaddr or 116 * paddr is written via setVirt() or setPhys(), so it is always
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93 * valid as long as one of the address fields is valid. */
| 117 * valid as long as one of the address fields is valid. 118 */
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94 int size; 95 96 /** Flag structure for the request. */
| 119 int size; 120 121 /** Flag structure for the request. */
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97 uint32_t flags;
| 122 Flags flags;
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98 99 /** 100 * The time this request was started. Used to calculate 101 * latencies. This field is set to curTick any time paddr or vaddr
| 123 124 /** 125 * The time this request was started. Used to calculate 126 * latencies. This field is set to curTick any time paddr or vaddr
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102 * is written. */
| 127 * is written. 128 */
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103 Tick time; 104 105 /** The address space ID. */ 106 int asid; 107
| 129 Tick time; 130 131 /** The address space ID. */ 132 int asid; 133
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108 /** This request is to a memory mapped register. */ 109 bool mmapedIpr; 110
| |
111 /** The virtual address of the request. */ 112 Addr vaddr; 113
| 134 /** The virtual address of the request. */ 135 Addr vaddr; 136
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114 /** Extra data for the request, such as the return value of
| 137 /** 138 * Extra data for the request, such as the return value of
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115 * store conditional or the compare value for a CAS. */ 116 uint64_t extraData; 117 118 /** The context ID (for statistics, typically). */ 119 int _contextId; 120 /** The thread ID (id within this CPU) */ 121 int _threadId; 122 123 /** program counter of initiating access; for tracing/debugging */ 124 Addr pc; 125
| 139 * store conditional or the compare value for a CAS. */ 140 uint64_t extraData; 141 142 /** The context ID (for statistics, typically). */ 143 int _contextId; 144 /** The thread ID (id within this CPU) */ 145 int _threadId; 146 147 /** program counter of initiating access; for tracing/debugging */ 148 Addr pc; 149
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126 /** Whether or not paddr is valid (has been written yet). */ 127 bool validPaddr; 128 /** Whether or not the asid & vaddr are valid. */ 129 bool validAsidVaddr; 130 /** Whether or not the sc result is valid. */ 131 bool validExData; 132 /** Whether or not the context ID is valid. */ 133 bool validContextAndThreadIds; 134 /** Whether or not the pc is valid. */ 135 bool validPC; 136
| |
137 public: 138 /** Minimal constructor. No fields are initialized. */ 139 Request()
| 150 public: 151 /** Minimal constructor. No fields are initialized. */ 152 Request()
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140 : validPaddr(false), validAsidVaddr(false), 141 validExData(false), validContextAndThreadIds(false), validPC(false)
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142 {} 143 144 /** 145 * Constructor for physical (e.g. device) requests. Initializes 146 * just physical address, size, flags, and timestamp (to curTick).
| 153 {} 154 155 /** 156 * Constructor for physical (e.g. device) requests. Initializes 157 * just physical address, size, flags, and timestamp (to curTick).
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147 * These fields are adequate to perform a request. */ 148 Request(Addr _paddr, int _size, int _flags) 149 : validContextAndThreadIds(false) 150 { setPhys(_paddr, _size, _flags); }
| 158 * These fields are adequate to perform a request. 159 */ 160 Request(Addr paddr, int size, Flags flags) 161 { 162 setPhys(paddr, size, flags); 163 }
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151
| 164
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152 Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc, 153 int _context_id, int _thread_id)
| 165 Request(int asid, Addr vaddr, int size, Flags flags, Addr pc, 166 int cid, int tid)
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154 {
| 167 {
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155 setThreadContext(_context_id, _thread_id); 156 setVirt(_asid, _vaddr, _size, _flags, _pc);
| 168 setThreadContext(cid, tid); 169 setVirt(asid, vaddr, size, flags, pc);
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157 } 158 159 ~Request() {} // for FastAlloc 160 161 /**
| 170 } 171 172 ~Request() {} // for FastAlloc 173 174 /**
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162 * Set up CPU and thread numbers. */ 163 void setThreadContext(int _context_id, int _thread_id)
| 175 * Set up CPU and thread numbers. 176 */ 177 void 178 setThreadContext(int context_id, int thread_id)
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164 {
| 179 {
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165 _contextId = _context_id; 166 _threadId = _thread_id; 167 validContextAndThreadIds = true;
| 180 _contextId = context_id; 181 _threadId = thread_id; 182 flags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
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168 } 169 170 /** 171 * Set up a physical (e.g. device) request in a previously
| 183 } 184 185 /** 186 * Set up a physical (e.g. device) request in a previously
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172 * allocated Request object. */ 173 void setPhys(Addr _paddr, int _size, int _flags)
| 187 * allocated Request object. 188 */ 189 void 190 setPhys(Addr _paddr, int _size, Flags _flags)
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174 { 175 assert(_size >= 0); 176 paddr = _paddr; 177 size = _size;
| 191 { 192 assert(_size >= 0); 193 paddr = _paddr; 194 size = _size;
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178 flags = _flags;
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179 time = curTick;
| 195 time = curTick;
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180 validPaddr = true; 181 validAsidVaddr = false; 182 validPC = false; 183 validExData = false; 184 mmapedIpr = false;
| 196 197 flags.set(VALID_PADDR|VALID_SIZE); 198 flags.clear(VALID_VADDR|VALID_PC|VALID_EXTRA_DATA|MMAPED_IPR); 199 flags.update(_flags, PUBLIC_FLAGS);
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185 } 186 187 /** 188 * Set up a virtual (e.g., CPU) request in a previously
| 200 } 201 202 /** 203 * Set up a virtual (e.g., CPU) request in a previously
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189 * allocated Request object. */ 190 void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
| 204 * allocated Request object. 205 */ 206 void 207 setVirt(int _asid, Addr _vaddr, int _size, Flags _flags, Addr _pc)
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191 { 192 assert(_size >= 0); 193 asid = _asid; 194 vaddr = _vaddr; 195 size = _size;
| 208 { 209 assert(_size >= 0); 210 asid = _asid; 211 vaddr = _vaddr; 212 size = _size;
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196 flags = _flags;
| |
197 pc = _pc; 198 time = curTick;
| 213 pc = _pc; 214 time = curTick;
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199 validPaddr = false; 200 validAsidVaddr = true; 201 validPC = true; 202 validExData = false; 203 mmapedIpr = false;
| 215 216 flags.set(VALID_VADDR|VALID_SIZE|VALID_PC); 217 flags.clear(VALID_PADDR|VALID_EXTRA_DATA|MMAPED_IPR); 218 flags.update(_flags, PUBLIC_FLAGS);
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204 } 205
| 219 } 220
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206 /** Set just the physical address. This should only be used to
| 221 /** 222 * Set just the physical address. This should only be used to
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207 * record the result of a translation, and thus the vaddr must be 208 * valid before this method is called. Otherwise, use setPhys() 209 * to guarantee that the size and flags are also set. 210 */
| 223 * record the result of a translation, and thus the vaddr must be 224 * valid before this method is called. Otherwise, use setPhys() 225 * to guarantee that the size and flags are also set. 226 */
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211 void setPaddr(Addr _paddr)
| 227 void 228 setPaddr(Addr _paddr)
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212 {
| 229 {
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213 assert(validAsidVaddr);
| 230 assert(flags.any(VALID_VADDR));
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214 paddr = _paddr;
| 231 paddr = _paddr;
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215 validPaddr = true;
| 232 flags.set(VALID_PADDR);
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216 } 217
| 233 } 234
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218 /** Accessor for paddr. */ 219 Addr getPaddr() { assert(validPaddr); return paddr; }
| 235 /** 236 * Accessor for paddr. 237 */ 238 Addr 239 getPaddr() 240 { 241 assert(flags.any(VALID_PADDR)); 242 return paddr; 243 }
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220
| 244
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221 /** Accessor for size. */ 222 int getSize() { assert(validPaddr || validAsidVaddr); return size; }
| 245 /** 246 * Accessor for size. 247 */ 248 int 249 getSize() 250 { 251 assert(flags.any(VALID_SIZE)); 252 return size; 253 } 254
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223 /** Accessor for time. */
| 255 /** Accessor for time. */
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224 Tick getTime() { assert(validPaddr || validAsidVaddr); return time; } 225 void resetTime() { assert(validPaddr || validAsidVaddr); time = curTick; }
| 256 Tick 257 getTime() 258 { 259 assert(flags.any(VALID_PADDR|VALID_VADDR)); 260 return time; 261 } 262
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226 void 227 setTime(Tick when) 228 {
| 263 void 264 setTime(Tick when) 265 {
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229 assert(validPaddr || validAsidVaddr);
| 266 assert(flags.any(VALID_PADDR|VALID_VADDR));
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230 time = when; 231 } 232
| 267 time = when; 268 } 269
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| 270 void resetTime() { setTime(curTick); } 271
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233 /** Accessor for flags. */
| 272 /** Accessor for flags. */
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234 uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; } 235 /** Accessor for paddr. */ 236 void setFlags(uint32_t _flags) 237 { assert(validPaddr || validAsidVaddr); flags = _flags; }
| 273 Flags 274 getFlags() 275 { 276 assert(flags.any(VALID_PADDR|VALID_VADDR)); 277 return flags & PUBLIC_FLAGS; 278 }
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238
| 279
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| 280 Flags 281 anyFlags(Flags _flags) 282 { 283 assert(flags.any(VALID_PADDR|VALID_VADDR)); 284 assert(_flags.none(~PUBLIC_FLAGS)); 285 return flags.any(_flags); 286 } 287 288 Flags 289 allFlags(Flags _flags) 290 { 291 assert(flags.any(VALID_PADDR|VALID_VADDR)); 292 assert(_flags.none(~PUBLIC_FLAGS)); 293 return flags.all(_flags); 294 } 295 296 /** Accessor for flags. */ 297 void 298 setFlags(Flags _flags) 299 { 300 assert(flags.any(VALID_PADDR|VALID_VADDR)); 301 assert(_flags.none(~PUBLIC_FLAGS)); 302 flags.set(_flags); 303 } 304 305 void 306 clearFlags(Flags _flags) 307 { 308 assert(flags.any(VALID_PADDR|VALID_VADDR)); 309 assert(_flags.none(~PUBLIC_FLAGS)); 310 flags.clear(_flags); 311 } 312 313 void 314 clearFlags() 315 { 316 assert(flags.any(VALID_PADDR|VALID_VADDR)); 317 flags.clear(PUBLIC_FLAGS); 318 } 319
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239 /** Accessor function for vaddr.*/
| 320 /** Accessor function for vaddr.*/
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240 Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
| 321 Addr 322 getVaddr() 323 { 324 assert(flags.any(VALID_VADDR)); 325 return vaddr; 326 }
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241 242 /** Accessor function for asid.*/
| 327 328 /** Accessor function for asid.*/
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243 int getAsid() { assert(validAsidVaddr); return asid; }
| 329 int 330 getAsid() 331 { 332 assert(flags.any(VALID_VADDR)); 333 return asid; 334 }
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244 245 /** Accessor function for asi.*/
| 335 336 /** Accessor function for asi.*/
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246 uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
| 337 uint8_t 338 getAsi() 339 { 340 assert(flags.any(VALID_VADDR)); 341 return flags & ASI_BITS; 342 }
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247 248 /** Accessor function for asi.*/
| 343 344 /** Accessor function for asi.*/
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249 void setAsi(uint8_t a) 250 { assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
| 345 void 346 setAsi(uint8_t a) 347 { 348 assert(flags.any(VALID_VADDR)); 349 flags.update(a, ASI_BITS); 350 }
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251 252 /** Accessor function for asi.*/
| 351 352 /** Accessor function for asi.*/
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253 bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
| 353 bool 354 isMmapedIpr() 355 { 356 assert(flags.any(VALID_PADDR)); 357 return flags.any(MMAPED_IPR); 358 }
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254 255 /** Accessor function for asi.*/
| 359 360 /** Accessor function for asi.*/
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256 void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
| 361 void 362 setMmapedIpr(bool r) 363 { 364 assert(VALID_VADDR); 365 flags.set(MMAPED_IPR); 366 }
|
257 258 /** Accessor function to check if sc result is valid. */
| 367 368 /** Accessor function to check if sc result is valid. */
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259 bool extraDataValid() { return validExData; }
| 369 bool 370 extraDataValid() 371 { 372 return flags.any(VALID_EXTRA_DATA); 373 } 374
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260 /** Accessor function for store conditional return value.*/
| 375 /** Accessor function for store conditional return value.*/
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261 uint64_t getExtraData() { assert(validExData); return extraData; }
| 376 uint64_t 377 getExtraData() const 378 { 379 assert(flags.any(VALID_EXTRA_DATA)); 380 return extraData; 381 } 382
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262 /** Accessor function for store conditional return value.*/
| 383 /** Accessor function for store conditional return value.*/
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263 void setExtraData(uint64_t _extraData) 264 { extraData = _extraData; validExData = true; }
| 384 void 385 setExtraData(uint64_t _extraData) 386 { 387 extraData = _extraData; 388 flags.set(VALID_EXTRA_DATA); 389 }
|
265 266 /** Accessor function for context ID.*/
| 390 391 /** Accessor function for context ID.*/
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267 int contextId() { assert(validContextAndThreadIds); return _contextId; }
| 392 int 393 contextId() const 394 { 395 assert(flags.any(VALID_CONTEXT_ID)); 396 return _contextId; 397 } 398
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268 /** Accessor function for thread ID. */
| 399 /** Accessor function for thread ID. */
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269 int threadId() { assert(validContextAndThreadIds); return _threadId; }
| 400 int 401 threadId() const 402 { 403 assert(flags.any(VALID_THREAD_ID)); 404 return _threadId; 405 }
|
270 271 /** Accessor function for pc.*/
| 406 407 /** Accessor function for pc.*/
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272 Addr getPC() { assert(validPC); return pc; }
| 408 Addr 409 getPC() const 410 { 411 assert(flags.any(VALID_PC)); 412 return pc; 413 }
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273 274 /** Accessor Function to Check Cacheability. */
| 414 415 /** Accessor Function to Check Cacheability. */
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275 bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
| 416 bool isUncacheable() const { return flags.any(UNCACHEABLE); } 417 bool isInstRead() const { return flags.any(INST_READ); } 418 bool isLocked() const { return flags.any(LOCKED); } 419 bool isSwap() const { return flags.any(MEM_SWAP|MEM_SWAP_COND); } 420 bool isCondSwap() const { return flags.any(MEM_SWAP_COND); }
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276
| 421
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277 bool isInstRead() { return (getFlags() & INST_READ) != 0; }
| 422 bool 423 isMisaligned() const 424 { 425 if (flags.any(NO_ALIGN_FAULT)) 426 return false;
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278
| 427
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279 bool isLocked() { return (getFlags() & LOCKED) != 0; }
| 428 if ((vaddr & 0x1)) 429 return true;
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280
| 430
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281 bool isSwap() { return (getFlags() & MEM_SWAP || 282 getFlags() & MEM_SWAP_COND); }
| 431 if (flags.any(NO_HALF_WORD_ALIGN_FAULT)) 432 return false;
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283
| 433
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284 bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
| 434 if ((vaddr & 0x2)) 435 return true;
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285
| 436
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286 bool inline isMisaligned() {return (!(getFlags() & NO_ALIGN_FAULT) && 287 ((vaddr & 1) || 288 (!(getFlags() & NO_HALF_WORD_ALIGN_FAULT) 289 && (vaddr & 0x2))));}
| 437 return false; 438 }
|
290 291 friend class Packet; 292}; 293 294#endif // __MEM_REQUEST_HH__
| 439 440 friend class Packet; 441}; 442 443#endif // __MEM_REQUEST_HH__
|