1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include "base/fast_alloc.hh"
43#include "sim/host.hh"
44#include "sim/core.hh"
45
46#include <cassert>
47
48class Request;
49
50typedef Request* RequestPtr;
51
52
53/** ASI information for this request if it exsits. */
54const uint32_t ASI_BITS = 0x000FF;
55/** The request is a Load locked/store conditional. */
56const uint32_t LOCKED = 0x00100;
57/** The virtual address is also the physical address. */
58const uint32_t PHYSICAL = 0x00200;
59/** The request is an ALPHA VPTE pal access (hw_ld). */
60const uint32_t VPTE = 0x00400;
61/** Use the alternate mode bits in ALPHA. */
62const uint32_t ALTMODE = 0x00800;
63/** The request is to an uncacheable address. */
64const uint32_t UNCACHEABLE = 0x01000;
65/** The request should not cause a page fault. */
66const uint32_t NO_FAULT = 0x02000;
67/** The request should be prefetched into the exclusive state. */
68const uint32_t PF_EXCLUSIVE = 0x10000;
69/** The request should be marked as LRU. */
70const uint32_t EVICT_NEXT = 0x20000;
71/** The request should ignore unaligned access faults */
72const uint32_t NO_ALIGN_FAULT = 0x40000;
73/** The request was an instruction read. */
74const uint32_t INST_READ = 0x80000;
75/** This request is for a memory swap. */
76const uint32_t MEM_SWAP = 0x100000;
77const uint32_t MEM_SWAP_COND = 0x200000;
| 1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include "base/fast_alloc.hh"
43#include "sim/host.hh"
44#include "sim/core.hh"
45
46#include <cassert>
47
48class Request;
49
50typedef Request* RequestPtr;
51
52
53/** ASI information for this request if it exsits. */
54const uint32_t ASI_BITS = 0x000FF;
55/** The request is a Load locked/store conditional. */
56const uint32_t LOCKED = 0x00100;
57/** The virtual address is also the physical address. */
58const uint32_t PHYSICAL = 0x00200;
59/** The request is an ALPHA VPTE pal access (hw_ld). */
60const uint32_t VPTE = 0x00400;
61/** Use the alternate mode bits in ALPHA. */
62const uint32_t ALTMODE = 0x00800;
63/** The request is to an uncacheable address. */
64const uint32_t UNCACHEABLE = 0x01000;
65/** The request should not cause a page fault. */
66const uint32_t NO_FAULT = 0x02000;
67/** The request should be prefetched into the exclusive state. */
68const uint32_t PF_EXCLUSIVE = 0x10000;
69/** The request should be marked as LRU. */
70const uint32_t EVICT_NEXT = 0x20000;
71/** The request should ignore unaligned access faults */
72const uint32_t NO_ALIGN_FAULT = 0x40000;
73/** The request was an instruction read. */
74const uint32_t INST_READ = 0x80000;
75/** This request is for a memory swap. */
76const uint32_t MEM_SWAP = 0x100000;
77const uint32_t MEM_SWAP_COND = 0x200000;
|
78
79
80class Request : public FastAlloc
81{
82 private:
83 /**
84 * The physical address of the request. Valid only if validPaddr
85 * is set. */
86 Addr paddr;
87
88 /**
89 * The size of the request. This field must be set when vaddr or
90 * paddr is written via setVirt() or setPhys(), so it is always
91 * valid as long as one of the address fields is valid. */
92 int size;
93
94 /** Flag structure for the request. */
95 uint32_t flags;
96
97 /**
98 * The time this request was started. Used to calculate
99 * latencies. This field is set to curTick any time paddr or vaddr
100 * is written. */
101 Tick time;
102
103 /** The address space ID. */
104 int asid;
105
106 /** This request is to a memory mapped register. */
107 bool mmapedIpr;
108
109 /** The virtual address of the request. */
110 Addr vaddr;
111
112 /** Extra data for the request, such as the return value of
113 * store conditional or the compare value for a CAS. */
114 uint64_t extraData;
115
116 /** The cpu number (for statistics, typically). */
117 int cpuNum;
118 /** The requesting thread id (for statistics, typically). */
119 int threadNum;
120
121 /** program counter of initiating access; for tracing/debugging */
122 Addr pc;
123
124 /** Whether or not paddr is valid (has been written yet). */
125 bool validPaddr;
126 /** Whether or not the asid & vaddr are valid. */
127 bool validAsidVaddr;
128 /** Whether or not the sc result is valid. */
129 bool validExData;
130 /** Whether or not the cpu number & thread ID are valid. */
131 bool validCpuAndThreadNums;
132 /** Whether or not the pc is valid. */
133 bool validPC;
134
135 public:
136 /** Minimal constructor. No fields are initialized. */
137 Request()
138 : validPaddr(false), validAsidVaddr(false),
139 validExData(false), validCpuAndThreadNums(false), validPC(false)
140 {}
141
142 /**
143 * Constructor for physical (e.g. device) requests. Initializes
144 * just physical address, size, flags, and timestamp (to curTick).
145 * These fields are adequate to perform a request. */
146 Request(Addr _paddr, int _size, int _flags)
147 : validCpuAndThreadNums(false)
148 { setPhys(_paddr, _size, _flags); }
149
150 Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
151 int _cpuNum, int _threadNum)
152 {
153 setThreadContext(_cpuNum, _threadNum);
154 setVirt(_asid, _vaddr, _size, _flags, _pc);
155 }
156
157 ~Request() {} // for FastAlloc
158
159 /**
160 * Set up CPU and thread numbers. */
161 void setThreadContext(int _cpuNum, int _threadNum)
162 {
163 cpuNum = _cpuNum;
164 threadNum = _threadNum;
165 validCpuAndThreadNums = true;
166 }
167
168 /**
169 * Set up a physical (e.g. device) request in a previously
170 * allocated Request object. */
171 void setPhys(Addr _paddr, int _size, int _flags)
172 {
173 paddr = _paddr;
174 size = _size;
175 flags = _flags;
176 time = curTick;
177 validPaddr = true;
178 validAsidVaddr = false;
179 validPC = false;
180 validExData = false;
181 mmapedIpr = false;
182 }
183
184 /**
185 * Set up a virtual (e.g., CPU) request in a previously
186 * allocated Request object. */
187 void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
188 {
189 asid = _asid;
190 vaddr = _vaddr;
191 size = _size;
192 flags = _flags;
193 pc = _pc;
194 time = curTick;
195 validPaddr = false;
196 validAsidVaddr = true;
197 validPC = true;
198 validExData = false;
199 mmapedIpr = false;
200 }
201
202 /** Set just the physical address. This should only be used to
203 * record the result of a translation, and thus the vaddr must be
204 * valid before this method is called. Otherwise, use setPhys()
205 * to guarantee that the size and flags are also set.
206 */
207 void setPaddr(Addr _paddr)
208 {
209 assert(validAsidVaddr);
210 paddr = _paddr;
211 validPaddr = true;
212 }
213
214 /** Accessor for paddr. */
215 Addr getPaddr() { assert(validPaddr); return paddr; }
216
217 /** Accessor for size. */
218 int getSize() { assert(validPaddr || validAsidVaddr); return size; }
219 /** Accessor for time. */
220 Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
221
222 /** Accessor for flags. */
223 uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
224 /** Accessor for paddr. */
225 void setFlags(uint32_t _flags)
226 { assert(validPaddr || validAsidVaddr); flags = _flags; }
227
228 /** Accessor function for vaddr.*/
229 Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
230
231 /** Accessor function for asid.*/
232 int getAsid() { assert(validAsidVaddr); return asid; }
233
234 /** Accessor function for asi.*/
235 uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
236
237 /** Accessor function for asi.*/
238 void setAsi(uint8_t a)
239 { assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
240
241 /** Accessor function for asi.*/
242 bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
243
244 /** Accessor function for asi.*/
245 void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
246
247 /** Accessor function to check if sc result is valid. */
248 bool extraDataValid() { return validExData; }
249 /** Accessor function for store conditional return value.*/
250 uint64_t getExtraData() { assert(validExData); return extraData; }
251 /** Accessor function for store conditional return value.*/
252 void setExtraData(uint64_t _extraData)
253 { extraData = _extraData; validExData = true; }
254
255 /** Accessor function for cpu number.*/
256 int getCpuNum() { assert(validCpuAndThreadNums); return cpuNum; }
257 /** Accessor function for thread number.*/
258 int getThreadNum() { assert(validCpuAndThreadNums); return threadNum; }
259
260 /** Accessor function for pc.*/
261 Addr getPC() { assert(validPC); return pc; }
262
263 /** Accessor Function to Check Cacheability. */
264 bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
265
266 bool isInstRead() { return (getFlags() & INST_READ) != 0; }
267
268 bool isLocked() { return (getFlags() & LOCKED) != 0; }
269
270 bool isSwap() { return (getFlags() & MEM_SWAP ||
271 getFlags() & MEM_SWAP_COND); }
272
273 bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
274
| 80
81
82class Request : public FastAlloc
83{
84 private:
85 /**
86 * The physical address of the request. Valid only if validPaddr
87 * is set. */
88 Addr paddr;
89
90 /**
91 * The size of the request. This field must be set when vaddr or
92 * paddr is written via setVirt() or setPhys(), so it is always
93 * valid as long as one of the address fields is valid. */
94 int size;
95
96 /** Flag structure for the request. */
97 uint32_t flags;
98
99 /**
100 * The time this request was started. Used to calculate
101 * latencies. This field is set to curTick any time paddr or vaddr
102 * is written. */
103 Tick time;
104
105 /** The address space ID. */
106 int asid;
107
108 /** This request is to a memory mapped register. */
109 bool mmapedIpr;
110
111 /** The virtual address of the request. */
112 Addr vaddr;
113
114 /** Extra data for the request, such as the return value of
115 * store conditional or the compare value for a CAS. */
116 uint64_t extraData;
117
118 /** The cpu number (for statistics, typically). */
119 int cpuNum;
120 /** The requesting thread id (for statistics, typically). */
121 int threadNum;
122
123 /** program counter of initiating access; for tracing/debugging */
124 Addr pc;
125
126 /** Whether or not paddr is valid (has been written yet). */
127 bool validPaddr;
128 /** Whether or not the asid & vaddr are valid. */
129 bool validAsidVaddr;
130 /** Whether or not the sc result is valid. */
131 bool validExData;
132 /** Whether or not the cpu number & thread ID are valid. */
133 bool validCpuAndThreadNums;
134 /** Whether or not the pc is valid. */
135 bool validPC;
136
137 public:
138 /** Minimal constructor. No fields are initialized. */
139 Request()
140 : validPaddr(false), validAsidVaddr(false),
141 validExData(false), validCpuAndThreadNums(false), validPC(false)
142 {}
143
144 /**
145 * Constructor for physical (e.g. device) requests. Initializes
146 * just physical address, size, flags, and timestamp (to curTick).
147 * These fields are adequate to perform a request. */
148 Request(Addr _paddr, int _size, int _flags)
149 : validCpuAndThreadNums(false)
150 { setPhys(_paddr, _size, _flags); }
151
152 Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
153 int _cpuNum, int _threadNum)
154 {
155 setThreadContext(_cpuNum, _threadNum);
156 setVirt(_asid, _vaddr, _size, _flags, _pc);
157 }
158
159 ~Request() {} // for FastAlloc
160
161 /**
162 * Set up CPU and thread numbers. */
163 void setThreadContext(int _cpuNum, int _threadNum)
164 {
165 cpuNum = _cpuNum;
166 threadNum = _threadNum;
167 validCpuAndThreadNums = true;
168 }
169
170 /**
171 * Set up a physical (e.g. device) request in a previously
172 * allocated Request object. */
173 void setPhys(Addr _paddr, int _size, int _flags)
174 {
175 paddr = _paddr;
176 size = _size;
177 flags = _flags;
178 time = curTick;
179 validPaddr = true;
180 validAsidVaddr = false;
181 validPC = false;
182 validExData = false;
183 mmapedIpr = false;
184 }
185
186 /**
187 * Set up a virtual (e.g., CPU) request in a previously
188 * allocated Request object. */
189 void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
190 {
191 asid = _asid;
192 vaddr = _vaddr;
193 size = _size;
194 flags = _flags;
195 pc = _pc;
196 time = curTick;
197 validPaddr = false;
198 validAsidVaddr = true;
199 validPC = true;
200 validExData = false;
201 mmapedIpr = false;
202 }
203
204 /** Set just the physical address. This should only be used to
205 * record the result of a translation, and thus the vaddr must be
206 * valid before this method is called. Otherwise, use setPhys()
207 * to guarantee that the size and flags are also set.
208 */
209 void setPaddr(Addr _paddr)
210 {
211 assert(validAsidVaddr);
212 paddr = _paddr;
213 validPaddr = true;
214 }
215
216 /** Accessor for paddr. */
217 Addr getPaddr() { assert(validPaddr); return paddr; }
218
219 /** Accessor for size. */
220 int getSize() { assert(validPaddr || validAsidVaddr); return size; }
221 /** Accessor for time. */
222 Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
223
224 /** Accessor for flags. */
225 uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
226 /** Accessor for paddr. */
227 void setFlags(uint32_t _flags)
228 { assert(validPaddr || validAsidVaddr); flags = _flags; }
229
230 /** Accessor function for vaddr.*/
231 Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
232
233 /** Accessor function for asid.*/
234 int getAsid() { assert(validAsidVaddr); return asid; }
235
236 /** Accessor function for asi.*/
237 uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
238
239 /** Accessor function for asi.*/
240 void setAsi(uint8_t a)
241 { assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
242
243 /** Accessor function for asi.*/
244 bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
245
246 /** Accessor function for asi.*/
247 void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
248
249 /** Accessor function to check if sc result is valid. */
250 bool extraDataValid() { return validExData; }
251 /** Accessor function for store conditional return value.*/
252 uint64_t getExtraData() { assert(validExData); return extraData; }
253 /** Accessor function for store conditional return value.*/
254 void setExtraData(uint64_t _extraData)
255 { extraData = _extraData; validExData = true; }
256
257 /** Accessor function for cpu number.*/
258 int getCpuNum() { assert(validCpuAndThreadNums); return cpuNum; }
259 /** Accessor function for thread number.*/
260 int getThreadNum() { assert(validCpuAndThreadNums); return threadNum; }
261
262 /** Accessor function for pc.*/
263 Addr getPC() { assert(validPC); return pc; }
264
265 /** Accessor Function to Check Cacheability. */
266 bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
267
268 bool isInstRead() { return (getFlags() & INST_READ) != 0; }
269
270 bool isLocked() { return (getFlags() & LOCKED) != 0; }
271
272 bool isSwap() { return (getFlags() & MEM_SWAP ||
273 getFlags() & MEM_SWAP_COND); }
274
275 bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
276
|