1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include "sim/host.hh"
43#include "sim/root.hh"
44
45#include <cassert>
46
47class Request;
48
49typedef Request* RequestPtr;
50
51
| 1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include "sim/host.hh"
43#include "sim/root.hh"
44
45#include <cassert>
46
47class Request;
48
49typedef Request* RequestPtr;
50
51
|
| 52/** ASI information for this request if it exsits. */
53const uint32_t ASI_BITS = 0x000FF;
|
52/** The request is a Load locked/store conditional. */
| 54/** The request is a Load locked/store conditional. */
|
53const unsigned LOCKED = 0x001;
| 55const uint32_t LOCKED = 0x00100;
|
54/** The virtual address is also the physical address. */
| 56/** The virtual address is also the physical address. */
|
55const unsigned PHYSICAL = 0x002;
| 57const uint32_t PHYSICAL = 0x00200;
|
56/** The request is an ALPHA VPTE pal access (hw_ld). */
| 58/** The request is an ALPHA VPTE pal access (hw_ld). */
|
57const unsigned VPTE = 0x004;
| 59const uint32_t VPTE = 0x00400;
|
58/** Use the alternate mode bits in ALPHA. */
| 60/** Use the alternate mode bits in ALPHA. */
|
59const unsigned ALTMODE = 0x008;
| 61const uint32_t ALTMODE = 0x00800;
|
60/** The request is to an uncacheable address. */
| 62/** The request is to an uncacheable address. */
|
61const unsigned UNCACHEABLE = 0x010;
| 63const uint32_t UNCACHEABLE = 0x01000;
|
62/** The request should not cause a page fault. */
| 64/** The request should not cause a page fault. */
|
63const unsigned NO_FAULT = 0x020;
| 65const uint32_t NO_FAULT = 0x02000;
|
64/** The request should be prefetched into the exclusive state. */
| 66/** The request should be prefetched into the exclusive state. */
|
65const unsigned PF_EXCLUSIVE = 0x100;
| 67const uint32_t PF_EXCLUSIVE = 0x10000;
|
66/** The request should be marked as LRU. */
| 68/** The request should be marked as LRU. */
|
67const unsigned EVICT_NEXT = 0x200;
| 69const uint32_t EVICT_NEXT = 0x20000;
|
68/** The request should ignore unaligned access faults */
| 70/** The request should ignore unaligned access faults */
|
69const unsigned NO_ALIGN_FAULT = 0x400;
| 71const uint32_t NO_ALIGN_FAULT = 0x40000;
|
70/** The request was an instruction read. */
| 72/** The request was an instruction read. */
|
71const unsigned INST_READ = 0x800;
| 73const uint32_t INST_READ = 0x80000;
|
72
73class Request
74{
75 private:
76 /**
77 * The physical address of the request. Valid only if validPaddr
78 * is set. */
79 Addr paddr;
80
81 /**
82 * The size of the request. This field must be set when vaddr or
83 * paddr is written via setVirt() or setPhys(), so it is always
84 * valid as long as one of the address fields is valid. */
85 int size;
86
87 /** Flag structure for the request. */
88 uint32_t flags;
89
90 /**
91 * The time this request was started. Used to calculate
92 * latencies. This field is set to curTick any time paddr or vaddr
93 * is written. */
94 Tick time;
95
96 /** The address space ID. */
97 int asid;
| 74
75class Request
76{
77 private:
78 /**
79 * The physical address of the request. Valid only if validPaddr
80 * is set. */
81 Addr paddr;
82
83 /**
84 * The size of the request. This field must be set when vaddr or
85 * paddr is written via setVirt() or setPhys(), so it is always
86 * valid as long as one of the address fields is valid. */
87 int size;
88
89 /** Flag structure for the request. */
90 uint32_t flags;
91
92 /**
93 * The time this request was started. Used to calculate
94 * latencies. This field is set to curTick any time paddr or vaddr
95 * is written. */
96 Tick time;
97
98 /** The address space ID. */
99 int asid;
|
98 /** The ASI is any -- SPARC ONLY */
99 int asi;
| 100
|
100 /** This request is to a memory mapped register. */
| 101 /** This request is to a memory mapped register. */
|
101 bool mmapedReg;
| 102 bool mmapedIpr;
|
102
103 /** The virtual address of the request. */
104 Addr vaddr;
105
106 /** The return value of store conditional. */
107 uint64_t scResult;
108
109 /** The cpu number (for statistics, typically). */
110 int cpuNum;
111 /** The requesting thread id (for statistics, typically). */
112 int threadNum;
113
114 /** program counter of initiating access; for tracing/debugging */
115 Addr pc;
116
117 /** Whether or not paddr is valid (has been written yet). */
118 bool validPaddr;
119 /** Whether or not the asid & vaddr are valid. */
120 bool validAsidVaddr;
121 /** Whether or not the sc result is valid. */
122 bool validScResult;
123 /** Whether or not the cpu number & thread ID are valid. */
124 bool validCpuAndThreadNums;
125 /** Whether or not the pc is valid. */
126 bool validPC;
127
128 public:
129 /** Minimal constructor. No fields are initialized. */
130 Request()
131 : validPaddr(false), validAsidVaddr(false),
132 validScResult(false), validCpuAndThreadNums(false), validPC(false)
133 {}
134
135 /**
136 * Constructor for physical (e.g. device) requests. Initializes
137 * just physical address, size, flags, and timestamp (to curTick).
138 * These fields are adequate to perform a request. */
139 Request(Addr _paddr, int _size, int _flags)
140 : validCpuAndThreadNums(false)
141 { setPhys(_paddr, _size, _flags); }
142
143 Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
144 int _cpuNum, int _threadNum)
145 {
146 setThreadContext(_cpuNum, _threadNum);
147 setVirt(_asid, _vaddr, _size, _flags, _pc);
148 }
149
150 /**
151 * Set up CPU and thread numbers. */
152 void setThreadContext(int _cpuNum, int _threadNum)
153 {
154 cpuNum = _cpuNum;
155 threadNum = _threadNum;
156 validCpuAndThreadNums = true;
157 }
158
159 /**
160 * Set up a physical (e.g. device) request in a previously
161 * allocated Request object. */
162 void setPhys(Addr _paddr, int _size, int _flags)
163 {
164 paddr = _paddr;
165 size = _size;
166 flags = _flags;
167 time = curTick;
168 validPaddr = true;
169 validAsidVaddr = false;
170 validPC = false;
171 validScResult = false;
| 103
104 /** The virtual address of the request. */
105 Addr vaddr;
106
107 /** The return value of store conditional. */
108 uint64_t scResult;
109
110 /** The cpu number (for statistics, typically). */
111 int cpuNum;
112 /** The requesting thread id (for statistics, typically). */
113 int threadNum;
114
115 /** program counter of initiating access; for tracing/debugging */
116 Addr pc;
117
118 /** Whether or not paddr is valid (has been written yet). */
119 bool validPaddr;
120 /** Whether or not the asid & vaddr are valid. */
121 bool validAsidVaddr;
122 /** Whether or not the sc result is valid. */
123 bool validScResult;
124 /** Whether or not the cpu number & thread ID are valid. */
125 bool validCpuAndThreadNums;
126 /** Whether or not the pc is valid. */
127 bool validPC;
128
129 public:
130 /** Minimal constructor. No fields are initialized. */
131 Request()
132 : validPaddr(false), validAsidVaddr(false),
133 validScResult(false), validCpuAndThreadNums(false), validPC(false)
134 {}
135
136 /**
137 * Constructor for physical (e.g. device) requests. Initializes
138 * just physical address, size, flags, and timestamp (to curTick).
139 * These fields are adequate to perform a request. */
140 Request(Addr _paddr, int _size, int _flags)
141 : validCpuAndThreadNums(false)
142 { setPhys(_paddr, _size, _flags); }
143
144 Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
145 int _cpuNum, int _threadNum)
146 {
147 setThreadContext(_cpuNum, _threadNum);
148 setVirt(_asid, _vaddr, _size, _flags, _pc);
149 }
150
151 /**
152 * Set up CPU and thread numbers. */
153 void setThreadContext(int _cpuNum, int _threadNum)
154 {
155 cpuNum = _cpuNum;
156 threadNum = _threadNum;
157 validCpuAndThreadNums = true;
158 }
159
160 /**
161 * Set up a physical (e.g. device) request in a previously
162 * allocated Request object. */
163 void setPhys(Addr _paddr, int _size, int _flags)
164 {
165 paddr = _paddr;
166 size = _size;
167 flags = _flags;
168 time = curTick;
169 validPaddr = true;
170 validAsidVaddr = false;
171 validPC = false;
172 validScResult = false;
|
| 173 mmapedIpr = false;
|
172 }
173
174 /**
175 * Set up a virtual (e.g., CPU) request in a previously
176 * allocated Request object. */
177 void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
178 {
179 asid = _asid;
180 vaddr = _vaddr;
181 size = _size;
182 flags = _flags;
183 pc = _pc;
184 time = curTick;
185 validPaddr = false;
186 validAsidVaddr = true;
187 validPC = true;
188 validScResult = false;
| 174 }
175
176 /**
177 * Set up a virtual (e.g., CPU) request in a previously
178 * allocated Request object. */
179 void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
180 {
181 asid = _asid;
182 vaddr = _vaddr;
183 size = _size;
184 flags = _flags;
185 pc = _pc;
186 time = curTick;
187 validPaddr = false;
188 validAsidVaddr = true;
189 validPC = true;
190 validScResult = false;
|
| 191 mmapedIpr = false;
|
189 }
190
191 /** Set just the physical address. This should only be used to
192 * record the result of a translation, and thus the vaddr must be
193 * valid before this method is called. Otherwise, use setPhys()
194 * to guarantee that the size and flags are also set.
195 */
196 void setPaddr(Addr _paddr)
197 {
198 assert(validAsidVaddr);
199 paddr = _paddr;
200 validPaddr = true;
201 }
202
203 /** Accessor for paddr. */
204 Addr getPaddr() { assert(validPaddr); return paddr; }
205
206 /** Accessor for size. */
207 int getSize() { assert(validPaddr || validAsidVaddr); return size; }
208 /** Accessor for time. */
209 Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
210
211 /** Accessor for flags. */
212 uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
213 /** Accessor for paddr. */
214 void setFlags(uint32_t _flags)
215 { assert(validPaddr || validAsidVaddr); flags = _flags; }
216
217 /** Accessor function for vaddr.*/
218 Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
219
220 /** Accessor function for asid.*/
221 int getAsid() { assert(validAsidVaddr); return asid; }
222
223 /** Accessor function for asi.*/
| 192 }
193
194 /** Set just the physical address. This should only be used to
195 * record the result of a translation, and thus the vaddr must be
196 * valid before this method is called. Otherwise, use setPhys()
197 * to guarantee that the size and flags are also set.
198 */
199 void setPaddr(Addr _paddr)
200 {
201 assert(validAsidVaddr);
202 paddr = _paddr;
203 validPaddr = true;
204 }
205
206 /** Accessor for paddr. */
207 Addr getPaddr() { assert(validPaddr); return paddr; }
208
209 /** Accessor for size. */
210 int getSize() { assert(validPaddr || validAsidVaddr); return size; }
211 /** Accessor for time. */
212 Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
213
214 /** Accessor for flags. */
215 uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
216 /** Accessor for paddr. */
217 void setFlags(uint32_t _flags)
218 { assert(validPaddr || validAsidVaddr); flags = _flags; }
219
220 /** Accessor function for vaddr.*/
221 Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
222
223 /** Accessor function for asid.*/
224 int getAsid() { assert(validAsidVaddr); return asid; }
225
226 /** Accessor function for asi.*/
|
224 int getAsi() { assert(validAsidVaddr); return asi; }
| 227 uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
228
|
225 /** Accessor function for asi.*/
| 229 /** Accessor function for asi.*/
|
226 void setAsi(int a) { assert(validAsidVaddr); asi = a; }
| 230 void setAsi(uint8_t a)
231 { assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
|
227
228 /** Accessor function for asi.*/
| 232
233 /** Accessor function for asi.*/
|
229 bool getMmapedReg() { assert(validPaddr); return mmapedReg; }
| 234 bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
235
|
230 /** Accessor function for asi.*/
| 236 /** Accessor function for asi.*/
|
231 void setMmapedReg(bool r) { assert(validPaddr); mmapedReg = r; }
| 237 void setMmapedIpr(bool r) { assert(validPaddr); mmapedIpr = r; }
|
232
233 /** Accessor function to check if sc result is valid. */
234 bool scResultValid() { return validScResult; }
235 /** Accessor function for store conditional return value.*/
236 uint64_t getScResult() { assert(validScResult); return scResult; }
237 /** Accessor function for store conditional return value.*/
238 void setScResult(uint64_t _scResult)
239 { scResult = _scResult; validScResult = true; }
240
241 /** Accessor function for cpu number.*/
242 int getCpuNum() { assert(validCpuAndThreadNums); return cpuNum; }
243 /** Accessor function for thread number.*/
244 int getThreadNum() { assert(validCpuAndThreadNums); return threadNum; }
245
246 /** Accessor function for pc.*/
247 Addr getPC() { assert(validPC); return pc; }
248
249 /** Accessor Function to Check Cacheability. */
250 bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
251
252 bool isInstRead() { return (getFlags() & INST_READ) != 0; }
253
254 bool isLocked() { return (getFlags() & LOCKED) != 0; }
255
256 friend class Packet;
257};
258
259#endif // __MEM_REQUEST_HH__
| 238
239 /** Accessor function to check if sc result is valid. */
240 bool scResultValid() { return validScResult; }
241 /** Accessor function for store conditional return value.*/
242 uint64_t getScResult() { assert(validScResult); return scResult; }
243 /** Accessor function for store conditional return value.*/
244 void setScResult(uint64_t _scResult)
245 { scResult = _scResult; validScResult = true; }
246
247 /** Accessor function for cpu number.*/
248 int getCpuNum() { assert(validCpuAndThreadNums); return cpuNum; }
249 /** Accessor function for thread number.*/
250 int getThreadNum() { assert(validCpuAndThreadNums); return threadNum; }
251
252 /** Accessor function for pc.*/
253 Addr getPC() { assert(validPC); return pc; }
254
255 /** Accessor Function to Check Cacheability. */
256 bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
257
258 bool isInstRead() { return (getFlags() & INST_READ) != 0; }
259
260 bool isLocked() { return (getFlags() & LOCKED) != 0; }
261
262 friend class Packet;
263};
264
265#endif // __MEM_REQUEST_HH__
|