1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Steve Reinhardt
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include <cassert>
43
44#include "base/fast_alloc.hh"
45#include "base/flags.hh"
46#include "base/misc.hh"
47#include "sim/host.hh"
48#include "sim/core.hh"
49
50class Request;
51
52typedef Request* RequestPtr;
53
54class Request : public FastAlloc
55{
56 friend class Packet;
57
58 public:
59 typedef uint32_t FlagsType;
60 typedef ::Flags<FlagsType> Flags;
61
62 /** ASI information for this request if it exists. */
63 static const FlagsType ASI_BITS = 0x000000FF;
64 /** The request is a Load locked/store conditional. */
65 static const FlagsType LLSC = 0x00000100;
66 /** The virtual address is also the physical address. */
67 static const FlagsType PHYSICAL = 0x00000200;
68 /** The request is an ALPHA VPTE pal access (hw_ld). */
69 static const FlagsType VPTE = 0x00000400;
70 /** Use the alternate mode bits in ALPHA. */
71 static const FlagsType ALTMODE = 0x00000800;
72 /** The request is to an uncacheable address. */
73 static const FlagsType UNCACHEABLE = 0x00001000;
74 /** The request should not cause a page fault. */
75 static const FlagsType NO_FAULT = 0x00002000;
76 /** The request should not cause a memory access. */
77 static const FlagsType NO_ACCESS = 0x00004000;
78 /** This request will lock or unlock the accessed memory. When used with
79 * a load, the access locks the particular chunk of memory. When used
80 * with a store, it unlocks. The rule is that locked accesses have to be
81 * made up of a locked load, some operation on the data, and then a locked
82 * store.
83 */
84 static const FlagsType LOCKED = 0x00008000;
85 /** The request should be prefetched into the exclusive state. */
86 static const FlagsType PF_EXCLUSIVE = 0x00010000;
87 /** The request should be marked as LRU. */
88 static const FlagsType EVICT_NEXT = 0x00020000;
89 /** The request should ignore unaligned access faults */
90 static const FlagsType NO_ALIGN_FAULT = 0x00040000;
91 /** The request was an instruction read. */
92 static const FlagsType INST_READ = 0x00080000;
93 /** This request is for a memory swap. */
94 static const FlagsType MEM_SWAP = 0x00100000;
95 static const FlagsType MEM_SWAP_COND = 0x00200000;
96 /** The request should ignore unaligned access faults */
97 static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000;
98 /** This request is to a memory mapped register. */
99 static const FlagsType MMAPED_IPR = 0x00800000;
100
101 private:
102 static const FlagsType PUBLIC_FLAGS = 0x00FFFFFF;
103 static const FlagsType PRIVATE_FLAGS = 0xFF000000;
104
105 /** Whether or not the size is valid. */
106 static const FlagsType VALID_SIZE = 0x01000000;
107 /** Whether or not paddr is valid (has been written yet). */
108 static const FlagsType VALID_PADDR = 0x02000000;
109 /** Whether or not the vaddr & asid are valid. */
110 static const FlagsType VALID_VADDR = 0x04000000;
111 /** Whether or not the pc is valid. */
112 static const FlagsType VALID_PC = 0x10000000;
113 /** Whether or not the context ID is valid. */
114 static const FlagsType VALID_CONTEXT_ID = 0x20000000;
115 static const FlagsType VALID_THREAD_ID = 0x40000000;
116 /** Whether or not the sc result is valid. */
117 static const FlagsType VALID_EXTRA_DATA = 0x80000000;
118
119 private:
120 /**
121 * The physical address of the request. Valid only if validPaddr
122 * is set.
123 */
124 Addr paddr;
125
126 /**
127 * The size of the request. This field must be set when vaddr or
128 * paddr is written via setVirt() or setPhys(), so it is always
129 * valid as long as one of the address fields is valid.
130 */
131 int size;
132
133 /** Flag structure for the request. */
134 Flags flags;
135
136 /**
137 * The time this request was started. Used to calculate
138 * latencies. This field is set to curTick any time paddr or vaddr
139 * is written.
140 */
141 Tick time;
142
143 /** The address space ID. */
144 int asid;
145
146 /** The virtual address of the request. */
147 Addr vaddr;
148
149 /**
150 * Extra data for the request, such as the return value of
151 * store conditional or the compare value for a CAS. */
152 uint64_t extraData;
153
154 /** The context ID (for statistics, typically). */
155 int _contextId;
156 /** The thread ID (id within this CPU) */
157 int _threadId;
158
159 /** program counter of initiating access; for tracing/debugging */
160 Addr pc;
161
162 public:
163 /** Minimal constructor. No fields are initialized. */
164 Request()
165 {}
166
167 /**
168 * Constructor for physical (e.g. device) requests. Initializes
169 * just physical address, size, flags, and timestamp (to curTick).
170 * These fields are adequate to perform a request.
171 */
172 Request(Addr paddr, int size, Flags flags)
173 {
174 setPhys(paddr, size, flags);
175 }
176
177 Request(int asid, Addr vaddr, int size, Flags flags, Addr pc,
178 int cid, int tid)
179 {
180 setThreadContext(cid, tid);
181 setVirt(asid, vaddr, size, flags, pc);
182 }
183
184 ~Request() {} // for FastAlloc
185
186 /**
187 * Set up CPU and thread numbers.
188 */
189 void
190 setThreadContext(int context_id, int thread_id)
191 {
192 _contextId = context_id;
193 _threadId = thread_id;
194 flags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
195 }
196
197 /**
198 * Set up a physical (e.g. device) request in a previously
199 * allocated Request object.
200 */
201 void
202 setPhys(Addr _paddr, int _size, Flags _flags)
203 {
204 assert(_size >= 0);
205 paddr = _paddr;
206 size = _size;
207 time = curTick;
208
209 flags.set(VALID_PADDR|VALID_SIZE);
210 flags.clear(VALID_VADDR|VALID_PC|VALID_EXTRA_DATA|MMAPED_IPR);
211 flags.update(_flags, PUBLIC_FLAGS);
212 }
213
214 /**
215 * Set up a virtual (e.g., CPU) request in a previously
216 * allocated Request object.
217 */
218 void
219 setVirt(int _asid, Addr _vaddr, int _size, Flags _flags, Addr _pc)
220 {
221 assert(_size >= 0);
222 asid = _asid;
223 vaddr = _vaddr;
224 size = _size;
225 pc = _pc;
226 time = curTick;
227
228 flags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
229 flags.clear(VALID_PADDR|VALID_EXTRA_DATA|MMAPED_IPR);
230 flags.update(_flags, PUBLIC_FLAGS);
231 }
232
233 /**
234 * Set just the physical address. This should only be used to
235 * record the result of a translation, and thus the vaddr must be
236 * valid before this method is called. Otherwise, use setPhys()
237 * to guarantee that the size and flags are also set.
238 */
239 void
240 setPaddr(Addr _paddr)
241 {
242 assert(flags.isSet(VALID_VADDR));
243 paddr = _paddr;
244 flags.set(VALID_PADDR);
245 }
246
247 /**
248 * Generate two requests as if this request had been split into two
249 * pieces. The original request can't have been translated already.
250 */
251 void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2)
252 {
253 assert(flags.isSet(VALID_VADDR));
254 assert(flags.noneSet(VALID_PADDR));
255 assert(split_addr > vaddr && split_addr < vaddr + size);
256 req1 = new Request;
257 *req1 = *this;
258 req2 = new Request;
259 *req2 = *this;
260 req1->size = split_addr - vaddr;
261 req2->vaddr = split_addr;
262 req2->size = size - req1->size;
263 }
264
265 /**
266 * Accessor for paddr.
267 */
268 Addr
269 getPaddr()
270 {
271 assert(flags.isSet(VALID_PADDR));
272 return paddr;
273 }
274
275 /**
276 * Accessor for size.
277 */
278 int
279 getSize()
280 {
281 assert(flags.isSet(VALID_SIZE));
282 return size;
283 }
284
285 /** Accessor for time. */
286 Tick
287 getTime()
288 {
289 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
290 return time;
291 }
292
293 void
294 setTime(Tick when)
295 {
296 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
297 time = when;
298 }
299
300 /** Accessor for flags. */
301 Flags
302 getFlags()
303 {
304 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
305 return flags & PUBLIC_FLAGS;
306 }
307
308 Flags
309 anyFlags(Flags _flags)
310 {
311 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
312 assert(_flags.noneSet(~PUBLIC_FLAGS));
313 return flags.isSet(_flags);
314 }
315
316 Flags
317 allFlags(Flags _flags)
318 {
319 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
320 assert(_flags.noneSet(~PUBLIC_FLAGS));
321 return flags.allSet(_flags);
322 }
323
324 /** Accessor for flags. */
325 void
326 setFlags(Flags _flags)
327 {
328 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
329 assert(_flags.noneSet(~PUBLIC_FLAGS));
330 flags.set(_flags);
331 }
332
333 void
334 clearFlags(Flags _flags)
335 {
336 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
337 assert(_flags.noneSet(~PUBLIC_FLAGS));
338 flags.clear(_flags);
339 }
340
341 void
342 clearFlags()
343 {
344 assert(flags.isSet(VALID_PADDR|VALID_VADDR));
345 flags.clear(PUBLIC_FLAGS);
346 }
347
348 /** Accessor function for vaddr.*/
349 Addr
350 getVaddr()
351 {
352 assert(flags.isSet(VALID_VADDR));
353 return vaddr;
354 }
355
356 /** Accessor function for asid.*/
357 int
358 getAsid()
359 {
360 assert(flags.isSet(VALID_VADDR));
361 return asid;
362 }
363
364 /** Accessor function for asi.*/
365 uint8_t
366 getAsi()
367 {
368 assert(flags.isSet(VALID_VADDR));
369 return flags & ASI_BITS;
370 }
371
372 /** Accessor function for asi.*/
373 void
374 setAsi(uint8_t a)
375 {
376 assert(flags.isSet(VALID_VADDR));
377 flags.update(a, ASI_BITS);
378 }
379
380 /** Accessor function for asi.*/
381 bool
382 isMmapedIpr()
383 {
384 assert(flags.isSet(VALID_PADDR));
385 return flags.isSet(MMAPED_IPR);
386 }
387
388 /** Accessor function for asi.*/
389 void
390 setMmapedIpr(bool r)
391 {
392 assert(VALID_VADDR);
393 flags.set(MMAPED_IPR);
394 }
395
396 /** Accessor function to check if sc result is valid. */
397 bool
398 extraDataValid()
399 {
400 return flags.isSet(VALID_EXTRA_DATA);
401 }
402
403 /** Accessor function for store conditional return value.*/
404 uint64_t
405 getExtraData() const
406 {
407 assert(flags.isSet(VALID_EXTRA_DATA));
408 return extraData;
409 }
410
411 /** Accessor function for store conditional return value.*/
412 void
413 setExtraData(uint64_t _extraData)
414 {
415 extraData = _extraData;
416 flags.set(VALID_EXTRA_DATA);
417 }
418
419 bool
420 hasContextId() const
421 {
422 return flags.isSet(VALID_CONTEXT_ID);
423 }
424
425 /** Accessor function for context ID.*/
426 int
427 contextId() const
428 {
429 assert(flags.isSet(VALID_CONTEXT_ID));
430 return _contextId;
431 }
432
433 /** Accessor function for thread ID. */
434 int
435 threadId() const
436 {
437 assert(flags.isSet(VALID_THREAD_ID));
438 return _threadId;
439 }
440
441 bool
442 hasPC() const
443 {
444 return flags.isSet(VALID_PC);
445 }
446
447 /** Accessor function for pc.*/
448 Addr
449 getPC() const
450 {
451 assert(flags.isSet(VALID_PC));
452 return pc;
453 }
454
455 /** Accessor Function to Check Cacheability. */
456 bool isUncacheable() const { return flags.isSet(UNCACHEABLE); }
457 bool isInstRead() const { return flags.isSet(INST_READ); }
458 bool isLLSC() const { return flags.isSet(LLSC); }
459 bool isLocked() const { return flags.isSet(LOCKED); }
460 bool isSwap() const { return flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
461 bool isCondSwap() const { return flags.isSet(MEM_SWAP_COND); }
462
463 bool
464 isMisaligned() const
465 {
466 if (flags.isSet(NO_ALIGN_FAULT))
467 return false;
468
469 if ((vaddr & 0x1))
470 return true;
471
472 if (flags.isSet(NO_HALF_WORD_ALIGN_FAULT))
473 return false;
474
475 if ((vaddr & 0x2))
476 return true;
477
478 return false;
479 }
480};
481
482#endif // __MEM_REQUEST_HH__