physical.hh (3751:b422ffec62c1) | physical.hh (4040:eb894f3fc168) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 117 unchanged lines hidden (view full) --- 126 // requesting execution context), 'true' otherwise. Note that 127 // this method must be called on *all* stores since even 128 // non-conditional stores must clear any matching lock addresses. 129 bool writeOK(Request *req) { 130 if (lockedAddrList.empty()) { 131 // no locked addrs: nothing to check, store_conditional fails 132 bool isLocked = req->isLocked(); 133 if (isLocked) { | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 117 unchanged lines hidden (view full) --- 126 // requesting execution context), 'true' otherwise. Note that 127 // this method must be called on *all* stores since even 128 // non-conditional stores must clear any matching lock addresses. 129 bool writeOK(Request *req) { 130 if (lockedAddrList.empty()) { 131 // no locked addrs: nothing to check, store_conditional fails 132 bool isLocked = req->isLocked(); 133 if (isLocked) { |
134 req->setScResult(0); | 134 req->setExtraData(0); |
135 } 136 return !isLocked; // only do write if not an sc 137 } else { 138 // iterate over list... 139 return checkLockedAddrList(req); 140 } 141 } 142 143 uint8_t *pmemAddr; 144 MemoryPort *port; 145 int pagePtr; 146 Tick lat; 147 148 public: 149 Addr new_page(); 150 uint64_t size() { return params()->addrRange.size(); } | 135 } 136 return !isLocked; // only do write if not an sc 137 } else { 138 // iterate over list... 139 return checkLockedAddrList(req); 140 } 141 } 142 143 uint8_t *pmemAddr; 144 MemoryPort *port; 145 int pagePtr; 146 Tick lat; 147 148 public: 149 Addr new_page(); 150 uint64_t size() { return params()->addrRange.size(); } |
151 uint64_t start() { return params()->addrRange.start; } |
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151 152 struct Params 153 { 154 std::string name; 155 Range<Addr> addrRange; 156 Tick latency; 157 bool zero; 158 }; --- 28 unchanged lines hidden --- | 152 153 struct Params 154 { 155 std::string name; 156 Range<Addr> addrRange; 157 Tick latency; 158 bool zero; 159 }; --- 28 unchanged lines hidden --- |