1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 */
30
31/* @file
32 */
33
34#ifndef __PHYSICAL_MEMORY_HH__
35#define __PHYSICAL_MEMORY_HH__
36
37#include <map>
38#include <string>
39
40#include "base/range.hh"
41#include "mem/mem_object.hh"
42#include "mem/packet.hh"
43#include "mem/tport.hh"
44#include "params/PhysicalMemory.hh"
45#include "sim/eventq.hh"
42#include <map>
43#include <string>
46
47//
48// Functional model for a contiguous block of physical memory. (i.e. RAM)
49//
50class PhysicalMemory : public MemObject
51{
52 class MemoryPort : public SimpleTimingPort
53 {

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109 };
110
111 std::list<LockedAddr> lockedAddrList;
112
113 // helper function for checkLockedAddrs(): we really want to
114 // inline a quick check for an empty locked addr list (hopefully
115 // the common case), and do the full list search (if necessary) in
116 // this out-of-line function
115 bool checkLockedAddrList(PacketPtr pkt);
117 bool checkLockedAddrList(Request *req);
118
119 // Record the address of a load-locked operation so that we can
120 // clear the execution context's lock flag if a matching store is
121 // performed
120 void trackLoadLocked(PacketPtr pkt);
122 void trackLoadLocked(Request *req);
123
124 // Compare a store address with any locked addresses so we can
125 // clear the lock flag appropriately. Return value set to 'false'
126 // if store operation should be suppressed (because it was a
127 // conditional store and the address was no longer locked by the
128 // requesting execution context), 'true' otherwise. Note that
129 // this method must be called on *all* stores since even
130 // non-conditional stores must clear any matching lock addresses.
129 bool writeOK(PacketPtr pkt) {
130 Request *req = pkt->req;
131 bool writeOK(Request *req) {
132 if (lockedAddrList.empty()) {
133 // no locked addrs: nothing to check, store_conditional fails
133 bool isLocked = pkt->isLocked();
134 bool isLocked = req->isLocked();
135 if (isLocked) {
136 req->setExtraData(0);
137 }
138 return !isLocked; // only do write if not an sc
139 } else {
140 // iterate over list...
140 return checkLockedAddrList(pkt);
141 return checkLockedAddrList(req);
142 }
143 }
144
145 uint8_t *pmemAddr;
146 int pagePtr;
147 Tick lat;
148 std::vector<MemoryPort*> ports;
149 typedef std::vector<MemoryPort*>::iterator PortIterator;
150
151 public:
152 Addr new_page();
152 uint64_t size() { return params()->addrRange.size(); }
153 uint64_t start() { return params()->addrRange.start; }
153 uint64_t size() { return params()->range.size(); }
154 uint64_t start() { return params()->range.start; }
155
155 struct Params
156 {
157 std::string name;
158 Range<Addr> addrRange;
159 Tick latency;
160 bool zero;
161 };
162
163 protected:
164 Params *_params;
165
156 public:
167 const Params *params() const { return _params; }
168 PhysicalMemory(Params *p);
157 typedef PhysicalMemoryParams Params;
158 PhysicalMemory(const Params *p);
159 virtual ~PhysicalMemory();
160
161 const Params *
162 params() const
163 {
164 return dynamic_cast<const Params *>(_params);
165 }
166
167 public:
168 int deviceBlockSize();
169 void getAddressRanges(AddrRangeList &resp, bool &snoop);
170 virtual Port *getPort(const std::string &if_name, int idx = -1);
171 void virtual init();
172 unsigned int drain(Event *de);
173
174 protected:
179 Tick doAtomicAccess(PacketPtr pkt);
175 void doFunctionalAccess(PacketPtr pkt);
176 virtual Tick calculateLatency(PacketPtr pkt);
177 void recvStatusChange(Port::Status status);
178
179 public:
180 virtual void serialize(std::ostream &os);
181 virtual void unserialize(Checkpoint *cp, const std::string &section);
182
183};
184
185#endif //__PHYSICAL_MEMORY_HH__